7 /* All right, we go the "software" way: timer, toggle LED in interrupt.
8 * Based on hasu's code for AVRs.
9 * Use LP timer on Kinetises, TIM14 on STM32F0.
12 #if defined(KL2x) || defined(K20x)
14 /* Use Low Power Timer (LPTMR) */
15 #define TIMER_INTERRUPT_VECTOR KINETIS_LPTMR0_IRQ_VECTOR
16 #define RESET_COUNTER LPTMR0->CSR |= LPTMRx_CSR_TCF
18 #elif defined(STM32F0XX)
20 /* Use TIM14 manually */
21 #define TIMER_INTERRUPT_VECTOR STM32_TIM14_HANDLER
22 #define RESET_COUNTER STM32_TIM14->SR &= ~STM32_TIM_SR_UIF
26 #if defined(KL2x) || defined(K20x) || defined(STM32F0XX) /* common parts for timers/interrupts */
28 /* Breathing Sleep LED brighness(PWM On period) table
29 * (64[steps] * 4[duration]) / 64[PWM periods/s] = 4 second breath cycle
31 * http://www.wolframalpha.com/input/?i=%28sin%28+x%2F64*pi%29**8+*+255%2C+x%3D0+to+63
32 * (0..63).each {|x| p ((sin(x/64.0*PI)**8)*255).to_i }
34 static const uint8_t breathing_table[64] = {
35 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 4, 6, 10,
36 15, 23, 32, 44, 58, 74, 93, 113, 135, 157, 179, 199, 218, 233, 245, 252,
37 255, 252, 245, 233, 218, 199, 179, 157, 135, 113, 93, 74, 58, 44, 32, 23,
38 15, 10, 6, 4, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
41 /* interrupt handler */
42 OSAL_IRQ_HANDLER(TIMER_INTERRUPT_VECTOR) {
46 * timer:1111 1111 1111 1111
47 * \_____/\/ \_______/____ count(0-255)
48 * \ \______________ duration of step(4)
49 * \__________________ index of step table(0-63)
52 // this works for cca 65536 irqs/sec
60 } timer = { .row = 0 };
65 if (timer.pwm.count == 0) {
66 led_set(1<<USB_LED_CAPS_LOCK);
69 if (timer.pwm.count == breathing_table[timer.pwm.index]) {
73 /* Reset the counter */
79 #endif /* common parts for known platforms */
82 #if defined(KL2x) || defined(K20x) /* platform selection: familiar Kinetis chips */
84 /* LPTMR clock options */
85 #define LPTMR_CLOCK_MCGIRCLK 0 /* 4MHz clock */
86 #define LPTMR_CLOCK_LPO 1 /* 1kHz clock */
87 #define LPTMR_CLOCK_ERCLK32K 2 /* external 32kHz crystal */
88 #define LPTMR_CLOCK_OSCERCLK 3 /* output from OSC */
90 /* Work around inconsistencies in Freescale naming */
91 #if !defined(SIM_SCGC5_LPTMR)
92 #define SIM_SCGC5_LPTMR SIM_SCGC5_LPTIMER
95 /* Initialise the timer */
96 void sleep_led_init(void) {
97 /* Make sure the clock to the LPTMR is enabled */
98 SIM->SCGC5 |= SIM_SCGC5_LPTMR;
99 /* Reset LPTMR settings */
101 /* Set the compare value */
102 LPTMR0->CMR = 0; // trigger on counter value (i.e. every time)
104 /* Set up clock source and prescaler */
107 * | ON |___OFF___| ON |___OFF___| ....
108 * |<-------------->|<-------------->|<- ....
109 * PWM period PWM period
111 * R interrupts/period[resolution]
112 * F periods/second[frequency]
113 * R * F interrupts/second
116 /* === OPTION 1 === */
119 // No prescaler => 1024 irqs/sec
120 // Note: this is too slow for a smooth breathe
121 LPTMR0->PSR = LPTMRx_PSR_PCS(LPTMR_CLOCK_LPO)|LPTMRx_PSR_PBYP;
122 #endif /* OPTION 1 */
124 /* === OPTION 2 === */
126 // nMHz IRC (n=4 on KL25Z, KL26Z and K20x; n=2 or 8 on KL27Z)
127 MCG->C2 |= MCG_C2_IRCS; // fast (4MHz) internal ref clock
128 #if defined(KL27) // divide the 8MHz IRC by 2, to have the same MCGIRCLK speed as others
129 MCG->MC |= MCG_MC_LIRC_DIV2_DIV2;
131 MCG->C1 |= MCG_C1_IRCLKEN; // enable internal ref clock
132 // to work in stop mode, also MCG_C1_IREFSTEN
133 // Divide 4MHz by 2^N (N=6) => 62500 irqs/sec =>
134 // => approx F=61, R=256, duration = 4
135 LPTMR0->PSR = LPTMRx_PSR_PCS(LPTMR_CLOCK_MCGIRCLK)|LPTMRx_PSR_PRESCALE(6);
136 #endif /* OPTION 2 */
138 /* === OPTION 3 === */
140 // OSC output (external crystal), usually 8MHz or 16MHz
141 OSC0->CR |= OSC_CR_ERCLKEN; // enable ext ref clock
142 // to work in stop mode, also OSC_CR_EREFSTEN
144 LPTMR0->PSR = LPTMRx_PSR_PCS(LPTMR_CLOCK_OSCERCLK)|LPTMRx_PSR_PRESCALE(7);
145 #endif /* OPTION 3 */
146 /* === END OPTIONS === */
148 /* Interrupt on TCF set (compare flag) */
149 nvicEnableVector(LPTMR0_IRQn, 2); // vector, priority
150 LPTMR0->CSR |= LPTMRx_CSR_TIE;
153 void sleep_led_enable(void) {
154 /* Enable the timer */
155 LPTMR0->CSR |= LPTMRx_CSR_TEN;
158 void sleep_led_disable(void) {
159 /* Disable the timer */
160 LPTMR0->CSR &= ~LPTMRx_CSR_TEN;
163 void sleep_led_toggle(void) {
164 /* Toggle the timer */
165 LPTMR0->CSR ^= LPTMRx_CSR_TEN;
168 #elif defined(STM32F0XX) /* platform selection: STM32F0XX */
170 /* Initialise the timer */
171 void sleep_led_init(void) {
173 rccEnableTIM14(FALSE); /* low power enable = FALSE */
177 /* Assuming 48MHz internal clock */
178 /* getting cca 65484 irqs/sec */
179 STM32_TIM14->PSC = 733;
182 /* 0 => interrupt every time */
183 STM32_TIM14->ARR = 3;
185 /* enable counter update event interrupt */
186 STM32_TIM14->DIER |= STM32_TIM_DIER_UIE;
188 /* register interrupt vector */
189 nvicEnableVector(STM32_TIM14_NUMBER, 2); /* vector, priority */
192 void sleep_led_enable(void) {
193 /* Enable the timer */
194 STM32_TIM14->CR1 = STM32_TIM_CR1_CEN | STM32_TIM_CR1_URS;
195 /* URS => update event only on overflow; setting UG bit disabled */
198 void sleep_led_disable(void) {
199 /* Disable the timer */
200 STM32_TIM14->CR1 = 0;
203 void sleep_led_toggle(void) {
204 /* Toggle the timer */
205 STM32_TIM14->CR1 ^= STM32_TIM_CR1_CEN;
209 #else /* platform selection: not on familiar chips */
211 void sleep_led_init(void) {
214 void sleep_led_enable(void) {
215 led_set(1<<USB_LED_CAPS_LOCK);
218 void sleep_led_disable(void) {
222 void sleep_led_toggle(void) {
226 #endif /* platform selection */