2 Copyright 2012 Jun Wako <wakojun@gmail.com>
4 This program is free software: you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation, either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #define VENDOR_ID 0xFEED
22 #define PRODUCT_ID 0x9898
23 #define DEVICE_VER 0x0100
24 #define MANUFACTURER t.m.k.
25 #define PRODUCT PC98 keyboard converter
26 #define DESCRIPTION converts PC98 keyboard protocol into USB
30 #define MATRIX_ROWS 16
33 /* key combination for command */
34 #define IS_COMMAND() ( \
35 keyboard_report->keys[0] == KC_STOP || \
36 keyboard_report->mods == (MOD_BIT(KC_LALT) | MOD_BIT(KC_RALT)) \
40 /* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
41 #define LOCKING_SUPPORT_ENABLE
42 /* Locking resynchronize hack */
43 #define LOCKING_RESYNC_ENABLE
45 /* Control LED indicatiors, which doesn't work well with locking support */
46 //#define PC98_LED_CONTROL
49 /* PC98 Reset Port shared with TXD */
50 #define PC98_RST_DDR DDRD
51 #define PC98_RST_PORT PORTD
52 #define PC98_RST_BIT 3
54 #define PC98_RDY_DDR DDRD
55 #define PC98_RDY_PORT PORTD
56 #define PC98_RDY_BIT 4
58 #define PC98_RTY_DDR DDRD
59 #define PC98_RTY_PORT PORTD
60 #define PC98_RTY_BIT 1
63 * PC98 Serial(USART) configuration
64 * asynchronous, positive logic, 19200baud, bit order: LSB first
65 * 1-start bit, 8-data bit, odd parity, 1-stop bit
70 #define SERIAL_SOFT_BAUD 19200
71 #define SERIAL_SOFT_PARITY_ODD
72 #define SERIAL_SOFT_BIT_ORDER_LSB
73 #define SERIAL_SOFT_LOGIC_POSITIVE
75 #define SERIAL_SOFT_RXD_DDR DDRD
76 #define SERIAL_SOFT_RXD_PORT PORTD
77 #define SERIAL_SOFT_RXD_PIN PIND
78 #define SERIAL_SOFT_RXD_BIT 2
79 #define SERIAL_SOFT_RXD_READ() (SERIAL_SOFT_RXD_PIN&(1<<SERIAL_SOFT_RXD_BIT))
81 #define SERIAL_SOFT_RXD_VECT INT2_vect
82 #define SERIAL_SOFT_RXD_INIT() do { \
83 /* pin configuration: input with pull-up */ \
84 SERIAL_SOFT_RXD_DDR &= ~(1<<SERIAL_SOFT_RXD_BIT); \
85 SERIAL_SOFT_RXD_PORT |= (1<<SERIAL_SOFT_RXD_BIT); \
86 /* enable interrupt: INT2(falling edge) */ \
87 EICRA |= ((1<<ISC21)|(0<<ISC20)); \
91 #define SERIAL_SOFT_RXD_INT_ENTER()
92 #define SERIAL_SOFT_RXD_INT_EXIT() do { \
93 /* clear interrupt flag */ \
97 #define SERIAL_SOFT_TXD_DDR DDRD
98 #define SERIAL_SOFT_TXD_PORT PORTD
99 #define SERIAL_SOFT_TXD_PIN PIND
100 #define SERIAL_SOFT_TXD_BIT 3
101 #define SERIAL_SOFT_TXD_HI() do { SERIAL_SOFT_TXD_PORT |= (1<<SERIAL_SOFT_TXD_BIT); } while (0)
102 #define SERIAL_SOFT_TXD_LO() do { SERIAL_SOFT_TXD_PORT &= ~(1<<SERIAL_SOFT_TXD_BIT); } while (0)
103 #define SERIAL_SOFT_TXD_INIT() do { \
104 /* pin configuration: output */ \
105 SERIAL_SOFT_TXD_DDR |= (1<<SERIAL_SOFT_TXD_BIT); \
107 SERIAL_SOFT_TXD_ON(); \
112 * Hardware Serial(UART)
114 #if defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega32U2__)
115 #define SERIAL_UART_BAUD 19200
116 #define SERIAL_UART_DATA UDR1
117 #define SERIAL_UART_UBRR ((F_CPU/(16UL*SERIAL_UART_BAUD))-1)
118 #define SERIAL_UART_RXD_VECT USART1_RX_vect
119 #define SERIAL_UART_TXD_READY (UCSR1A&(1<<UDRE1))
120 #define SERIAL_UART_INIT() do { \
121 UBRR1L = (uint8_t) SERIAL_UART_UBRR; /* baud rate */ \
122 UBRR1H = (uint8_t) (SERIAL_UART_UBRR>>8); /* baud rate */ \
123 UCSR1B |= (1<<RXCIE1) | (1<<RXEN1); /* RX interrupt, RX: enable */ \
124 UCSR1B |= (0<<TXCIE1) | (1<<TXEN1); /* TX interrupt, TX: enable */ \
125 UCSR1C |= (1<<UPM11) | (1<<UPM10); /* parity: none(00), even(01), odd(11) */ \
129 #error "USART configuration is needed."