2 Copyright 2012 Jun Wako <wakojun@gmail.com>
4 This program is free software: you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation, either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <avr/interrupt.h>
23 #define VENDOR_ID 0xFEED
24 #define PRODUCT_ID 0x6512
25 #define DEVICE_VER 0x0001
26 #define MANUFACTURER t.m.k.
27 #define PRODUCT PS/2 keyboard converter
28 #define DESCRIPTION convert PS/2 keyboard to USB
32 #define MATRIX_ROWS 32 // keycode bit: 3-0
33 #define MATRIX_COLS 8 // keycode bit: 6-4
36 /* key combination for command */
37 #define IS_COMMAND() ( \
38 keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) || \
39 keyboard_report->mods == (MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RSHIFT)) \
43 //#define NO_SUSPEND_POWER_DOWN
49 #ifdef PS2_USE_BUSYWAIT
50 #define PS2_CLOCK_PORT PORTD
51 #define PS2_CLOCK_PIN PIND
52 #define PS2_CLOCK_DDR DDRD
53 #define PS2_CLOCK_BIT 5
54 #define PS2_DATA_PORT PORTD
55 #define PS2_DATA_PIN PIND
56 #define PS2_DATA_DDR DDRD
57 #define PS2_DATA_BIT 2
64 #if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)
65 /* XCK for clock line and RXD for data line */
66 #define PS2_CLOCK_PORT PORTD
67 #define PS2_CLOCK_PIN PIND
68 #define PS2_CLOCK_DDR DDRD
69 #define PS2_CLOCK_BIT 5
70 #define PS2_DATA_PORT PORTD
71 #define PS2_DATA_PIN PIND
72 #define PS2_DATA_DDR DDRD
73 #define PS2_DATA_BIT 2
74 /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
75 /* set DDR of CLOCK as input to be slave */
76 #define PS2_USART_INIT() do { \
77 PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
78 PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
79 UCSR1C = ((1 << UMSEL10) | \
88 #define PS2_USART_RX_INT_ON() do { \
89 UCSR1B = ((1 << RXCIE1) | \
92 #define PS2_USART_RX_POLL_ON() do { \
93 UCSR1B = (1 << RXEN1); \
95 #define PS2_USART_OFF() do { \
97 UCSR1B &= ~((1 << RXEN1) | \
100 #define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
101 #define PS2_USART_RX_DATA UDR1
102 #define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
103 #define PS2_USART_RX_VECT USART1_RX_vect
104 #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega168P__) || defined(__AVR_ATmega328P__)
105 /* XCK for clock line and RXD for data line */
106 #define PS2_CLOCK_PORT PORTD
107 #define PS2_CLOCK_PIN PIND
108 #define PS2_CLOCK_DDR DDRD
109 #define PS2_CLOCK_BIT 4
110 #define PS2_DATA_PORT PORTD
111 #define PS2_DATA_PIN PIND
112 #define PS2_DATA_DDR DDRD
113 #define PS2_DATA_BIT 0
114 /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
115 /* set DDR of CLOCK as input to be slave */
116 #define PS2_USART_INIT() do { \
117 PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
118 PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
119 UCSR0C = ((1 << UMSEL00) | \
128 #define PS2_USART_RX_INT_ON() do { \
129 UCSR0B = ((1 << RXCIE0) | \
132 #define PS2_USART_RX_POLL_ON() do { \
133 UCSR0B = (1 << RXEN0); \
135 #define PS2_USART_OFF() do { \
137 UCSR0B &= ~((1 << RXEN0) | \
140 #define PS2_USART_RX_READY (UCSR0A & (1<<RXC0))
141 #define PS2_USART_RX_DATA UDR0
142 #define PS2_USART_ERROR (UCSR0A & ((1<<FE0) | (1<<DOR0) | (1<<UPE0)))
143 #define PS2_USART_RX_VECT USART_RX_vect