5 #include <util/delay.h>
10 // matrix is active low. (key on: 0/key off: 1)
12 // HHKB has no ghost and no bounce.
13 // row: HC4051 select input channel(0-8)
14 // PB0, PB1, PB2(A, B, C)
15 // col: LS145 select low output line(0-8)
16 // PB3, PB4, PB5, PB6(A, B, C, D)
17 // use D as ENABLE: (enable: 0/unenable: 1)
18 // key: KEY: (on: 0/ off:1)
19 // UNKNOWN: unknown whether input or output
20 // PE6,PE7(KEY, UNKNOWN)
21 #define COL_ENABLE (1<<6)
22 #define KEY_SELELCT(ROW, COL) (PORTB = COL_ENABLE|(((COL)&0x07)<<3)|((ROW)&0x07))
23 #define KEY_ENABLE (PORTB &= ~COL_ENABLE)
24 #define KEY_UNABLE (PORTB |= COL_ENABLE)
25 #define KEY_ON ((PINE&(1<<6)) ? false : true)
27 // matrix state buffer
30 static uint8_t _matrix0[MATRIX_ROWS];
31 static uint8_t _matrix1[MATRIX_ROWS];
34 static bool matrix_has_ghost_in_row(int row);
38 int matrix_rows(void) {
43 int matrix_cols(void) {
47 // this must be called once before matrix_scan.
48 void matrix_init(void)
50 // row & col output(PB0-6)
52 PORTB = KEY_SELELCT(0, 0);
53 // KEY & VALID input with pullup(PE6,7)
57 // initialize matrix state: all keys off
58 for (int i=0; i < MATRIX_ROWS; i++) _matrix0[i] = 0xFF;
59 for (int i=0; i < MATRIX_ROWS; i++) _matrix1[i] = 0xFF;
61 matrix_prev = _matrix1;
72 for (int row = 0; row < MATRIX_ROWS; row++) {
73 for (int col = 0; col < MATRIX_COLS; col++) {
74 KEY_SELELCT(row, col);
75 _delay_us(50); // from logic analyzer chart
77 _delay_us(10); // from logic analyzer chart
79 matrix[row] &= ~(1<<col);
81 matrix[row] |= (1<<col);
84 _delay_us(150); // from logic analyzer chart
90 bool matrix_is_modified(void) {
91 for (int i=0; i <MATRIX_ROWS; i++) {
92 if (matrix[i] != matrix_prev[i])
99 bool matrix_has_ghost(void) {
104 uint16_t matrix_get_row(int row) {
108 void matrix_print(void) {
109 print("\nr/c 01234567\n");
110 for (int row = 0; row < matrix_rows(); row++) {
111 phex(row); print(": ");
112 pbin_reverse(matrix_get_row(row));
113 if (matrix_has_ghost_in_row(row)) {
121 static bool matrix_has_ghost_in_row(int row) {