7 #include <util/delay.h>
12 // matrix is active low. (key on: 0/key off: 1)
14 // HHKB has no ghost and no bounce.
15 // row: HC4051 select input channel(0-8)
16 // PB0, PB1, PB2(A, B, C)
17 // col: LS145 select low output line(0-8)
18 // PB3, PB4, PB5, PB6(A, B, C, D)
19 // use D as ENABLE: (enable: 0/unenable: 1)
20 // key: KEY: (on: 0/ off:1)
21 // UNKNOWN: unknown whether input or output
22 // PE6,PE7(KEY, UNKNOWN)
23 #define COL_ENABLE (1<<6)
24 #define KEY_SELELCT(ROW, COL) (PORTB = COL_ENABLE|(((COL)&0x07)<<3)|((ROW)&0x07))
25 #define KEY_ENABLE (PORTB &= ~COL_ENABLE)
26 #define KEY_UNABLE (PORTB |= COL_ENABLE)
27 #define KEY_ON ((PINE&(1<<6)) ? false : true)
29 // matrix state buffer
32 static uint8_t _matrix0[MATRIX_ROWS];
33 static uint8_t _matrix1[MATRIX_ROWS];
48 // this must be called once before matrix_scan.
49 void matrix_init(void)
51 // row & col output(PB0-6)
53 PORTB = KEY_SELELCT(0, 0);
54 // KEY & VALID input with pullup(PE6,7)
58 // initialize matrix state: all keys off
59 for (int i=0; i < MATRIX_ROWS; i++) _matrix0[i] = 0x00;
60 for (int i=0; i < MATRIX_ROWS; i++) _matrix1[i] = 0x00;
62 matrix_prev = _matrix1;
73 for (int row = 0; row < MATRIX_ROWS; row++) {
74 for (int col = 0; col < MATRIX_COLS; col++) {
75 KEY_SELELCT(row, col);
76 _delay_us(50); // from logic analyzer chart
78 _delay_us(10); // from logic analyzer chart
80 matrix[row] |= (1<<col);
82 matrix[row] &= ~(1<<col);
85 _delay_us(150); // from logic analyzer chart
91 bool matrix_is_modified(void)
93 for (int i = 0; i < MATRIX_ROWS; i++) {
94 if (matrix[i] != matrix_prev[i])
101 bool matrix_has_ghost(void)
107 bool matrix_is_on(int row, int col)
109 return (matrix[row] & (1<<col));
113 uint16_t matrix_get_row(int row)
118 void matrix_print(void)
120 print("\nr/c 01234567\n");
121 for (int row = 0; row < matrix_rows(); row++) {
122 phex(row); print(": ");
123 pbin_reverse(matrix_get_row(row));
128 int matrix_key_count(void)
131 for (int i = 0; i < MATRIX_ROWS; i++) {
132 count += bitpop(matrix[i]);