1 /* This is from http://www.mtcnet.net/~henryvm/wdt/ */
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8 Copyright (c) 2009, Curt Van Maanen
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10 Permission to use, copy, modify, and/or distribute this software for any
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11 purpose with or without fee is hereby granted, provided that the above
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12 copyright notice and this permission notice appear in all copies.
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14 THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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15 WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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16 MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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17 ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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18 WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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19 ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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20 OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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24 #include "wd.h" //if in same directory as project
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25 #include <avr/wd.h> //if wd.h is in avr directory
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27 set watchdog modes and prescale
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30 WD_SET(mode,[timeout]); //prescale always set
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34 WD_RST normal reset mode
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35 WD_IRQ interrupt only mode (if supported)
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36 WD_RST_IRQ interrupt+reset mode (if supported)
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39 WDTO_15MS default if no timeout provided
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47 WDTO_4S (if supported)
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48 WDTO_8S (if supported)
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51 WD_SET(WD_RST,WDTO_1S); //reset mode, 1s timeout
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52 WD_SET(WD_OFF); //watchdog disabled (if not fused on)
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53 WD_SET(WD_RST); //reset mode, 15ms (default timeout)
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54 WD_SET(WD_IRQ,WDTO_120MS); //interrupt only mode, 120ms timeout
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55 WD_SET(WD_RST_IRQ,WDTO_2S); //interrupt+reset mode, 2S timeout
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58 for enhanced watchdogs, if the watchdog is not being used WDRF should be
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59 cleared on every power up or reset, along with disabling the watchdog-
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60 WD_DISABLE(); //clear WDRF, then turn off watchdog
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64 //reset registers to the same name (MCUCSR)
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65 #if !defined(MCUCSR)
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66 #define MCUCSR MCUSR
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69 //watchdog registers to the same name (WDTCSR)
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70 #if !defined(WDTCSR)
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71 #define WDTCSR WDTCR
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74 //if enhanced watchdog, define irq values, create disable macro
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77 #define WD_RST_IRQ 0xC8
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78 #define WD_DISABLE() do{ \
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79 MCUCSR &= ~(1<<WDRF); \
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92 #define WDTO_120MS 3
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93 #define WDTO_250MS 4
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94 #define WDTO_500MS 5
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98 //prescale values for avrs with WDP3
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100 #define WDTO_4S 0x20
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101 #define WDTO_8S 0x21
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105 #define WDR() __asm__ __volatile__("wdr")
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107 //avr reset using watchdog
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108 #define WD_AVR_RESET() do{ \
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109 __asm__ __volatile__("cli"); \
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110 WD_SET_UNSAFE(WD_RST); \
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114 /*set the watchdog-
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117 3. reset watchdog timer
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118 4. enable watchdog change
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119 5. write watchdog value
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120 6. restore SREG (restoring irq status)
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122 #define WD_SET(val,...) \
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123 __asm__ __volatile__( \
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124 "in __tmp_reg__,__SREG__" "\n\t" \
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127 "sts %[wdreg],%[wden]" "\n\t" \
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128 "sts %[wdreg],%[wdval]" "\n\t" \
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129 "out __SREG__,__tmp_reg__" "\n\t" \
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131 : [wdreg] "M" (&WDTCSR), \
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132 [wden] "r" ((uint8_t)(0x18)), \
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133 [wdval] "r" ((uint8_t)(val|(__VA_ARGS__+0))) \
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137 /*set the watchdog when I bit in SREG known to be clear-
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138 1. reset watchdog timer
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139 2. enable watchdog change
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140 5. write watchdog value
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142 #define WD_SET_UNSAFE(val,...) \
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143 __asm__ __volatile__( \
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145 "sts %[wdreg],%[wden]" "\n\t" \
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146 "sts %[wdreg],%[wdval]" "\n\t" \
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148 : [wdreg] "M" (&WDTCSR), \
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149 [wden] "r" ((uint8_t)(0x18)), \
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150 [wdval] "r" ((uint8_t)(val|(__VA_ARGS__+0))) \
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154 //for compatibility with avr/wdt.h
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155 #define wdt_enable(val) WD_SET(WD_RST,val)
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156 #define wdt_disable() WD_SET(WD_OFF)
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159 #endif /* _AVR_WD_H_ */
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