2 ******************************************************************************
3 * @file stm32f1xx_hal_dma_ex.h
4 * @author MCD Application Team
6 * @date 15-December-2014
7 * @brief Header file of DMA HAL Extension module.
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F1xx_HAL_DMA_EX_H
40 #define __STM32F1xx_HAL_DMA_EX_H
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f1xx_hal_def.h"
49 /** @addtogroup STM32F1xx_HAL_Driver
53 /** @defgroup DMAEx DMAEx
57 /* Exported types ------------------------------------------------------------*/
58 /* Exported constants --------------------------------------------------------*/
59 /* Exported macro ------------------------------------------------------------*/
60 /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
63 /* Interrupt & Flag management */
66 * @brief Returns the current DMA Channel transfer complete flag.
67 * @param __HANDLE__: DMA handle
68 * @retval The specified transfer complete flag index.
71 #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
72 defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
73 /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
76 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
77 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
78 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
83 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
84 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
85 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
86 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
87 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
91 * @brief Returns the current DMA Channel half transfer complete flag.
92 * @param __HANDLE__: DMA handle
93 * @retval The specified half transfer complete flag index.
95 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
96 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
97 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
102 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
103 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
104 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
105 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
106 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
110 * @brief Returns the current DMA Channel transfer error flag.
111 * @param __HANDLE__: DMA handle
112 * @retval The specified transfer error flag index.
114 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
115 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
116 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
121 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
122 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
123 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
124 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
125 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
129 * @brief Get the DMA Channel pending flags.
130 * @param __HANDLE__: DMA handle
131 * @param __FLAG__: Get the specified flag.
132 * This parameter can be any combination of the following values:
133 * @arg DMA_FLAG_TCx: Transfer complete flag
134 * @arg DMA_FLAG_HTx: Half transfer complete flag
135 * @arg DMA_FLAG_TEx: Transfer error flag
136 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
137 * @retval The state of FLAG (SET or RESET).
140 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
141 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
142 (DMA1->ISR & (__FLAG__)))
145 * @brief Clears the DMA Channel pending flags.
146 * @param __HANDLE__: DMA handle
147 * @param __FLAG__: specifies the flag to clear.
148 * This parameter can be any combination of the following values:
149 * @arg DMA_FLAG_TCx: Transfer complete flag
150 * @arg DMA_FLAG_HTx: Half transfer complete flag
151 * @arg DMA_FLAG_TEx: Transfer error flag
152 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
155 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
156 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
157 (DMA1->IFCR = (__FLAG__)))
165 /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
168 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
169 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
170 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
171 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
172 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
173 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
174 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
178 * @brief Returns the current DMA Channel half transfer complete flag.
179 * @param __HANDLE__: DMA handle
180 * @retval The specified half transfer complete flag index.
182 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
183 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
184 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
185 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
186 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
187 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
188 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
192 * @brief Returns the current DMA Channel transfer error flag.
193 * @param __HANDLE__: DMA handle
194 * @retval The specified transfer error flag index.
196 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
197 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
198 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
199 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
200 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
201 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
202 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
206 * @brief Get the DMA Channel pending flags.
207 * @param __HANDLE__: DMA handle
208 * @param __FLAG__: Get the specified flag.
209 * This parameter can be any combination of the following values:
210 * @arg DMA_FLAG_TCx: Transfer complete flag
211 * @arg DMA_FLAG_HTx: Half transfer complete flag
212 * @arg DMA_FLAG_TEx: Transfer error flag
213 * Where x can be 1_7 to select the DMA Channel flag.
214 * @retval The state of FLAG (SET or RESET).
217 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
220 * @brief Clears the DMA Channel pending flags.
221 * @param __HANDLE__: DMA handle
222 * @param __FLAG__: specifies the flag to clear.
223 * This parameter can be any combination of the following values:
224 * @arg DMA_FLAG_TCx: Transfer complete flag
225 * @arg DMA_FLAG_HTx: Half transfer complete flag
226 * @arg DMA_FLAG_TEx: Transfer error flag
227 * Where x can be 1_7 to select the DMA Channel flag.
230 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
252 #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
253 /* STM32F103xG || STM32F105xC || STM32F107xC */
255 #endif /* __STM32F1xx_HAL_DMA_H */
257 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/