2 ******************************************************************************
3 * @file stm32f1xx_hal_flash_ex.h
4 * @author MCD Application Team
6 * @date 15-December-2014
7 * @brief Header file of Flash HAL Extended module.
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F1xx_HAL_FLASH_EX_H
40 #define __STM32F1xx_HAL_FLASH_EX_H
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f1xx_hal_def.h"
49 /** @addtogroup STM32F1xx_HAL_Driver
53 /** @addtogroup FLASHEx
57 /** @addtogroup FLASHEx_Private_Constants
61 #define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFFF7E0)
62 #define OBR_REG_INDEX ((uint32_t)1)
63 #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP))
69 /** @addtogroup FLASHEx_Private_Macros
73 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE))
75 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA)))
77 #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE))
79 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1))
81 #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1))
83 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
85 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
87 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
89 #if defined(STM32F101xG) || defined(STM32F103xG)
90 #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET))
91 #endif /* STM32F101xG || STM32F103xG */
94 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)
95 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \
96 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF))
97 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
100 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
101 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \
102 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF) : \
103 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \
104 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF))))
105 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
108 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)
109 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFF) : \
110 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFF) : \
111 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF)))
112 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
115 #if defined(STM32F101xG) || defined(STM32F103xG)
116 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFF) : \
117 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFF))
118 #endif /* STM32F101xG || STM32F103xG */
120 /* Connectivity Line */
121 #if defined(STM32F105xC) || defined(STM32F107xC)
122 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF) : \
123 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \
124 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF)))
125 #endif /* STM32F105xC || STM32F107xC */
127 #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
129 #if defined(STM32F101xG) || defined(STM32F103xG)
130 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
131 ((BANK) == FLASH_BANK_2) || \
132 ((BANK) == FLASH_BANK_BOTH))
134 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
135 #endif /* STM32F101xG || STM32F103xG */
138 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)
139 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \
140 ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFF)))
142 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
145 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
146 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \
147 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? \
148 ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \
149 ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFF)))))
151 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
154 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)
155 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? \
156 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? \
157 ((ADDRESS) <= 0x0805FFFF) : ((ADDRESS) <= 0x0803FFFF))))
159 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
162 #if defined(STM32F101xG) || defined(STM32F103xG)
163 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? \
164 ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFF)))
166 #endif /* STM32F101xG || STM32F103xG */
168 /* Connectivity Line */
169 #if defined(STM32F105xC) || defined(STM32F107xC)
170 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? \
171 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \
172 ((ADDRESS) <= 0x0801FFFF) : ((ADDRESS) <= 0x0800FFFF))))
174 #endif /* STM32F105xC || STM32F107xC */
176 #if defined(STM32F100xB) || defined(STM32F100xE)
177 #define IS_FLASH_LATENCY(__LATENCY__) ((__LATENCY__) == FLASH_LATENCY_0)
181 #define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \
182 ((__LATENCY__) == FLASH_LATENCY_1) || \
183 ((__LATENCY__) == FLASH_LATENCY_2))
189 /* Exported types ------------------------------------------------------------*/
190 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
195 * @brief FLASH Erase structure definition
199 uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase.
200 This parameter can be a value of @ref FLASHEx_Type_Erase */
202 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
203 This parameter must be a value of @ref FLASHEx_Banks */
205 uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled
206 This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END
207 (x = 1 or 2 depending on devices)*/
209 uint32_t NbPages; /*!< NbPages: Number of pagess to be erased.
210 This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/
212 } FLASH_EraseInitTypeDef;
215 * @brief FLASH Options bytes program structure definition
219 uint32_t OptionType; /*!< OptionType: Option byte to be configured.
220 This parameter can be a value of @ref FLASHEx_OB_Type */
222 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation.
223 This parameter can be a value of @ref FLASHEx_OB_WRP_State */
225 uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected
226 This parameter can be a value of @ref FLASHEx_OB_Write_Protection */
228 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
229 This parameter must be a value of @ref FLASHEx_Banks */
231 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level..
232 This parameter can be a value of @ref FLASHEx_OB_Read_Protection */
234 #if defined(STM32F101xG) || defined(STM32F103xG)
235 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte:
236 IWDG / STOP / STDBY / BOOT1
237 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP,
238 @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */
240 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte:
242 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP,
243 @ref FLASHEx_OB_nRST_STDBY */
244 #endif /* STM32F101xG || STM32F103xG */
246 uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be prgrammed
247 This parameter can be a value of @ref FLASHEx_OB_Data_Address */
249 uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA
250 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
252 } FLASH_OBProgramInitTypeDef;
258 /* Exported constants --------------------------------------------------------*/
259 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
263 /** @defgroup FLASHEx_Constants FLASH Constants
267 /** @defgroup FLASHEx_Page_Size Page Size
270 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || \
271 defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
272 #define FLASH_PAGE_SIZE ((uint32_t)0x400)
273 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
274 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
276 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \
277 defined(STM32F101xG) || defined(STM32F103xG) || \
278 defined(STM32F105xC) || defined(STM32F107xC)
279 #define FLASH_PAGE_SIZE ((uint32_t)0x800)
280 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
281 /* STM32F101xG || STM32F103xG */
282 /* STM32F105xC || STM32F107xC */
288 /** @defgroup FLASHEx_Type_Erase Type Erase
291 #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/
292 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x02) /*!<Flash mass erase activation*/
298 /** @defgroup FLASH_Latency_Values Latency Values
301 #define FLASH_LATENCY_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */
303 #if defined(STM32F100xB) || defined(STM32F100xE)
304 /* Only Latency0 supported on value lines */
306 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_0 /*!< FLASH One Latency cycle */
307 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_1 /*!< FLASH Two Latency cycles */
314 /** @defgroup FLASHEx_Banks Banks
317 #if defined(STM32F101xG) || defined(STM32F103xG)
318 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
319 #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */
320 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */
323 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
333 /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants
337 /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State
340 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/
341 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/
347 /** @defgroup FLASHEx_OB_Type Option Bytes Type
350 #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/
351 #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/
352 #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/
353 #define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/
360 /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection
363 #define OB_RDP_LEVEL_0 ((uint8_t)0xA5)
364 #define OB_RDP_LEVEL_1 ((uint8_t)0x00)
369 /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP
372 #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */
373 #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */
378 /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY
381 #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */
382 #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */
387 /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog
390 #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */
391 #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */
396 #if defined(STM32F101xG) || defined(STM32F103xG)
397 /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1
400 #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */
401 #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */
405 #endif /* STM32F101xG || STM32F103xG */
407 /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address
410 #define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804)
411 #define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806)
416 /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection
419 /* STM32 Low and Medium density devices */
420 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || \
421 defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
422 #define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /*!< Write protection of page 0 to 3 */
423 #define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /*!< Write protection of page 4 to 7 */
424 #define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /*!< Write protection of page 8 to 11 */
425 #define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /*!< Write protection of page 12 to 15 */
426 #define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /*!< Write protection of page 16 to 19 */
427 #define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /*!< Write protection of page 20 to 23 */
428 #define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /*!< Write protection of page 24 to 27 */
429 #define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /*!< Write protection of page 28 to 31 */
430 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
431 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
433 /* STM32 Medium-density devices */
434 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
435 #define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /*!< Write protection of page 32 to 35 */
436 #define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /*!< Write protection of page 36 to 39 */
437 #define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /*!< Write protection of page 40 to 43 */
438 #define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /*!< Write protection of page 44 to 47 */
439 #define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /*!< Write protection of page 48 to 51 */
440 #define OB_WRP_PAGES52TO55 ((uint32_t)0x00002000) /*!< Write protection of page 52 to 55 */
441 #define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /*!< Write protection of page 56 to 59 */
442 #define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /*!< Write protection of page 60 to 63 */
443 #define OB_WRP_PAGES64TO67 ((uint32_t)0x00010000) /*!< Write protection of page 64 to 67 */
444 #define OB_WRP_PAGES68TO71 ((uint32_t)0x00020000) /*!< Write protection of page 68 to 71 */
445 #define OB_WRP_PAGES72TO75 ((uint32_t)0x00040000) /*!< Write protection of page 72 to 75 */
446 #define OB_WRP_PAGES76TO79 ((uint32_t)0x00080000) /*!< Write protection of page 76 to 79 */
447 #define OB_WRP_PAGES80TO83 ((uint32_t)0x00100000) /*!< Write protection of page 80 to 83 */
448 #define OB_WRP_PAGES84TO87 ((uint32_t)0x00200000) /*!< Write protection of page 84 to 87 */
449 #define OB_WRP_PAGES88TO91 ((uint32_t)0x00400000) /*!< Write protection of page 88 to 91 */
450 #define OB_WRP_PAGES92TO95 ((uint32_t)0x00800000) /*!< Write protection of page 92 to 95 */
451 #define OB_WRP_PAGES96TO99 ((uint32_t)0x01000000) /*!< Write protection of page 96 to 99 */
452 #define OB_WRP_PAGES100TO103 ((uint32_t)0x02000000) /*!< Write protection of page 100 to 103 */
453 #define OB_WRP_PAGES104TO107 ((uint32_t)0x04000000) /*!< Write protection of page 104 to 107 */
454 #define OB_WRP_PAGES108TO111 ((uint32_t)0x08000000) /*!< Write protection of page 108 to 111 */
455 #define OB_WRP_PAGES112TO115 ((uint32_t)0x10000000) /*!< Write protection of page 112 to 115 */
456 #define OB_WRP_PAGES116TO119 ((uint32_t)0x20000000) /*!< Write protection of page 115 to 119 */
457 #define OB_WRP_PAGES120TO123 ((uint32_t)0x40000000) /*!< Write protection of page 120 to 123 */
458 #define OB_WRP_PAGES124TO127 ((uint32_t)0x80000000) /*!< Write protection of page 124 to 127 */
459 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
462 /* STM32 High-density, XL-density and Connectivity line devices */
463 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || \
464 defined(STM32F101xG) || defined(STM32F103xG) || \
465 defined(STM32F105xC) || defined(STM32F107xC)
466 #define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /*!< Write protection of page 0 TO 1 */
467 #define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /*!< Write protection of page 2 TO 3 */
468 #define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /*!< Write protection of page 4 TO 5 */
469 #define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /*!< Write protection of page 6 TO 7 */
470 #define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /*!< Write protection of page 8 TO 9 */
471 #define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /*!< Write protection of page 10 TO 11 */
472 #define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /*!< Write protection of page 12 TO 13 */
473 #define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /*!< Write protection of page 14 TO 15 */
474 #define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /*!< Write protection of page 16 TO 17 */
475 #define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /*!< Write protection of page 18 TO 19 */
476 #define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /*!< Write protection of page 20 TO 21 */
477 #define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /*!< Write protection of page 22 TO 23 */
478 #define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /*!< Write protection of page 24 TO 25 */
479 #define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /*!< Write protection of page 26 TO 27 */
480 #define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /*!< Write protection of page 28 TO 29 */
481 #define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /*!< Write protection of page 30 TO 31 */
482 #define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /*!< Write protection of page 32 TO 33 */
483 #define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /*!< Write protection of page 34 TO 35 */
484 #define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /*!< Write protection of page 36 TO 37 */
485 #define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /*!< Write protection of page 38 TO 39 */
486 #define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /*!< Write protection of page 40 TO 41 */
487 #define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /*!< Write protection of page 42 TO 43 */
488 #define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /*!< Write protection of page 44 TO 45 */
489 #define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /*!< Write protection of page 46 TO 47 */
490 #define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /*!< Write protection of page 48 TO 49 */
491 #define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /*!< Write protection of page 50 TO 51 */
492 #define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /*!< Write protection of page 52 TO 53 */
493 #define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /*!< Write protection of page 54 TO 55 */
494 #define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /*!< Write protection of page 56 TO 57 */
495 #define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /*!< Write protection of page 58 TO 59 */
496 #define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /*!< Write protection of page 60 TO 61 */
497 #define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 127 */
498 #define OB_WRP_PAGES62TO255 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 255 */
499 #define OB_WRP_PAGES62TO511 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 511 */
500 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */
501 /* STM32F101xG || STM32F103xG */
502 /* STM32F105xC || STM32F107xC */
504 #define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */
507 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)
508 #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF)
509 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */
512 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)
513 #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF)
514 #define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00)
515 #define OB_WRP_PAGES64TO95MASK ((uint32_t)0x00FF0000)
516 #define OB_WRP_PAGES96TO127MASK ((uint32_t)0xFF000000)
517 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/
520 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)
521 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
522 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
523 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
524 #define OB_WRP_PAGES48TO255MASK ((uint32_t)0xFF000000)
525 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */
528 #if defined(STM32F101xG) || defined(STM32F103xG)
529 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
530 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
531 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
532 #define OB_WRP_PAGES48TO511MASK ((uint32_t)0xFF000000)
533 #endif /* STM32F101xG || STM32F103xG */
535 /* Connectivity line devices */
536 #if defined(STM32F105xC) || defined(STM32F107xC)
537 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
538 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
539 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
540 #define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000)
541 #endif /* STM32F105xC || STM32F107xC */
551 /** @addtogroup FLASHEx_Constants
555 /** @defgroup FLASH_Flag_definition Flag definition
556 * @brief Flag definition
559 #if defined(STM32F101xG) || defined(STM32F103xG)
560 #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */
561 #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */
562 #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */
563 #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */
565 #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */
566 #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */
567 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */
568 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */
570 #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16) /*!< FLASH Bank2 Busy flag */
571 #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16) /*!< FLASH Bank2 Programming error flag */
572 #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16) /*!< FLASH Bank2 Write protected error flag */
573 #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16) /*!< FLASH Bank2 End of Operation flag */
577 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
578 #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */
579 #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */
580 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */
583 #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8 | FLASH_OBR_OPTERR)) /*!< Option Byte Error */
588 /** @defgroup FLASH_Interrupt_definition Interrupt definition
589 * @brief FLASH Interrupt definition
592 #if defined(STM32F101xG) || defined(STM32F103xG)
593 #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */
594 #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */
596 #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */
597 #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */
599 #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16) /*!< End of FLASH Operation Interrupt source Bank2 */
600 #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16) /*!< Error Interrupt source Bank2 */
604 #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */
605 #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */
622 /* Exported macro ------------------------------------------------------------*/
623 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros
627 #if defined(STM32F100xB) || defined(STM32F100xE)
628 /* Macros not available */
630 /** @defgroup FLASH_Latency Latency configuration
631 * @brief macros to set the FLASH latency
636 * @brief Set the FLASH Latency.
637 * @param __LATENCY__: FLASH Latency
638 * This parameter can be one of the following values:
639 * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle
640 * @arg FLASH_LATENCY_1: FLASH One Latency cycle
641 * @arg FLASH_LATENCY_2: FLASH Two Latency cycle
644 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (FLASH->ACR = (FLASH->ACR&(~FLASH_ACR_LATENCY)) | (__LATENCY__))
646 /** @brief Get the FLASH Latency.
647 * @retval FLASH Latency
648 * This parameter can be one of the following values:
649 * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle
650 * @arg FLASH_LATENCY_1: FLASH One Latency cycle
651 * @arg FLASH_LATENCY_2: FLASH Two Latency cycle
653 #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
659 /** @defgroup FLASH_Prefetch Prefetch activation or deactivation
660 * @brief macros to set the FLASH Prefetch
665 * @brief Enable the FLASH prefetch buffer.
668 #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTBE)
671 * @brief Disable the FLASH prefetch buffer.
674 #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTBE))
682 /** @defgroup FLASH_Interrupt Interrupt
683 * @brief macros to handle FLASH interrupts
687 #if defined(STM32F101xG) || defined(STM32F103xG)
689 * @brief Enable the specified FLASH interrupt.
690 * @param __INTERRUPT__ : FLASH interrupt
691 * This parameter can be any combination of the following values:
692 * @arg FLASH_IT_EOP_BANK1: End of FLASH Operation Interrupt on bank1
693 * @arg FLASH_IT_ERR_BANK1: Error Interrupt on bank1
694 * @arg FLASH_IT_EOP_BANK2: End of FLASH Operation Interrupt on bank2
695 * @arg FLASH_IT_ERR_BANK2: Error Interrupt on bank2
698 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \
699 /* Enable Bank1 IT */ \
700 SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \
701 /* Enable Bank2 IT */ \
702 SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \
706 * @brief Disable the specified FLASH interrupt.
707 * @param __INTERRUPT__ : FLASH interrupt
708 * This parameter can be any combination of the following values:
709 * @arg FLASH_IT_EOP_BANK1: End of FLASH Operation Interrupt on bank1
710 * @arg FLASH_IT_ERR_BANK1: Error Interrupt on bank1
711 * @arg FLASH_IT_EOP_BANK2: End of FLASH Operation Interrupt on bank2
712 * @arg FLASH_IT_ERR_BANK2: Error Interrupt on bank2
715 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \
716 /* Disable Bank1 IT */ \
717 CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \
718 /* Disable Bank2 IT */ \
719 CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \
723 * @brief Get the specified FLASH flag status.
724 * @param __FLAG__: specifies the FLASH flag to check.
725 * This parameter can be one of the following values:
726 * @arg FLASH_FLAG_EOP_BANK1 : FLASH End of Operation flag on bank1
727 * @arg FLASH_FLAG_WRPERR_BANK1: FLASH Write protected error flag on bank1
728 * @arg FLASH_FLAG_PGERR_BANK1 : FLASH Programming error flag on bank1
729 * @arg FLASH_FLAG_BSY_BANK1 : FLASH Busy flag on bank1
730 * @arg FLASH_FLAG_EOP_BANK2 : FLASH End of Operation flag on bank2
731 * @arg FLASH_FLAG_WRPERR_BANK2: FLASH Write protected error flag on bank2
732 * @arg FLASH_FLAG_PGERR_BANK2 : FLASH Programming error flag on bank2
733 * @arg FLASH_FLAG_BSY_BANK2 : FLASH Busy flag on bank2
734 * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match
735 * @retval The new state of __FLAG__ (SET or RESET).
737 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \
738 (FLASH->OBR & FLASH_OBR_OPTERR) : \
739 ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \
740 (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \
741 (FLASH->SR2 & ((__FLAG__) >> 16))))
744 * @brief Clear the specified FLASH flag.
745 * @param __FLAG__: specifies the FLASH flags to clear.
746 * This parameter can be any combination of the following values:
747 * @arg FLASH_FLAG_EOP_BANK1 : FLASH End of Operation flag on bank1
748 * @arg FLASH_FLAG_WRPERR_BANK1: FLASH Write protected error flag on bank1
749 * @arg FLASH_FLAG_PGERR_BANK1 : FLASH Programming error flag on bank1
750 * @arg FLASH_FLAG_BSY_BANK1 : FLASH Busy flag on bank1
751 * @arg FLASH_FLAG_EOP_BANK2 : FLASH End of Operation flag on bank2
752 * @arg FLASH_FLAG_WRPERR_BANK2: FLASH Write protected error flag on bank2
753 * @arg FLASH_FLAG_PGERR_BANK2 : FLASH Programming error flag on bank2
754 * @arg FLASH_FLAG_BSY_BANK2 : FLASH Busy flag on bank2
755 * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match
758 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \
759 /* Clear FLASH_FLAG_OPTVERR flag */ \
760 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \
762 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \
765 /* Clear Flag in Bank1 */ \
766 if (((__FLAG__) & SR_FLAG_MASK) != RESET) \
768 FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \
770 /* Clear Flag in Bank2 */ \
771 if (((__FLAG__) >> 16) != RESET) \
773 FLASH->SR2 = ((__FLAG__) >> 16); \
779 * @brief Enable the specified FLASH interrupt.
780 * @param __INTERRUPT__ : FLASH interrupt
781 * This parameter can be any combination of the following values:
782 * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
783 * @arg FLASH_IT_ERR: Error Interrupt
786 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__))
789 * @brief Disable the specified FLASH interrupt.
790 * @param __INTERRUPT__ : FLASH interrupt
791 * This parameter can be any combination of the following values:
792 * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
793 * @arg FLASH_IT_ERR: Error Interrupt
796 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__))
799 * @brief Get the specified FLASH flag status.
800 * @param __FLAG__: specifies the FLASH flag to check.
801 * This parameter can be one of the following values:
802 * @arg FLASH_FLAG_EOP : FLASH End of Operation flag
803 * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
804 * @arg FLASH_FLAG_PGERR : FLASH Programming error flag
805 * @arg FLASH_FLAG_BSY : FLASH Busy flag
806 * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match
807 * @retval The new state of __FLAG__ (SET or RESET).
809 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \
810 (FLASH->OBR & FLASH_OBR_OPTERR) : \
811 (FLASH->SR & (__FLAG__)))
813 * @brief Clear the specified FLASH flag.
814 * @param __FLAG__: specifies the FLASH flags to clear.
815 * This parameter can be any combination of the following values:
816 * @arg FLASH_FLAG_EOP : FLASH End of Operation flag
817 * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
818 * @arg FLASH_FLAG_PGERR : FLASH Programming error flag
819 * @arg FLASH_FLAG_OPTVERR : Loaded OB and its complement do not match
822 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \
823 /* Clear FLASH_FLAG_OPTVERR flag */ \
824 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \
826 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \
829 /* Clear Flag in Bank1 */ \
830 FLASH->SR = (__FLAG__); \
844 /* Exported functions --------------------------------------------------------*/
845 /** @addtogroup FLASHEx_Exported_Functions
849 /** @addtogroup FLASHEx_Exported_Functions_Group1
852 /* IO operation functions *****************************************************/
853 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
854 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
860 /** @addtogroup FLASHEx_Exported_Functions_Group2
863 /* Peripheral Control functions ***********************************************/
864 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void);
865 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
866 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
887 #endif /* __STM32F1xx_HAL_FLASH_EX_H */
889 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/