2 ******************************************************************************
3 * @file stm32f1xx_hal_i2s.c
4 * @author MCD Application Team
6 * @date 15-December-2014
7 * @brief I2S HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Integrated Interchip Sound (I2S) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral State and Errors functions
14 ===============================================================================
15 ##### How to use this driver #####
16 ===============================================================================
18 The I2S HAL driver can be used as follow:
20 (#) Declare a I2S_HandleTypeDef handle structure.
21 (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
22 (##) Enable the SPIx interface clock.
23 (##) I2S pins configuration:
24 (+++) Enable the clock for the I2S GPIOs.
25 (+++) Configure these I2S pins as alternate function.
26 (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
27 and HAL_I2S_Receive_IT() APIs).
28 (+++) Configure the I2Sx interrupt priority.
29 (+++) Enable the NVIC I2S IRQ handle.
30 (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
31 and HAL_I2S_Receive_DMA() APIs:
32 (+++) Declare a DMA handle structure for the Tx/Rx Channel.
33 (+++) Enable the DMAx interface clock.
34 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
35 (+++) Configure the DMA Tx/Rx Channel.
36 (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
37 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
40 (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
41 using HAL_I2S_Init() function.
43 -@- The specific I2S interrupts (Transmission complete interrupt,
44 RXNE interrupt and Error Interrupts) will be managed using the macros
45 __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
46 -@- The I2SxCLK source is the system clock (provided by the HSI, the HSE or the PLL, and sourcing the AHB clock).
47 For connectivity line devices, the I2SxCLK source can be either SYSCLK or the PLL3 VCO (2 x PLL3CLK) clock
48 in order to achieve the maximum accuracy.
49 -@- Make sure that either:
50 (+@) External clock source is configured after setting correctly
51 the define constant HSE_VALUE in the stm32f1xx_hal_conf.h file.
53 (#) Three mode of operations are available within this driver :
55 *** Polling mode IO operation ***
56 =================================
58 (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
59 (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
61 *** Interrupt mode IO operation ***
62 ===================================
64 (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
65 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
66 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
67 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
68 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
69 (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
70 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
71 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
72 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
73 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
74 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
75 add his own code by customization of function pointer HAL_I2S_ErrorCallback
77 *** DMA mode IO operation ***
78 ==============================
80 (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
81 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
82 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
83 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
84 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
85 (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
86 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
87 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
88 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
89 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
90 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
91 add his own code by customization of function pointer HAL_I2S_ErrorCallback
92 (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
93 (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
94 (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
96 *** I2S HAL driver macros list ***
97 =============================================
99 Below the list of most used macros in USART HAL driver.
101 (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
102 (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
103 (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
104 (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
105 (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
108 (@) You can refer to the I2S HAL driver header file for more useful macros
111 *** I2C Workarounds linked to Silicon Limitation ***
112 ====================================================
114 (@) Only the 16-bit mode with no data extension can be used when the I2S
115 is in Master and used the PCM long synchronization mode.
119 ******************************************************************************
122 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
124 * Redistribution and use in source and binary forms, with or without modification,
125 * are permitted provided that the following conditions are met:
126 * 1. Redistributions of source code must retain the above copyright notice,
127 * this list of conditions and the following disclaimer.
128 * 2. Redistributions in binary form must reproduce the above copyright notice,
129 * this list of conditions and the following disclaimer in the documentation
130 * and/or other materials provided with the distribution.
131 * 3. Neither the name of STMicroelectronics nor the names of its contributors
132 * may be used to endorse or promote products derived from this software
133 * without specific prior written permission.
135 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
136 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
137 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
138 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
139 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
140 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
141 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
142 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
143 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
146 ******************************************************************************
149 /* Includes ------------------------------------------------------------------*/
150 #include "stm32f1xx_hal.h"
152 /** @addtogroup STM32F1xx_HAL_Driver
156 #ifdef HAL_I2S_MODULE_ENABLED
157 #if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)
159 /** @defgroup I2S I2S
160 * @brief I2S HAL module driver
164 /* Private typedef -----------------------------------------------------------*/
165 /* Private define ------------------------------------------------------------*/
166 /* Private macro -------------------------------------------------------------*/
167 /* Private variables ---------------------------------------------------------*/
168 /* Private function prototypes -----------------------------------------------*/
169 /** @addtogroup I2S_Private_Functions I2S Private Functions
172 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
173 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
174 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
175 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
176 static void I2S_DMAError(DMA_HandleTypeDef *hdma);
177 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
178 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
179 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
184 /* Exported functions ---------------------------------------------------------*/
185 /** @defgroup I2S_Exported_Functions I2S Exported Functions
189 /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
190 * @brief Initialization and Configuration functions
193 ===============================================================================
194 ##### Initialization and de-initialization functions #####
195 ===============================================================================
196 [..] This subsection provides a set of functions allowing to initialize and
197 de-initialiaze the I2Sx peripheral in simplex mode:
199 (+) User must Implement HAL_I2S_MspInit() function in which he configures
200 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
202 (+) Call the function HAL_I2S_Init() to configure the selected device with
203 the selected configuration:
211 (+) Call the function HAL_I2S_DeInit() to restore the default configuration
212 of the selected I2Sx periperal.
218 * @brief Initializes the I2S according to the specified parameters
219 * in the I2S_InitTypeDef and create the associated handle.
220 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
221 * the configuration information for I2S module
224 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
226 uint32_t i2sdiv = 2, i2sodd = 0, packetlength = 1;
227 uint32_t tmp = 0, i2sclk = 0;
229 /* Check the I2S handle allocation */
235 /* Check the I2S parameters */
236 assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
237 assert_param(IS_I2S_MODE(hi2s->Init.Mode));
238 assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
239 assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
240 assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
241 assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
242 assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
244 if(hi2s->State == HAL_I2S_STATE_RESET)
246 /* Allocate lock resource and initialize it */
247 hi2s-> Lock = HAL_UNLOCKED;
249 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
250 HAL_I2S_MspInit(hi2s);
253 hi2s->State = HAL_I2S_STATE_BUSY;
255 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
256 if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
258 i2sodd = (uint32_t)0;
259 i2sdiv = (uint32_t)2;
261 /* If the requested audio frequency is not the default, compute the prescaler */
264 /* Check the frame length (For the Prescaler computing) *******************/
265 if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
267 /* Packet length is 16 bits */
272 /* Packet length is 32 bits */
276 if(hi2s->Instance == SPI2)
278 /* Get the source clock value: based on SPI2 Instance */
279 i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S2);
281 else if(hi2s->Instance == SPI3)
283 /* Get the source clock value: based on SPI3 Instance */
284 i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S3);
288 /* Get the source clock value: based on System Clock value */
289 i2sclk = HAL_RCC_GetSysClockFreq();
296 /* Compute the Real divider depending on the MCLK output state, with a floating point */
297 if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
299 /* MCLK output is enabled */
300 tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
304 /* MCLK output is disabled */
305 tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
308 /* Remove the flatting point */
311 /* Check the parity of the divider */
312 i2sodd = (uint32_t)(tmp & (uint32_t)1);
314 /* Compute the i2sdiv prescaler */
315 i2sdiv = (uint32_t)((tmp - i2sodd) / 2);
317 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
318 i2sodd = (uint32_t) (i2sodd << 8);
321 /* Test if the divider is 1 or 0 or greater than 0xFF */
322 if((i2sdiv < 2) || (i2sdiv > 0xFF))
324 /* Set the default values */
329 /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
330 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
331 /* And configure the I2S with the I2S_InitStruct values */
332 MODIFY_REG( hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN |\
333 SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD |\
334 SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG |\
335 SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD),\
336 (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode |\
337 hi2s->Init.Standard | hi2s->Init.DataFormat |\
340 /* Write to SPIx I2SPR register the computed value */
341 hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
343 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
344 hi2s->State= HAL_I2S_STATE_READY;
350 * @brief DeInitializes the I2S peripheral
351 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
352 * the configuration information for I2S module
355 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
357 /* Check the I2S handle allocation */
363 hi2s->State = HAL_I2S_STATE_BUSY;
365 /* Disable the I2S Peripheral Clock */
366 __HAL_I2S_DISABLE(hi2s);
368 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
369 HAL_I2S_MspDeInit(hi2s);
371 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
372 hi2s->State = HAL_I2S_STATE_RESET;
381 * @brief I2S MSP Init
382 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
383 * the configuration information for I2S module
386 __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
388 /* NOTE : This function Should not be modified, when the callback is needed,
389 the HAL_I2S_MspInit could be implemented in the user file
394 * @brief I2S MSP DeInit
395 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
396 * the configuration information for I2S module
399 __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
401 /* NOTE : This function Should not be modified, when the callback is needed,
402 the HAL_I2S_MspDeInit could be implemented in the user file
410 /** @defgroup I2S_Exported_Functions_Group2 IO operation functions
411 * @brief Data transfers functions
414 ===============================================================================
415 ##### IO operation functions #####
416 ===============================================================================
418 This subsection provides a set of functions allowing to manage the I2S data
421 (#) There are two modes of transfer:
422 (++) Blocking mode : The communication is performed in the polling mode.
423 The status of all data processing is returned by the same function
424 after finishing transfer.
425 (++) No-Blocking mode : The communication is performed using Interrupts
426 or DMA. These functions return the status of the transfer startup.
427 The end of the data processing will be indicated through the
428 dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
431 (#) Blocking mode functions are :
432 (++) HAL_I2S_Transmit()
433 (++) HAL_I2S_Receive()
435 (#) No-Blocking mode functions with Interrupt are :
436 (++) HAL_I2S_Transmit_IT()
437 (++) HAL_I2S_Receive_IT()
439 (#) No-Blocking mode functions with DMA are :
440 (++) HAL_I2S_Transmit_DMA()
441 (++) HAL_I2S_Receive_DMA()
443 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
444 (++) HAL_I2S_TxCpltCallback()
445 (++) HAL_I2S_RxCpltCallback()
446 (++) HAL_I2S_ErrorCallback()
453 * @brief Transmit an amount of data in blocking mode
454 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
455 * the configuration information for I2S module
456 * @param pData: a 16-bit pointer to data buffer.
457 * @param Size: number of data sample to be sent:
458 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
459 * configuration phase, the Size parameter means the number of 16-bit data length
460 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
461 * the Size parameter means the number of 16-bit data length.
462 * @param Timeout: Timeout duration
463 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
464 * between Master and Slave(example: audio streaming).
467 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
469 if((pData == NULL ) || (Size == 0))
477 if(hi2s->State == HAL_I2S_STATE_READY)
479 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
480 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
482 hi2s->TxXferSize = (Size << 1);
483 hi2s->TxXferCount = (Size << 1);
487 hi2s->TxXferSize = Size;
488 hi2s->TxXferCount = Size;
491 /* Set state and reset error code */
492 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
493 hi2s->State = HAL_I2S_STATE_BUSY_TX;
494 hi2s->pTxBuffPtr = pData;
496 /* Check if the I2S is already enabled */
497 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
499 /* Enable I2S peripheral */
500 __HAL_I2S_ENABLE(hi2s);
503 while(hi2s->TxXferCount > 0)
505 /* Wait until TXE flag is set */
506 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
510 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
513 /* Check if an underrun occurs */
514 if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
516 /* Set the I2S State ready */
517 hi2s->State = HAL_I2S_STATE_READY;
519 /* Process Unlocked */
522 /* Set the error code and execute error callback*/
523 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
528 /* Wait until TXE flag is set, to confirm the end of the transcation */
529 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
533 /* Wait until Busy flag is reset */
534 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
539 hi2s->State = HAL_I2S_STATE_READY;
541 /* Process Unlocked */
548 /* Process Unlocked */
555 * @brief Receive an amount of data in blocking mode
556 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
557 * the configuration information for I2S module
558 * @param pData: a 16-bit pointer to data buffer.
559 * @param Size: number of data sample to be sent:
560 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
561 * configuration phase, the Size parameter means the number of 16-bit data length
562 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
563 * the Size parameter means the number of 16-bit data length.
564 * @param Timeout: Timeout duration
565 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
566 * between Master and Slave(example: audio streaming).
567 * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
568 * in continouse way and as the I2S is not disabled at the end of the I2S transaction.
571 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
573 if((pData == NULL ) || (Size == 0))
581 if(hi2s->State == HAL_I2S_STATE_READY)
583 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
584 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
586 hi2s->RxXferSize = (Size << 1);
587 hi2s->RxXferCount = (Size << 1);
591 hi2s->RxXferSize = Size;
592 hi2s->RxXferCount = Size;
595 /* Set state and reset error code */
596 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
597 hi2s->State = HAL_I2S_STATE_BUSY_RX;
598 hi2s->pRxBuffPtr = pData;
600 /* Check if the I2S is already enabled */
601 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
603 /* Enable I2S peripheral */
604 __HAL_I2S_ENABLE(hi2s);
608 while(hi2s->RxXferCount > 0)
610 /* Wait until RXNE flag is reset */
611 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
616 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
619 /* Check if an overrun occurs */
620 if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
622 /* Set the I2S State ready */
623 hi2s->State = HAL_I2S_STATE_READY;
625 /* Process Unlocked */
628 /* Set the error code and execute error callback*/
629 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
634 hi2s->State = HAL_I2S_STATE_READY;
636 /* Process Unlocked */
643 /* Process Unlocked */
650 * @brief Transmit an amount of data in non-blocking mode with Interrupt
651 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
652 * the configuration information for I2S module
653 * @param pData: a 16-bit pointer to data buffer.
654 * @param Size: number of data sample to be sent:
655 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
656 * configuration phase, the Size parameter means the number of 16-bit data length
657 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
658 * the Size parameter means the number of 16-bit data length.
659 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
660 * between Master and Slave(example: audio streaming).
663 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
665 if((pData == NULL) || (Size == 0))
673 if(hi2s->State == HAL_I2S_STATE_READY)
675 hi2s->pTxBuffPtr = pData;
676 hi2s->State = HAL_I2S_STATE_BUSY_TX;
677 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
679 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
680 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
682 hi2s->TxXferSize = (Size << 1);
683 hi2s->TxXferCount = (Size << 1);
687 hi2s->TxXferSize = Size;
688 hi2s->TxXferCount = Size;
691 /* Enable TXE and ERR interrupt */
692 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
694 /* Check if the I2S is already enabled */
695 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
697 /* Enable I2S peripheral */
698 __HAL_I2S_ENABLE(hi2s);
701 /* Process Unlocked */
708 /* Process Unlocked */
715 * @brief Receive an amount of data in non-blocking mode with Interrupt
716 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
717 * the configuration information for I2S module
718 * @param pData: a 16-bit pointer to the Receive data buffer.
719 * @param Size: number of data sample to be sent:
720 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
721 * configuration phase, the Size parameter means the number of 16-bit data length
722 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
723 * the Size parameter means the number of 16-bit data length.
724 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
725 * between Master and Slave(example: audio streaming).
726 * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
727 * between Master and Slave otherwise the I2S interrupt should be optimized.
730 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
732 if((pData == NULL) || (Size == 0))
740 if(hi2s->State == HAL_I2S_STATE_READY)
742 hi2s->pRxBuffPtr = pData;
743 hi2s->State = HAL_I2S_STATE_BUSY_RX;
744 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
746 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
747 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
749 hi2s->RxXferSize = (Size << 1);
750 hi2s->RxXferCount = (Size << 1);
754 hi2s->RxXferSize = Size;
755 hi2s->RxXferCount = Size;
758 /* Enable RXNE and ERR interrupt */
759 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
761 /* Check if the I2S is already enabled */
762 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
764 /* Enable I2S peripheral */
765 __HAL_I2S_ENABLE(hi2s);
768 /* Process Unlocked */
775 /* Process Unlocked */
782 * @brief Transmit an amount of data in non-blocking mode with DMA
783 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
784 * the configuration information for I2S module
785 * @param pData: a 16-bit pointer to the Transmit data buffer.
786 * @param Size: number of data sample to be sent:
787 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
788 * configuration phase, the Size parameter means the number of 16-bit data length
789 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
790 * the Size parameter means the number of 16-bit data length.
791 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
792 * between Master and Slave(example: audio streaming).
795 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
797 if((pData == NULL) || (Size == 0))
805 if(hi2s->State == HAL_I2S_STATE_READY)
807 hi2s->pTxBuffPtr = pData;
808 hi2s->State = HAL_I2S_STATE_BUSY_TX;
809 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
811 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
812 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
814 hi2s->TxXferSize = (Size << 1);
815 hi2s->TxXferCount = (Size << 1);
819 hi2s->TxXferSize = Size;
820 hi2s->TxXferCount = Size;
823 /* Set the I2S Tx DMA Half transfert complete callback */
824 hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
826 /* Set the I2S Tx DMA transfert complete callback */
827 hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
829 /* Set the DMA error callback */
830 hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
832 /* Enable the Tx DMA Channel */
833 HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
835 /* Check if the I2S is already enabled */
836 if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
838 /* Enable I2S peripheral */
839 __HAL_I2S_ENABLE(hi2s);
842 /* Check if the I2S Tx request is already enabled */
843 if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN))
845 /* Enable Tx DMA Request */
846 SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
849 /* Process Unlocked */
856 /* Process Unlocked */
863 * @brief Receive an amount of data in non-blocking mode with DMA
864 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
865 * the configuration information for I2S module
866 * @param pData: a 16-bit pointer to the Receive data buffer.
867 * @param Size: number of data sample to be sent:
868 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
869 * configuration phase, the Size parameter means the number of 16-bit data length
870 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
871 * the Size parameter means the number of 16-bit data length.
872 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
873 * between Master and Slave(example: audio streaming).
876 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
878 if((pData == NULL) || (Size == 0))
886 if(hi2s->State == HAL_I2S_STATE_READY)
888 hi2s->pRxBuffPtr = pData;
889 hi2s->State = HAL_I2S_STATE_BUSY_RX;
890 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
892 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
893 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
895 hi2s->RxXferSize = (Size << 1);
896 hi2s->RxXferCount = (Size << 1);
900 hi2s->RxXferSize = Size;
901 hi2s->RxXferCount = Size;
905 /* Set the I2S Rx DMA Half transfert complete callback */
906 hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
908 /* Set the I2S Rx DMA transfert complete callback */
909 hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
911 /* Set the DMA error callback */
912 hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
914 /* Check if Master Receiver mode is selected */
915 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
917 /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
918 access to the SPI_SR register. */
919 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
922 /* Enable the Rx DMA Channel */
923 HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize);
925 /* Check if the I2S is already enabled */
926 if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
928 /* Enable I2S peripheral */
929 __HAL_I2S_ENABLE(hi2s);
932 /* Check if the I2S Rx request is already enabled */
933 if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN))
935 /* Enable Rx DMA Request */
936 SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
939 /* Process Unlocked */
946 /* Process Unlocked */
953 * @brief Pauses the audio stream playing from the Media.
954 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
955 * the configuration information for I2S module
958 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
963 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
965 /* Disable the I2S DMA Tx request */
966 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
968 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
970 /* Disable the I2S DMA Rx request */
971 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
974 /* Process Unlocked */
981 * @brief Resumes the audio stream playing from the Media.
982 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
983 * the configuration information for I2S module
986 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
991 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
993 /* Enable the I2S DMA Tx request */
994 SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
996 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
998 /* Enable the I2S DMA Rx request */
999 SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1002 /* If the I2S peripheral is still not enabled, enable it */
1003 if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
1005 /* Enable I2S peripheral */
1006 __HAL_I2S_ENABLE(hi2s);
1009 /* Process Unlocked */
1016 * @brief Resumes the audio stream playing from the Media.
1017 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1018 * the configuration information for I2S module
1019 * @retval HAL status
1021 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
1023 /* Process Locked */
1026 /* Disable the I2S Tx/Rx DMA requests */
1027 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
1028 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1030 /* Abort the I2S DMA Channel tx */
1031 if(hi2s->hdmatx != NULL)
1033 /* Disable the I2S DMA channel */
1034 __HAL_DMA_DISABLE(hi2s->hdmatx);
1035 HAL_DMA_Abort(hi2s->hdmatx);
1037 /* Abort the I2S DMA Channel rx */
1038 if(hi2s->hdmarx != NULL)
1040 /* Disable the I2S DMA channel */
1041 __HAL_DMA_DISABLE(hi2s->hdmarx);
1042 HAL_DMA_Abort(hi2s->hdmarx);
1045 /* Disable I2S peripheral */
1046 __HAL_I2S_DISABLE(hi2s);
1048 hi2s->State = HAL_I2S_STATE_READY;
1050 /* Process Unlocked */
1057 * @brief This function handles I2S interrupt request.
1058 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1059 * the configuration information for I2S module
1062 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
1064 uint32_t i2ssr = hi2s->Instance->SR;
1066 /* I2S in mode Receiver ------------------------------------------------*/
1067 if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) &&
1068 ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
1070 I2S_Receive_IT(hi2s);
1074 /* I2S in mode Tramitter -----------------------------------------------*/
1075 if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
1077 I2S_Transmit_IT(hi2s);
1081 /* I2S interrupt error -------------------------------------------------*/
1082 if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)
1084 /* I2S Overrun error interrupt occured ---------------------------------*/
1085 if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR)
1087 /* Disable RXNE and ERR interrupt */
1088 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
1090 /* Set the error code and execute error callback*/
1091 SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
1094 /* I2S Underrun error interrupt occured --------------------------------*/
1095 if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR)
1097 /* Disable TXE and ERR interrupt */
1098 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
1100 /* Set the error code and execute error callback*/
1101 SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
1104 /* Set the I2S State ready */
1105 hi2s->State = HAL_I2S_STATE_READY;
1106 /* Call the Error Callback */
1107 HAL_I2S_ErrorCallback(hi2s);
1112 * @brief Tx Transfer Half completed callbacks
1113 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1114 * the configuration information for I2S module
1117 __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
1119 /* NOTE : This function Should not be modified, when the callback is needed,
1120 the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
1125 * @brief Tx Transfer completed callbacks
1126 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1127 * the configuration information for I2S module
1130 __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
1132 /* NOTE : This function Should not be modified, when the callback is needed,
1133 the HAL_I2S_TxCpltCallback could be implemented in the user file
1138 * @brief Rx Transfer half completed callbacks
1139 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1140 * the configuration information for I2S module
1143 __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
1145 /* NOTE : This function Should not be modified, when the callback is needed,
1146 the HAL_I2S_RxHalfCpltCallback could be implemented in the user file
1151 * @brief Rx Transfer completed callbacks
1152 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1153 * the configuration information for I2S module
1156 __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
1158 /* NOTE : This function Should not be modified, when the callback is needed,
1159 the HAL_I2S_RxCpltCallback could be implemented in the user file
1164 * @brief I2S error callbacks
1165 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1166 * the configuration information for I2S module
1169 __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
1171 /* NOTE : This function Should not be modified, when the callback is needed,
1172 the HAL_I2S_ErrorCallback could be implemented in the user file
1180 /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
1181 * @brief Peripheral State functions
1184 ===============================================================================
1185 ##### Peripheral State and Errors functions #####
1186 ===============================================================================
1188 This subsection permits to get in run-time the status of the peripheral
1196 * @brief Return the I2S state
1197 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1198 * the configuration information for I2S module
1201 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
1207 * @brief Return the I2S error code
1208 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1209 * the configuration information for I2S module
1210 * @retval I2S Error Code
1212 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
1214 return hi2s->ErrorCode;
1224 /* Private functions ---------------------------------------------------------*/
1225 /** @addtogroup I2S_Private_Functions I2S Private Functions
1229 * @brief DMA I2S transmit process complete callback
1230 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1231 * the configuration information for the specified DMA module.
1234 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
1236 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1238 if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
1240 /* Disable Tx DMA Request */
1241 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
1243 hi2s->TxXferCount = 0;
1244 hi2s->State = HAL_I2S_STATE_READY;
1246 HAL_I2S_TxCpltCallback(hi2s);
1250 * @brief DMA I2S transmit process half complete callback
1251 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1252 * the configuration information for the specified DMA module.
1255 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
1257 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1259 HAL_I2S_TxHalfCpltCallback(hi2s);
1263 * @brief DMA I2S receive process complete callback
1264 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1265 * the configuration information for the specified DMA module.
1268 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
1270 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1272 if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
1274 /* Disable Rx DMA Request */
1275 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1276 hi2s->RxXferCount = 0;
1277 hi2s->State = HAL_I2S_STATE_READY;
1279 HAL_I2S_RxCpltCallback(hi2s);
1283 * @brief DMA I2S receive process half complete callback
1284 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1285 * the configuration information for the specified DMA module.
1288 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1290 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1292 HAL_I2S_RxHalfCpltCallback(hi2s);
1296 * @brief DMA I2S communication error callback
1297 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1298 * the configuration information for the specified DMA module.
1301 static void I2S_DMAError(DMA_HandleTypeDef *hdma)
1303 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1305 /* Disable Rx and Tx DMA Request */
1306 CLEAR_BIT(hi2s->Instance->CR2, (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
1307 hi2s->TxXferCount = 0;
1308 hi2s->RxXferCount = 0;
1310 hi2s->State= HAL_I2S_STATE_READY;
1312 /* Set the error code and execute error callback*/
1313 SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
1314 HAL_I2S_ErrorCallback(hi2s);
1318 * @brief Transmit an amount of data in non-blocking mode with Interrupt
1319 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1320 * the configuration information for I2S module
1323 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
1326 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
1327 hi2s->TxXferCount--;
1329 if(hi2s->TxXferCount == 0)
1331 /* Disable TXE and ERR interrupt */
1332 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
1334 hi2s->State = HAL_I2S_STATE_READY;
1335 HAL_I2S_TxCpltCallback(hi2s);
1340 * @brief Receive an amount of data in non-blocking mode with Interrupt
1341 * @param hi2s: I2S handle
1344 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
1347 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
1348 hi2s->RxXferCount--;
1350 if(hi2s->RxXferCount == 0)
1352 /* Disable RXNE and ERR interrupt */
1353 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
1355 hi2s->State = HAL_I2S_STATE_READY;
1356 HAL_I2S_RxCpltCallback(hi2s);
1362 * @brief This function handles I2S Communication Timeout.
1363 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
1364 * the configuration information for I2S module
1365 * @param Flag: Flag checked
1366 * @param Status: Value of the flag expected
1367 * @param Timeout: Duration of the timeout
1368 * @retval HAL status
1370 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout)
1372 uint32_t tickstart = 0;
1375 tickstart = HAL_GetTick();
1377 /* Wait until flag is set */
1380 while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
1382 if(Timeout != HAL_MAX_DELAY)
1384 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1386 /* Set the I2S State ready */
1387 hi2s->State= HAL_I2S_STATE_READY;
1389 /* Process Unlocked */
1399 while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
1401 if(Timeout != HAL_MAX_DELAY)
1403 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1405 /* Set the I2S State ready */
1406 hi2s->State= HAL_I2S_STATE_READY;
1408 /* Process Unlocked */
1427 #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
1428 #endif /* HAL_I2S_MODULE_ENABLED */
1435 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/