2 ******************************************************************************
3 * @file stm32f1xx_hal_nor.h
4 * @author MCD Application Team
6 * @date 15-December-2014
7 * @brief Header file of NOR HAL module.
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F1xx_HAL_NOR_H
40 #define __STM32F1xx_HAL_NOR_H
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f1xx_ll_fsmc.h"
49 /** @addtogroup STM32F1xx_HAL_Driver
53 #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE)
58 /** @addtogroup NOR_Private_Constants
62 /* NOR device IDs addresses */
63 #define MC_ADDRESS ((uint16_t)0x0000)
64 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
65 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
66 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
68 /* NOR CFI IDs addresses */
69 #define CFI1_ADDRESS ((uint16_t)0x10)
70 #define CFI2_ADDRESS ((uint16_t)0x11)
71 #define CFI3_ADDRESS ((uint16_t)0x12)
72 #define CFI4_ADDRESS ((uint16_t)0x13)
74 /* NOR operation wait timeout */
75 #define NOR_TMEOUT ((uint16_t)0xFFFF)
77 /* NOR memory data width */
78 #define NOR_MEMORY_8B ((uint8_t)0x0)
79 #define NOR_MEMORY_16B ((uint8_t)0x1)
81 /* NOR memory device read/write start address */
82 #define NOR_MEMORY_ADRESS1 FSMC_BANK1_1
83 #define NOR_MEMORY_ADRESS2 FSMC_BANK1_2
84 #define NOR_MEMORY_ADRESS3 FSMC_BANK1_3
85 #define NOR_MEMORY_ADRESS4 FSMC_BANK1_4
91 /** @addtogroup NOR_Private_Macros
96 * @brief NOR memory address shifting.
97 * @param __NOR_ADDRESS: NOR base address
98 * @param __NOR_MEMORY_WIDTH_: NOR memory width
99 * @param __ADDRESS__: NOR memory address
100 * @retval NOR shifted address value
102 #define __NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
103 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
104 ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \
105 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
108 * @brief NOR memory write data to specified address.
109 * @param __ADDRESS__: NOR memory address
110 * @param __DATA__: Data to write
113 #define __NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
119 /* Exported typedef ----------------------------------------------------------*/
120 /** @defgroup NOR_Exported_Types NOR Exported Types
125 * @brief HAL SRAM State structures definition
129 HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */
130 HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */
131 HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */
132 HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */
133 HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
134 }HAL_NOR_StateTypeDef;
137 * @brief FSMC NOR Status typedef
141 HAL_NOR_STATUS_SUCCESS = 0,
142 HAL_NOR_STATUS_ONGOING,
143 HAL_NOR_STATUS_ERROR,
144 HAL_NOR_STATUS_TIMEOUT
145 }HAL_NOR_StatusTypeDef;
148 * @brief FSMC NOR ID typedef
152 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
154 uint16_t Device_Code1;
156 uint16_t Device_Code2;
158 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
159 These codes can be accessed by performing read operations with specific
160 control signals and addresses set.They can also be accessed by issuing
161 an Auto Select command */
165 * @brief FSMC NOR CFI typedef
169 /*!< Defines the information stored in the memory's Common flash interface
170 which contains a description of various electrical and timing parameters,
171 density information and functions supported by the memory */
183 * @brief NOR handle Structure definition
187 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
189 FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
191 FSMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
193 HAL_LockTypeDef Lock; /*!< NOR locking object */
195 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
203 /* Exported constants --------------------------------------------------------*/
204 /* Exported macro ------------------------------------------------------------*/
206 /** @defgroup NOR_Exported_macro NOR Exported Macros
210 /** @brief Reset NOR handle state
211 * @param __HANDLE__: NOR handle
214 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
220 /* Exported functions --------------------------------------------------------*/
221 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
225 /** @addtogroup NOR_Exported_Functions_Group1
229 /* Initialization/de-initialization functions **********************************/
230 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
231 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
232 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
233 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
234 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
240 /** @addtogroup NOR_Exported_Functions_Group2
244 /* I/O operation functions ***************************************************/
245 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
246 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
247 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
248 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
250 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
251 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
253 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
254 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
255 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
261 /** @addtogroup NOR_Exported_Functions_Group3
265 /* NOR Control functions *****************************************************/
266 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
267 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
273 /** @addtogroup NOR_Exported_Functions_Group4
277 /* NOR State functions ********************************************************/
278 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
279 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
294 #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */
304 #endif /* __STM32F1xx_HAL_NOR_H */
306 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/