2 ******************************************************************************
3 * @file stm32f1xx_ll_usb.c
4 * @author MCD Application Team
6 * @date 15-December-2014
7 * @brief USB Low Layer HAL module driver.
9 * This file provides firmware functions to manage the following
10 * functionalities of the USB Peripheral Controller:
11 * + Initialization/de-initialization functions
12 * + I/O operation functions
13 * + Peripheral Control functions
14 * + Peripheral State functions
17 ==============================================================================
18 ##### How to use this driver #####
19 ==============================================================================
21 (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
23 (#) Call USB_CoreInit() API to initialize the USB Core peripheral.
25 (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
28 ******************************************************************************
31 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
33 * Redistribution and use in source and binary forms, with or without modification,
34 * are permitted provided that the following conditions are met:
35 * 1. Redistributions of source code must retain the above copyright notice,
36 * this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright notice,
38 * this list of conditions and the following disclaimer in the documentation
39 * and/or other materials provided with the distribution.
40 * 3. Neither the name of STMicroelectronics nor the names of its contributors
41 * may be used to endorse or promote products derived from this software
42 * without specific prior written permission.
44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
45 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
47 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
50 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
51 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55 ******************************************************************************
58 /* Includes ------------------------------------------------------------------*/
59 #include "stm32f1xx_hal.h"
61 /** @addtogroup STM32F1xx_HAL_Driver
65 /** @defgroup USB_LL USB Low Layer
66 * @brief Low layer module for USB_FS and USB_OTG_FS drivers
70 #if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED)
72 #if defined(STM32F102x6) || defined(STM32F102xB) || \
73 defined(STM32F103x6) || defined(STM32F103xB) || \
74 defined(STM32F103xE) || defined(STM32F103xG) || \
75 defined(STM32F105xC) || defined(STM32F107xC)
77 /* Private types -------------------------------------------------------------*/
78 /* Private variables ---------------------------------------------------------*/
79 /* Private constants ---------------------------------------------------------*/
80 /* Private macros ------------------------------------------------------------*/
81 /* Private functions ---------------------------------------------------------*/
82 #if defined (USB_OTG_FS)
83 /** @defgroup USB_LL_Private_Functions USB Low Layer Private Functions
86 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
90 #endif /* USB_OTG_FS */
92 /* Exported functions --------------------------------------------------------*/
93 /** @defgroup USB_LL_Exported_Functions USB Low Layer Exported Functions
97 /** @defgroup USB_LL_Exported_Functions_Group1 Peripheral Control functions
98 * @brief management functions
101 ===============================================================================
102 ##### Peripheral Control functions #####
103 ===============================================================================
105 This subsection provides a set of functions allowing to control the PCD data
112 /*==============================================================================
113 USB OTG FS peripheral available on STM32F105xx and STM32F107xx devices
114 ==============================================================================*/
115 #if defined (USB_OTG_FS)
118 * @brief Initializes the USB Core
119 * @param USBx: USB Instance
120 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
121 * the configuration information for the specified USBx peripheral.
124 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
126 /* Select FS Embedded PHY */
127 USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
129 /* Reset after a PHY select and set Host mode */
132 /* Deactivate the power down*/
133 USBx->GCCFG = USB_OTG_GCCFG_PWRDWN;
139 * @brief USB_EnableGlobalInt
140 * Enables the controller's Global Int in the AHB Config reg
141 * @param USBx : Selected device
144 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
146 USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
151 * @brief USB_DisableGlobalInt
152 * Disable the controller's Global Int in the AHB Config reg
153 * @param USBx : Selected device
156 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
158 USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
163 * @brief USB_SetCurrentMode : Set functional mode
164 * @param USBx : Selected device
165 * @param mode : current core mode
166 * This parameter can be one of the these values:
167 * @arg USB_DEVICE_MODE: Peripheral mode mode
168 * @arg USB_HOST_MODE: Host mode
169 * @arg USB_DRD_MODE: Dual Role Device mode
172 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_ModeTypeDef mode)
174 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
176 if ( mode == USB_HOST_MODE)
178 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
180 else if ( mode == USB_DEVICE_MODE)
182 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
190 * @brief USB_DevInit : Initializes the USB_OTG controller registers
192 * @param USBx : Selected device
193 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
194 * the configuration information for the specified USBx peripheral.
197 HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
201 for (index = 0; index < 15 ; index++)
203 USBx->DIEPTXF[index] = 0;
206 /*Activate VBUS Sensing B */
207 USBx->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
209 if (cfg.vbus_sensing_enable == 0)
211 USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
214 /* Restart the Phy Clock */
217 /* Device mode configuration */
218 USBx_DEVICE->DCFG |= DCFG_FRAME_INTERVAL_80;
220 /* Set Full speed phy */
221 USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL);
223 /* Flush the FIFOs */
224 USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */
225 USB_FlushRxFifo(USBx);
227 /* Clear all pending Device Interrupts */
228 USBx_DEVICE->DIEPMSK = 0;
229 USBx_DEVICE->DOEPMSK = 0;
230 USBx_DEVICE->DAINT = 0xFFFFFFFF;
231 USBx_DEVICE->DAINTMSK = 0;
233 for (index = 0; index < cfg.dev_endpoints; index++)
235 if ((USBx_INEP(index)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
237 USBx_INEP(index)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK);
241 USBx_INEP(index)->DIEPCTL = 0;
244 USBx_INEP(index)->DIEPTSIZ = 0;
245 USBx_INEP(index)->DIEPINT = 0xFF;
248 for (index = 0; index < cfg.dev_endpoints; index++)
250 if ((USBx_OUTEP(index)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
252 USBx_OUTEP(index)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK);
256 USBx_OUTEP(index)->DOEPCTL = 0;
259 USBx_OUTEP(index)->DOEPTSIZ = 0;
260 USBx_OUTEP(index)->DOEPINT = 0xFF;
263 USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
265 /* Disable all interrupts. */
268 /* Clear any pending interrupts */
269 USBx->GINTSTS = 0xBFFFFFFF;
271 /* Enable the common interrupts */
272 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
274 /* Enable interrupts matching to the Device mode ONLY */
275 USBx->GINTMSK |= (USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |\
276 USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |\
277 USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM|\
278 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
282 USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM;
285 if (cfg.vbus_sensing_enable == ENABLE)
287 USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT);
294 * @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
295 * @param USBx : Selected device
296 * @param num : FIFO number
297 * This parameter can be a value from 1 to 15
298 15 means Flush all Tx FIFOs
301 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num )
305 USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 5 ));
309 if (++count > 200000)
314 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
320 * @brief USB_FlushRxFifo : Flush Rx FIFO
321 * @param USBx : Selected device
324 HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
328 USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
332 if (++count > 200000)
337 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
343 * @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register
344 * depending the PHY type and the enumeration speed of the device.
345 * @param USBx : Selected device
346 * @param speed : device speed
347 * This parameter can be one of the these values:
348 * @arg USB_OTG_SPEED_FULL: Full speed mode
349 * @arg USB_OTG_SPEED_LOW: Low speed mode
352 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed)
354 USBx_DEVICE->DCFG |= speed;
359 * @brief USB_GetDevSpeed :Return the Dev Speed
360 * @param USBx : Selected device
361 * @retval speed : device speed
362 * This parameter can be one of the these values:
363 * @arg USB_OTG_SPEED_FULL: Full speed mode
364 * @arg USB_OTG_SPEED_LOW: Low speed mode
366 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
370 if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)||
371 ((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ))
373 speed = USB_OTG_SPEED_FULL;
375 else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
377 speed = USB_OTG_SPEED_LOW;
384 * @brief Activate and configure an endpoint
385 * @param USBx : Selected device
386 * @param ep: pointer to endpoint structure
389 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
393 /* Assign a Tx FIFO */
394 ep->tx_fifo_num = ep->num;
396 /* Set initial data PID. */
397 if (ep->type == EP_TYPE_BULK )
399 ep->data_pid_start = 0;
404 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
406 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
408 USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
409 ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
414 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
416 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
418 USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
419 (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP));
427 * @brief De-activate and de-initialize an endpoint
428 * @param USBx : Selected device
429 * @param ep: pointer to endpoint structure
432 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
434 /* Read DEPCTLn register */
437 USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
438 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
439 USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
443 USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
444 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
445 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
451 * @brief USB_EPStartXfer : setup and starts a transfer over an EP
452 * @param USBx : Selected device
453 * @param ep: pointer to endpoint structure
456 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
463 /* Zero Length Packet? */
464 if (ep->xfer_len == 0)
466 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
467 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
468 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
472 /* Program the transfer size and packet count
473 * as follows: xfersize = N * maxpacket +
474 * short_packet pktcnt = N + (short_packet
477 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
478 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
479 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket) << 19)) ;
480 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
482 if (ep->type == EP_TYPE_ISOC)
484 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
485 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (1 << 29));
489 if (ep->type != EP_TYPE_ISOC)
491 /* Enable the Tx FIFO Empty Interrupt for this EP */
492 if (ep->xfer_len > 0)
494 USBx_DEVICE->DIEPEMPMSK |= 1 << ep->num;
498 if (ep->type == EP_TYPE_ISOC)
500 if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
502 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
506 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
510 /* EP enable, IN data in FIFO */
511 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
513 if (ep->type == EP_TYPE_ISOC)
515 USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len);
518 else /* OUT endpoint */
520 /* Program the transfer size and packet count as follows:
522 * xfersize = N * maxpacket
524 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
525 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
527 if (ep->xfer_len == 0)
529 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
530 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
534 pktcnt = (ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket;
535 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19));
536 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt));
539 if (ep->type == EP_TYPE_ISOC)
541 if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
543 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM;
547 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
551 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
558 * @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0
559 * @param USBx : Selected device
560 * @param ep: pointer to endpoint structure
563 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
568 /* Zero Length Packet? */
569 if (ep->xfer_len == 0)
571 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
572 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19));
573 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
577 /* Program the transfer size and packet count
578 * as follows: xfersize = N * maxpacket +
579 * short_packet pktcnt = N + (short_packet
582 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
583 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
585 if(ep->xfer_len > ep->maxpacket)
587 ep->xfer_len = ep->maxpacket;
589 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19));
590 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
593 /* Enable the Tx FIFO Empty Interrupt for this EP */
594 if (ep->xfer_len > 0)
596 USBx_DEVICE->DIEPEMPMSK |= 1 << (ep->num);
599 /* EP enable, IN data in FIFO */
600 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
602 else /* OUT endpoint */
604 /* Program the transfer size and packet count as follows:
606 * xfersize = N * maxpacket
608 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
609 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
611 if (ep->xfer_len > 0)
613 ep->xfer_len = ep->maxpacket;
616 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
617 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket));
620 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
627 * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
628 * with the EP/channel
629 * @param USBx : Selected device
630 * @param src : pointer to source buffer
631 * @param ch_ep_num : endpoint or host channel number
632 * @param len : Number of bytes to write
635 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len)
637 uint32_t count32b = 0 , index = 0;
639 count32b = (len + 3) / 4;
640 for (index = 0; index < count32b; index++, src += 4)
642 USBx_DFIFO(ch_ep_num) = *((__packed uint32_t *)src);
648 * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
649 * with the EP/channel
650 * @param USBx : Selected device
651 * @param dest : destination pointer
652 * @param len : Number of bytes to read
653 * @retval pointer to destination buffer
655 void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
658 uint32_t count32b = (len + 3) / 4;
660 for ( index = 0; index < count32b; index++, dest += 4 )
662 *(__packed uint32_t *)dest = USBx_DFIFO(0);
665 return ((void *)dest);
669 * @brief USB_EPSetStall : set a stall condition over an EP
670 * @param USBx : Selected device
671 * @param ep: pointer to endpoint structure
674 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
678 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0)
680 USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
682 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_STALL;
686 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0)
688 USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
690 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_STALL;
696 * @brief USB_EPClearStall : Clear a stall condition over an EP
697 * @param USBx : Selected device
698 * @param ep: pointer to endpoint structure
701 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
705 USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
706 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
708 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
713 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
714 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
716 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
723 * @brief USB_StopDevice : Stop the usb device mode
724 * @param USBx : Selected device
727 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
731 /* Clear Pending interrupt */
732 for (index = 0; index < 15 ; index++)
734 USBx_INEP(index)->DIEPINT = 0xFF;
735 USBx_OUTEP(index)->DOEPINT = 0xFF;
737 USBx_DEVICE->DAINT = 0xFFFFFFFF;
739 /* Clear interrupt masks */
740 USBx_DEVICE->DIEPMSK = 0;
741 USBx_DEVICE->DOEPMSK = 0;
742 USBx_DEVICE->DAINTMSK = 0;
745 USB_FlushRxFifo(USBx);
746 USB_FlushTxFifo(USBx , 0x10 );
752 * @brief USB_SetDevAddress : Stop the usb device mode
753 * @param USBx : Selected device
754 * @param address : new device address to be assigned
755 * This parameter can be a value from 0 to 255
758 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address)
760 USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD);
761 USBx_DEVICE->DCFG |= (address << 4) & USB_OTG_DCFG_DAD;
767 * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
768 * @param USBx : Selected device
771 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx)
773 USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ;
780 * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
781 * @param USBx : Selected device
784 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx)
786 USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS;
793 * @brief USB_ReadInterrupts: return the global USB interrupt status
794 * @param USBx : Selected device
797 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx)
801 tmpreg = USBx->GINTSTS;
802 tmpreg &= USBx->GINTMSK;
807 * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
808 * @param USBx : Selected device
811 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
814 tmpreg = USBx_DEVICE->DAINT;
815 tmpreg &= USBx_DEVICE->DAINTMSK;
816 return ((tmpreg & 0xffff0000) >> 16);
820 * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
821 * @param USBx : Selected device
824 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
827 tmpreg = USBx_DEVICE->DAINT;
828 tmpreg &= USBx_DEVICE->DAINTMSK;
829 return ((tmpreg & 0xFFFF));
833 * @brief Returns Device OUT EP Interrupt register
834 * @param USBx : Selected device
835 * @param epnum : endpoint number
836 * This parameter can be a value from 0 to 15
837 * @retval Device OUT EP Interrupt register
839 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
842 tmpreg = USBx_OUTEP(epnum)->DOEPINT;
843 tmpreg &= USBx_DEVICE->DOEPMSK;
848 * @brief Returns Device IN EP Interrupt register
849 * @param USBx : Selected device
850 * @param epnum : endpoint number
851 * This parameter can be a value from 0 to 15
852 * @retval Device IN EP Interrupt register
854 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
856 uint32_t tmpreg = 0, msk = 0, emp = 0;
858 msk = USBx_DEVICE->DIEPMSK;
859 emp = USBx_DEVICE->DIEPEMPMSK;
860 msk |= ((emp >> epnum) & 0x1) << 7;
861 tmpreg = USBx_INEP(epnum)->DIEPINT & msk;
866 * @brief USB_ClearInterrupts: clear a USB interrupt
867 * @param USBx : Selected device
868 * @param interrupt : interrupt flag
871 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
873 USBx->GINTSTS |= interrupt;
877 * @brief Returns USB core mode
878 * @param USBx : Selected device
879 * @retval return core mode : Host or Device
880 * This parameter can be one of the these values:
884 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
886 return ((USBx->GINTSTS ) & 0x1);
890 * @brief Activate EP0 for Setup transactions
891 * @param USBx : Selected device
894 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx)
896 /* Set the MPS of the IN EP based on the enumeration speed */
897 USBx_INEP(0)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
899 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
901 USBx_INEP(0)->DIEPCTL |= 3;
903 USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
909 * @brief Prepare the EP0 to start the first control setup
910 * @param USBx : Selected device
911 * @param psetup : pointer to setup packet
914 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t *psetup)
916 USBx_OUTEP(0)->DOEPTSIZ = 0;
917 USBx_OUTEP(0)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
918 USBx_OUTEP(0)->DOEPTSIZ |= (3 * 8);
919 USBx_OUTEP(0)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT;
925 * @brief USB_HostInit : Initializes the USB OTG controller registers
927 * @param USBx : Selected device
928 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
929 * the configuration information for the specified USBx peripheral.
932 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
936 /* Restart the Phy Clock */
940 USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSASEN);
941 USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSBSEN);
942 USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
944 /* Disable the FS/LS support mode only */
945 if((cfg.speed == USB_OTG_SPEED_FULL)&&
946 (USBx != USB_OTG_FS))
948 USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS;
952 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
955 /* Make sure the FIFOs are flushed. */
956 USB_FlushTxFifo(USBx, 0x10 ); /* all Tx FIFOs */
957 USB_FlushRxFifo(USBx);
959 /* Clear all pending HC Interrupts */
960 for (index = 0; index < cfg.Host_channels; index++)
962 USBx_HC(index)->HCINT = 0xFFFFFFFF;
963 USBx_HC(index)->HCINTMSK = 0;
966 /* Enable VBUS driving */
967 USB_DriveVbus(USBx, 1);
971 /* Disable all interrupts. */
974 /* Clear any pending interrupts */
975 USBx->GINTSTS = 0xFFFFFFFF;
977 if(USBx == USB_OTG_FS)
979 /* set Rx FIFO size */
980 USBx->GRXFSIZ = (uint32_t )0x80;
981 USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) | 0x80);
982 USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0);
985 /* Enable the common interrupts */
986 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
988 /* Enable interrupts matching to the Host mode ONLY */
989 USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM |\
990 USB_OTG_GINTMSK_SOFM |USB_OTG_GINTSTS_DISCINT|\
991 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
997 * @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
998 * HCFG register on the PHY type and set the right frame interval
999 * @param USBx : Selected device
1000 * @param freq : clock frequency
1001 * This parameter can be one of the these values:
1002 * HCFG_48_MHZ : Full Speed 48 MHz Clock
1003 * HCFG_6_MHZ : Low Speed 6 MHz Clock
1004 * @retval HAL status
1006 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq)
1008 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
1009 USBx_HOST->HCFG |= (freq & USB_OTG_HCFG_FSLSPCS);
1011 if (freq == HCFG_48_MHZ)
1013 USBx_HOST->HFIR = (uint32_t)48000;
1015 else if (freq == HCFG_6_MHZ)
1017 USBx_HOST->HFIR = (uint32_t)6000;
1023 * @brief USB_OTG_ResetPort : Reset Host Port
1024 * @param USBx : Selected device
1025 * @retval HAL status
1026 * @note : (1)The application must wait at least 10 ms
1027 * before clearing the reset bit.
1029 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
1031 __IO uint32_t hprt0 = 0;
1035 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
1036 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
1038 USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);
1039 HAL_Delay (10); /* See Note #1 */
1040 USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
1045 * @brief USB_DriveVbus : activate or de-activate vbus
1046 * @param state : VBUS state
1047 * This parameter can be one of the these values:
1050 * @retval HAL status
1052 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
1054 __IO uint32_t hprt0 = 0;
1057 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
1058 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
1060 if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 ))
1062 USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0);
1064 if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0 ))
1066 USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
1072 * @brief Return Host Core speed
1073 * @param USBx : Selected device
1074 * @retval speed : Host speed
1075 * This parameter can be one of the these values:
1076 * @arg USB_OTG_SPEED_FULL: Full speed mode
1077 * @arg USB_OTG_SPEED_LOW: Low speed mode
1079 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx)
1081 __IO uint32_t hprt0 = 0;
1084 return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17);
1088 * @brief Return Host Current Frame number
1089 * @param USBx : Selected device
1090 * @retval current frame number
1092 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx)
1094 return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
1098 * @brief Initialize a host channel
1099 * @param USBx : Selected device
1100 * @param ch_num : Channel number
1101 * This parameter can be a value from 1 to 15
1102 * @param epnum : Endpoint number
1103 * This parameter can be a value from 1 to 15
1104 * @param dev_address : Current device address
1105 * This parameter can be a value from 0 to 255
1106 * @param speed : Current device speed
1107 * This parameter can be one of the these values:
1108 * @arg USB_OTG_SPEED_FULL: Full speed mode
1109 * @arg USB_OTG_SPEED_LOW: Low speed mode
1110 * @param ep_type : Endpoint Type
1111 * This parameter can be one of the these values:
1112 * @arg EP_TYPE_CTRL: Control type
1113 * @arg EP_TYPE_ISOC: Isochronous type
1114 * @arg EP_TYPE_BULK: Bulk type
1115 * @arg EP_TYPE_INTR: Interrupt type
1116 * @param mps : Max Packet Size
1117 * This parameter can be a value from 0 to32K
1120 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
1123 uint8_t dev_address,
1128 /* Clear old interrupt conditions for this host channel. */
1129 USBx_HC(ch_num)->HCINT = 0xFFFFFFFF;
1131 /* Enable channel interrupts required for this transfer. */
1136 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
1137 USB_OTG_HCINTMSK_STALLM |\
1138 USB_OTG_HCINTMSK_TXERRM |\
1139 USB_OTG_HCINTMSK_DTERRM |\
1140 USB_OTG_HCINTMSK_AHBERR |\
1141 USB_OTG_HCINTMSK_NAKM ;
1145 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
1150 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
1151 USB_OTG_HCINTMSK_STALLM |\
1152 USB_OTG_HCINTMSK_TXERRM |\
1153 USB_OTG_HCINTMSK_DTERRM |\
1154 USB_OTG_HCINTMSK_NAKM |\
1155 USB_OTG_HCINTMSK_AHBERR |\
1156 USB_OTG_HCINTMSK_FRMORM ;
1160 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
1166 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
1167 USB_OTG_HCINTMSK_ACKM |\
1168 USB_OTG_HCINTMSK_AHBERR |\
1169 USB_OTG_HCINTMSK_FRMORM ;
1173 USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM);
1178 /* Enable the top level host channel interrupt. */
1179 USBx_HOST->HAINTMSK |= (1 << ch_num);
1181 /* Make sure host channel interrupts are enabled. */
1182 USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM;
1184 /* Program the HCCHAR register */
1185 USBx_HC(ch_num)->HCCHAR = (((dev_address << 22) & USB_OTG_HCCHAR_DAD) |\
1186 (((epnum & 0x7F)<< 11) & USB_OTG_HCCHAR_EPNUM)|\
1187 ((((epnum & 0x80) == 0x80)<< 15) & USB_OTG_HCCHAR_EPDIR)|\
1188 (((speed == HPRT0_PRTSPD_LOW_SPEED)<< 17) & USB_OTG_HCCHAR_LSDEV)|\
1189 ((ep_type << 18) & USB_OTG_HCCHAR_EPTYP)|\
1190 (mps & USB_OTG_HCCHAR_MPSIZ));
1192 if (ep_type == EP_TYPE_INTR)
1194 USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ;
1201 * @brief Start a transfer over a host channel
1202 * @param USBx : Selected device
1203 * @param hc : pointer to host channel structure
1206 #if defined (__CC_ARM) /*!< ARM Compiler */
1208 #elif defined (__GNUC__) /*!< GNU Compiler */
1209 #pragma GCC optimize ("O0")
1210 #endif /* __CC_ARM */
1211 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc)
1213 uint8_t is_oddframe = 0;
1214 uint16_t len_words = 0;
1215 uint16_t num_packets = 0;
1216 uint16_t max_hc_pkt_count = 256;
1218 /* Compute the expected number of packets associated to the transfer */
1219 if (hc->xfer_len > 0)
1221 num_packets = (hc->xfer_len + hc->max_packet - 1) / hc->max_packet;
1223 if (num_packets > max_hc_pkt_count)
1225 num_packets = max_hc_pkt_count;
1226 hc->xfer_len = num_packets * hc->max_packet;
1235 hc->xfer_len = num_packets * hc->max_packet;
1238 /* Initialize the HCTSIZn register */
1239 USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\
1240 ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
1241 (((hc->data_pid) << 29) & USB_OTG_HCTSIZ_DPID);
1243 is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1;
1244 USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
1245 USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29);
1247 /* Set host channel enable */
1248 USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS;
1249 USBx_HC(hc->ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1251 if((hc->ep_is_in == 0) && (hc->xfer_len > 0))
1255 /* Non periodic transfer */
1258 len_words = (hc->xfer_len + 3) / 4;
1260 /* check if there is enough space in FIFO space */
1261 if(len_words > (USBx->HNPTXSTS & 0xFFFF))
1263 /* need to process data in nptxfempty interrupt */
1264 USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
1268 /* Periodic transfer */
1271 len_words = (hc->xfer_len + 3) / 4;
1272 /* check if there is enough space in FIFO space */
1273 if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */
1275 /* need to process data in ptxfempty interrupt */
1276 USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
1284 /* Write packet into the Tx FIFO. */
1285 USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len);
1292 * @brief Read all host channel interrupts status
1293 * @param USBx : Selected device
1296 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx)
1298 return ((USBx_HOST->HAINT) & 0xFFFF);
1302 * @brief Halt a host channel
1303 * @param USBx : Selected device
1304 * @param hc_num : Host Channel number
1305 * This parameter can be a value from 1 to 15
1308 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num)
1312 /* Check for space in the request queue to issue the halt. */
1313 if (((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_CTRL << 18)) || ((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_BULK << 18)))
1315 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
1317 if ((USBx->HNPTXSTS & 0xFFFF) == 0)
1319 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
1320 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1321 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
1329 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
1333 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1338 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
1340 if ((USBx_HOST->HPTXSTS & 0xFFFF) == 0)
1342 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
1343 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1344 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
1352 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
1356 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1364 * @brief Initiate Do Ping protocol
1365 * @param USBx : Selected device
1366 * @param hc_num : Host Channel number
1367 * This parameter can be a value from 1 to 15
1370 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num)
1372 uint8_t num_packets = 1;
1374 USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
1375 USB_OTG_HCTSIZ_DOPING;
1377 /* Set host channel enable */
1378 USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS;
1379 USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
1385 * @brief Stop Host Core
1386 * @param USBx : Selected device
1389 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
1395 USB_DisableGlobalInt(USBx);
1398 USB_FlushTxFifo(USBx, 0x10);
1399 USB_FlushRxFifo(USBx);
1401 /* Flush out any leftover queued requests. */
1402 for (index = 0; index <= 15; index++)
1404 value = USBx_HC(index)->HCCHAR;
1405 value |= USB_OTG_HCCHAR_CHDIS;
1406 value &= ~USB_OTG_HCCHAR_CHENA;
1407 value &= ~USB_OTG_HCCHAR_EPDIR;
1408 USBx_HC(index)->HCCHAR = value;
1411 /* Halt all channels to put them into a known state. */
1412 for (index = 0; index <= 15; index++)
1414 value = USBx_HC(index)->HCCHAR ;
1415 value |= USB_OTG_HCCHAR_CHDIS;
1416 value |= USB_OTG_HCCHAR_CHENA;
1417 value &= ~USB_OTG_HCCHAR_EPDIR;
1418 USBx_HC(index)->HCCHAR = value;
1427 while ((USBx_HC(index)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
1430 /* Clear any pending Host interrupts */
1431 USBx_HOST->HAINT = 0xFFFFFFFF;
1432 USBx->GINTSTS = 0xFFFFFFFF;
1433 USB_EnableGlobalInt(USBx);
1439 * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
1440 * @param USBx : Selected device
1441 * @retval HAL status
1443 HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
1445 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS)
1447 /* active Remote wakeup signalling */
1448 USBx_DEVICE->DCTL |= USB_OTG_DCTL_RWUSIG;
1454 * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
1455 * @param USBx : Selected device
1456 * @retval HAL status
1458 HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
1460 /* active Remote wakeup signalling */
1461 USBx_DEVICE->DCTL &= ~(USB_OTG_DCTL_RWUSIG);
1465 #endif /* USB_OTG_FS */
1467 /*==============================================================================
1468 USB Device FS peripheral available on STM32F102xx and STM32F103xx devices
1469 ==============================================================================*/
1472 * @brief Initializes the USB Core
1473 * @param USBx: USB Instance
1474 * @param cfg : pointer to a USB_CfgTypeDef structure that contains
1475 * the configuration information for the specified USBx peripheral.
1476 * @retval HAL status
1478 HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
1480 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1481 only by USB OTG FS peripheral.
1482 - This function is added to ensure compatibility across platforms.
1488 * @brief USB_EnableGlobalInt
1489 * Enables the controller's Global Int in the AHB Config reg
1490 * @param USBx : Selected device
1491 * @retval HAL status
1493 HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
1495 uint32_t winterruptmask = 0;
1497 /* Set winterruptmask variable */
1498 winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
1499 | USB_CNTR_ESOFM | USB_CNTR_RESETM;
1501 /* Set interrupt mask */
1502 USBx->CNTR |= winterruptmask;
1508 * @brief USB_DisableGlobalInt
1509 * Disable the controller's Global Int in the AHB Config reg
1510 * @param USBx : Selected device
1511 * @retval HAL status
1513 HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
1515 uint32_t winterruptmask = 0;
1517 /* Set winterruptmask variable */
1518 winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
1519 | USB_CNTR_ESOFM | USB_CNTR_RESETM;
1521 /* Clear interrupt mask */
1522 USBx->CNTR &= ~winterruptmask;
1528 * @brief USB_SetCurrentMode : Set functional mode
1529 * @param USBx : Selected device
1530 * @param mode : current core mode
1531 * This parameter can be one of the these values:
1532 * @arg USB_DEVICE_MODE: Peripheral mode mode
1533 * @retval HAL status
1535 HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx , USB_ModeTypeDef mode)
1537 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1538 only by USB OTG FS peripheral.
1539 - This function is added to ensure compatibility across platforms.
1545 * @brief USB_DevInit : Initializes the USB controller registers
1547 * @param USBx : Selected device
1548 * @param cfg : pointer to a USB_CfgTypeDef structure that contains
1549 * the configuration information for the specified USBx peripheral.
1550 * @retval HAL status
1552 HAL_StatusTypeDef USB_DevInit (USB_TypeDef *USBx, USB_CfgTypeDef cfg)
1556 USBx->CNTR = USB_CNTR_FRES;
1561 /*Clear pending interrupts*/
1564 /*Set Btable Address*/
1565 USBx->BTABLE = BTABLE_ADDRESS;
1571 * @brief USB_FlushTxFifo : Flush a Tx FIFO
1572 * @param USBx : Selected device
1573 * @param num : FIFO number
1574 * This parameter can be a value from 1 to 15
1575 15 means Flush all Tx FIFOs
1576 * @retval HAL status
1578 HAL_StatusTypeDef USB_FlushTxFifo (USB_TypeDef *USBx, uint32_t num )
1580 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1581 only by USB OTG FS peripheral.
1582 - This function is added to ensure compatibility across platforms.
1588 * @brief USB_FlushRxFifo : Flush Rx FIFO
1589 * @param USBx : Selected device
1590 * @retval HAL status
1592 HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx)
1594 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1595 only by USB OTG FS peripheral.
1596 - This function is added to ensure compatibility across platforms.
1602 * @brief Activate and configure an endpoint
1603 * @param USBx : Selected device
1604 * @param ep: pointer to endpoint structure
1605 * @retval HAL status
1607 HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
1609 /* initialize Endpoint */
1613 PCD_SET_EPTYPE(USBx, ep->num, USB_EP_CONTROL);
1616 PCD_SET_EPTYPE(USBx, ep->num, USB_EP_BULK);
1619 PCD_SET_EPTYPE(USBx, ep->num, USB_EP_INTERRUPT);
1622 PCD_SET_EPTYPE(USBx, ep->num, USB_EP_ISOCHRONOUS);
1628 PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
1630 if (ep->doublebuffer == 0)
1634 /*Set the endpoint Transmit buffer address */
1635 PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
1636 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1637 /* Configure NAK status for the Endpoint*/
1638 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
1642 /*Set the endpoint Receive buffer address */
1643 PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
1644 /*Set the endpoint Receive buffer counter*/
1645 PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
1646 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1647 /* Configure VALID status for the Endpoint*/
1648 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
1654 /*Set the endpoint as double buffered*/
1655 PCD_SET_EP_DBUF(USBx, ep->num);
1656 /*Set buffer address for double buffered mode*/
1657 PCD_SET_EP_DBUF_ADDR(USBx, ep->num,ep->pmaaddr0, ep->pmaaddr1);
1661 /* Clear the data toggle bits for the endpoint IN/OUT*/
1662 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1663 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1665 /* Reset value of the data toggle bits for the endpoint out*/
1666 PCD_TX_DTOG(USBx, ep->num);
1668 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
1669 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1673 /* Clear the data toggle bits for the endpoint IN/OUT*/
1674 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1675 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1676 PCD_RX_DTOG(USBx, ep->num);
1677 /* Configure DISABLE status for the Endpoint*/
1678 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1679 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
1687 * @brief De-activate and de-initialize an endpoint
1688 * @param USBx : Selected device
1689 * @param ep: pointer to endpoint structure
1690 * @retval HAL status
1692 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
1694 if (ep->doublebuffer == 0)
1698 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1699 /* Configure DISABLE status for the Endpoint*/
1700 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1704 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1705 /* Configure DISABLE status for the Endpoint*/
1706 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
1714 /* Clear the data toggle bits for the endpoint IN/OUT*/
1715 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1716 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1718 /* Reset value of the data toggle bits for the endpoint out*/
1719 PCD_TX_DTOG(USBx, ep->num);
1721 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
1722 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1726 /* Clear the data toggle bits for the endpoint IN/OUT*/
1727 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1728 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1729 PCD_RX_DTOG(USBx, ep->num);
1730 /* Configure DISABLE status for the Endpoint*/
1731 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
1732 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
1740 * @brief USB_EPStartXfer : setup and starts a transfer over an EP
1741 * @param USBx : Selected device
1742 * @param ep: pointer to endpoint structure
1743 * @retval HAL status
1745 HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx , USB_EPTypeDef *ep)
1747 uint16_t pmabuffer = 0;
1748 uint32_t len = ep->xfer_len;
1753 /*Multi packet transfer*/
1754 if (ep->xfer_len > ep->maxpacket)
1765 /* configure and validate Tx endpoint */
1766 if (ep->doublebuffer == 0)
1768 USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, len);
1769 PCD_SET_EP_TX_CNT(USBx, ep->num, len);
1773 /*Set the Double buffer counter*/
1774 PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
1776 /*Write the data to the USB endpoint*/
1777 if (PCD_GET_ENDPOINT(USBx, ep->num)& USB_EP_DTOG_TX)
1779 pmabuffer = ep->pmaaddr1;
1783 pmabuffer = ep->pmaaddr0;
1785 USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, len);
1786 PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
1789 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
1791 else /* OUT endpoint */
1793 /* Multi packet transfer*/
1794 if (ep->xfer_len > ep->maxpacket)
1805 /* configure and validate Rx endpoint */
1806 if (ep->doublebuffer == 0)
1808 /*Set RX buffer count*/
1809 PCD_SET_EP_RX_CNT(USBx, ep->num, len);
1813 /*Set the Double buffer counter*/
1814 PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
1817 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
1824 * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
1825 * with the EP/channel
1826 * @param USBx : Selected device
1827 * @param src : pointer to source buffer
1828 * @param ch_ep_num : endpoint or host channel number
1829 * @param len : Number of bytes to write
1830 * @retval HAL status
1832 HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len)
1834 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1835 only by USB OTG FS peripheral.
1836 - This function is added to ensure compatibility across platforms.
1842 * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
1843 * with the EP/channel
1844 * @param USBx : Selected device
1845 * @param dest : destination pointer
1846 * @param len : Number of bytes to read
1847 * @retval pointer to destination buffer
1849 void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len)
1851 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1852 only by USB OTG FS peripheral.
1853 - This function is added to ensure compatibility across platforms.
1855 return ((void *)NULL);
1859 * @brief USB_EPSetStall : set a stall condition over an EP
1860 * @param USBx : Selected device
1861 * @param ep: pointer to endpoint structure
1862 * @retval HAL status
1864 HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx , USB_EPTypeDef *ep)
1868 /* This macro sets STALL status for RX & TX*/
1869 PCD_SET_EP_TXRX_STATUS(USBx, ep->num, USB_EP_RX_STALL, USB_EP_TX_STALL);
1875 PCD_SET_EP_TX_STATUS(USBx, ep->num , USB_EP_TX_STALL);
1879 PCD_SET_EP_RX_STATUS(USBx, ep->num , USB_EP_RX_STALL);
1886 * @brief USB_EPClearStall : Clear a stall condition over an EP
1887 * @param USBx : Selected device
1888 * @param ep: pointer to endpoint structure
1889 * @retval HAL status
1891 HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
1895 PCD_CLEAR_TX_DTOG(USBx, ep->num);
1896 PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
1900 PCD_CLEAR_RX_DTOG(USBx, ep->num);
1901 PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
1907 * @brief USB_StopDevice : Stop the usb device mode
1908 * @param USBx : Selected device
1909 * @retval HAL status
1911 HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx)
1913 /* disable all interrupts and force USB reset */
1914 USBx->CNTR = USB_CNTR_FRES;
1916 /* clear interrupt status register */
1919 /* switch-off device */
1920 USBx->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN);
1926 * @brief USB_SetDevAddress : Stop the usb device mode
1927 * @param USBx : Selected device
1928 * @param address : new device address to be assigned
1929 * This parameter can be a value from 0 to 255
1930 * @retval HAL status
1932 HAL_StatusTypeDef USB_SetDevAddress (USB_TypeDef *USBx, uint8_t address)
1936 /* set device address and enable function */
1937 USBx->DADDR = USB_DADDR_EF;
1944 * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
1945 * @param USBx : Selected device
1946 * @retval HAL status
1948 HAL_StatusTypeDef USB_DevConnect (USB_TypeDef *USBx)
1950 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1951 only by USB OTG FS peripheral.
1952 - This function is added to ensure compatibility across platforms.
1958 * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
1959 * @param USBx : Selected device
1960 * @retval HAL status
1962 HAL_StatusTypeDef USB_DevDisconnect (USB_TypeDef *USBx)
1964 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1965 only by USB OTG FS peripheral.
1966 - This function is added to ensure compatibility across platforms.
1972 * @brief USB_ReadInterrupts: return the global USB interrupt status
1973 * @param USBx : Selected device
1974 * @retval HAL status
1976 uint32_t USB_ReadInterrupts (USB_TypeDef *USBx)
1978 uint32_t tmpreg = 0;
1980 tmpreg = USBx->ISTR;
1985 * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
1986 * @param USBx : Selected device
1987 * @retval HAL status
1989 uint32_t USB_ReadDevAllOutEpInterrupt (USB_TypeDef *USBx)
1991 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
1992 only by USB OTG FS peripheral.
1993 - This function is added to ensure compatibility across platforms.
1999 * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
2000 * @param USBx : Selected device
2001 * @retval HAL status
2003 uint32_t USB_ReadDevAllInEpInterrupt (USB_TypeDef *USBx)
2005 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2006 only by USB OTG FS peripheral.
2007 - This function is added to ensure compatibility across platforms.
2013 * @brief Returns Device OUT EP Interrupt register
2014 * @param USBx : Selected device
2015 * @param epnum : endpoint number
2016 * This parameter can be a value from 0 to 15
2017 * @retval Device OUT EP Interrupt register
2019 uint32_t USB_ReadDevOutEPInterrupt (USB_TypeDef *USBx , uint8_t epnum)
2021 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2022 only by USB OTG FS peripheral.
2023 - This function is added to ensure compatibility across platforms.
2029 * @brief Returns Device IN EP Interrupt register
2030 * @param USBx : Selected device
2031 * @param epnum : endpoint number
2032 * This parameter can be a value from 0 to 15
2033 * @retval Device IN EP Interrupt register
2035 uint32_t USB_ReadDevInEPInterrupt (USB_TypeDef *USBx , uint8_t epnum)
2037 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2038 only by USB OTG FS peripheral.
2039 - This function is added to ensure compatibility across platforms.
2045 * @brief USB_ClearInterrupts: clear a USB interrupt
2046 * @param USBx : Selected device
2047 * @param interrupt : interrupt flag
2050 void USB_ClearInterrupts (USB_TypeDef *USBx, uint32_t interrupt)
2052 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2053 only by USB OTG FS peripheral.
2054 - This function is added to ensure compatibility across platforms.
2059 * @brief Prepare the EP0 to start the first control setup
2060 * @param USBx : Selected device
2061 * @param psetup : pointer to setup packet
2062 * @retval HAL status
2064 HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
2066 /* NOTE : - This function is not required by USB Device FS peripheral, it is used
2067 only by USB OTG FS peripheral.
2068 - This function is added to ensure compatibility across platforms.
2074 * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
2075 * @param USBx : Selected device
2076 * @retval HAL status
2078 HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx)
2080 USBx->CNTR |= USB_CNTR_RESUME;
2086 * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
2087 * @param USBx : Selected device
2088 * @retval HAL status
2090 HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx)
2092 USBx->CNTR &= ~(USB_CNTR_RESUME);
2097 * @brief Copy a buffer from user memory area to packet memory area (PMA)
2098 * @param USBx : pointer to USB register.
2099 * @param pbUsrBuf : pointer to user memory area.
2100 * @param wPMABufAddr : address into PMA.
2101 * @param wNBytes : number of bytes to be copied.
2104 void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
2106 uint32_t nbytes = (wNBytes + 1) >> 1; /* nbytes = (wNBytes + 1) / 2 */
2107 uint32_t index = 0, temp1 = 0, temp2 = 0;
2108 uint16_t *pdwVal = NULL;
2110 pdwVal = (uint16_t *)(wPMABufAddr * 2 + (uint32_t)USBx + 0x400);
2111 for (index = nbytes; index != 0; index--)
2113 temp1 = (uint16_t) * pbUsrBuf;
2115 temp2 = temp1 | (uint16_t) * pbUsrBuf << 8;
2123 * @brief Copy a buffer from user memory area to packet memory area (PMA)
2124 * @param USBx : pointer to USB register.
2125 * @param pbUsrBuf : pointer to user memory area.
2126 * @param wPMABufAddr : address into PMA.
2127 * @param wNBytes : number of bytes to be copied.
2130 void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
2132 uint32_t nbytes = (wNBytes + 1) >> 1;/* /2*/
2134 uint32_t *pdwVal = NULL;
2136 pdwVal = (uint32_t *)(wPMABufAddr * 2 + (uint32_t)USBx + 0x400);
2137 for (index = nbytes; index != 0; index--)
2139 *(uint16_t*)pbUsrBuf++ = *pdwVal++;
2153 #if defined (USB_OTG_FS)
2154 /** @addtogroup USB_LL_Private_Functions
2158 * @brief Reset the USB Core (needed after USB clock settings change)
2159 * @param USBx : Selected device
2160 * @retval HAL status
2162 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
2166 /* Wait for AHB master IDLE state. */
2169 if (++count > 200000)
2174 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0);
2176 /* Core Soft Reset */
2178 USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
2182 if (++count > 200000)
2187 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
2194 #endif /* USB_OTG_FS */
2196 #endif /* STM32F102x6 || STM32F102xB || */
2197 /* STM32F103x6 || STM32F103xB || */
2198 /* STM32F103xE || STM32F103xG || */
2199 /* STM32F105xC || STM32F107xC */
2201 #endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */
2210 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/