3 Copyright (C) Dean Camera, 2014.
5 dean [at] fourwalledcubicle [dot] com
10 Copyright 2014 Dean Camera (dean [at] fourwalledcubicle [dot] com)
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
21 The author disclaims all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
33 * Target-related functions for the PDI Protocol decoder.
36 #define INCLUDE_FROM_XPROGTARGET_C
37 #include "XPROGTarget.h"
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
44 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
45 void XPROGTarget_EnableTargetPDI(void)
49 /* Set Tx and XCK as outputs, Rx as input */
50 DDRD |= (1 << 5) | (1 << 3);
53 /* Set DATA line high for at least 90ns to disable /RESET functionality */
57 /* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */
58 UBRR1 = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1);
59 UCSR1B = (1 << TXEN1);
60 UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
62 /* Send two IDLEs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
63 XPROGTarget_SendIdle();
64 XPROGTarget_SendIdle();
67 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
68 void XPROGTarget_EnableTargetTPI(void)
72 /* Set /RESET line low for at least 400ns to enable TPI functionality */
73 AUX_LINE_DDR |= AUX_LINE_MASK;
74 AUX_LINE_PORT &= ~AUX_LINE_MASK;
77 /* Set Tx and XCK as outputs, Rx as input */
78 DDRD |= (1 << 5) | (1 << 3);
81 /* Set up the synchronous USART for TPI communications - 8 data bits, even parity, 2 stop bits */
82 UBRR1 = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1);
83 UCSR1B = (1 << TXEN1);
84 UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
86 /* Send two IDLEs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
87 XPROGTarget_SendIdle();
88 XPROGTarget_SendIdle();
91 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
92 void XPROGTarget_DisableTargetPDI(void)
94 /* Switch to Rx mode to ensure that all pending transmissions are complete */
96 XPROGTarget_SetRxMode();
98 /* Turn off receiver and transmitter of the USART, clear settings */
99 UCSR1A = ((1 << TXC1) | (1 << RXC1));
103 /* Tristate all pins */
104 DDRD &= ~((1 << 5) | (1 << 3));
105 PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
108 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
109 void XPROGTarget_DisableTargetTPI(void)
111 /* Switch to Rx mode to ensure that all pending transmissions are complete */
113 XPROGTarget_SetRxMode();
115 /* Turn off receiver and transmitter of the USART, clear settings */
116 UCSR1A |= (1 << TXC1) | (1 << RXC1);
120 /* Set all USART lines as inputs, tristate */
121 DDRD &= ~((1 << 5) | (1 << 3));
122 PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
124 /* Tristate target /RESET line */
125 AUX_LINE_DDR &= ~AUX_LINE_MASK;
126 AUX_LINE_PORT &= ~AUX_LINE_MASK;
129 /** Sends a byte via the USART.
131 * \param[in] Byte Byte to send through the USART
133 void XPROGTarget_SendByte(const uint8_t Byte)
135 /* Switch to Tx mode if currently in Rx mode */
137 XPROGTarget_SetTxMode();
139 /* Wait until there is space in the hardware Tx buffer before writing */
140 while (!(UCSR1A & (1 << UDRE1)));
141 UCSR1A |= (1 << TXC1);
145 /** Receives a byte via the hardware USART, blocking until data is received or timeout expired.
147 * \return Received byte from the USART
149 uint8_t XPROGTarget_ReceiveByte(void)
151 /* Switch to Rx mode if currently in Tx mode */
153 XPROGTarget_SetRxMode();
155 /* Wait until a byte has been received before reading */
156 while (!(UCSR1A & (1 << RXC1)) && TimeoutTicksRemaining);
161 /** Sends an IDLE via the USART to the attached target, consisting of a full frame of idle bits. */
162 void XPROGTarget_SendIdle(void)
164 /* Switch to Tx mode if currently in Rx mode */
166 XPROGTarget_SetTxMode();
168 /* Need to do nothing for a full frame to send an IDLE */
169 for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
171 /* Wait for a full cycle of the clock */
172 while (PIND & (1 << 5));
173 while (!(PIND & (1 << 5)));
174 while (PIND & (1 << 5));
178 static void XPROGTarget_SetTxMode(void)
180 /* Wait for a full cycle of the clock */
181 while (PIND & (1 << 5));
182 while (!(PIND & (1 << 5)));
183 while (PIND & (1 << 5));
188 UCSR1B &= ~(1 << RXEN1);
189 UCSR1B |= (1 << TXEN1);
194 static void XPROGTarget_SetRxMode(void)
196 while (!(UCSR1A & (1 << TXC1)));
197 UCSR1A |= (1 << TXC1);
199 UCSR1B &= ~(1 << TXEN1);
200 UCSR1B |= (1 << RXEN1);