2 ******************************************************************************
3 * @file stm32f0xx_hal_cec.h
4 * @author MCD Application Team
6 * @date 11-December-2014
7 * @brief Header file of CEC HAL module.
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F0xx_HAL_CEC_H
40 #define __STM32F0xx_HAL_CEC_H
46 #if defined(STM32F042x6) || defined(STM32F048xx) ||\
47 defined(STM32F051x8) || defined(STM32F058xx) ||\
48 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) ||\
49 defined(STM32F091xC) || defined(STM32F098xx)
50 /* Includes ------------------------------------------------------------------*/
51 #include "stm32f0xx_hal_def.h"
53 /** @addtogroup STM32F0xx_HAL_Driver
57 /** @addtogroup CEC CEC HAL Module Driver
61 /* Exported types ------------------------------------------------------------*/
62 /** @defgroup CEC_Exported_Types CEC Exported Types
67 * @brief CEC Init Structure definition
71 uint32_t SignalFreeTime; /*!< Set SFT field, specifies the Signal Free Time.
72 It can be one of @ref CEC_Signal_Free_Time
73 and belongs to the set {0,...,7} where
74 0x0 is the default configuration
75 else means 0.5 + (SignalFreeTime - 1) nominal data bit periods */
77 uint32_t Tolerance; /*!< Set RXTOL bit, specifies the tolerance accepted on the received waveforms,
78 it can be a value of @ref CEC_Tolerance : it is either CEC_STANDARD_TOLERANCE
79 or CEC_EXTENDED_TOLERANCE */
81 uint32_t BRERxStop; /*!< Set BRESTP bit @ref CEC_BRERxStop : specifies whether or not a Bit Rising Error stops the reception.
82 CEC_NO_RX_STOP_ON_BRE: reception is not stopped.
83 CEC_RX_STOP_ON_BRE: reception is stopped. */
85 uint32_t BREErrorBitGen; /*!< Set BREGEN bit @ref CEC_BREErrorBitGen : specifies whether or not an Error-Bit is generated on the
86 CEC line upon Bit Rising Error detection.
87 CEC_BRE_ERRORBIT_NO_GENERATION: no error-bit generation.
88 CEC_BRE_ERRORBIT_GENERATION: error-bit generation if BRESTP is set. */
90 uint32_t LBPEErrorBitGen; /*!< Set LBPEGEN bit @ref CEC_LBPEErrorBitGen : specifies whether or not an Error-Bit is generated on the
91 CEC line upon Long Bit Period Error detection.
92 CEC_LBPE_ERRORBIT_NO_GENERATION: no error-bit generation.
93 CEC_LBPE_ERRORBIT_GENERATION: error-bit generation. */
95 uint32_t BroadcastMsgNoErrorBitGen; /*!< Set BRDNOGEN bit @ref CEC_BroadCastMsgErrorBitGen : allows to avoid an Error-Bit generation on the CEC line
96 upon an error detected on a broadcast message.
98 It supersedes BREGEN and LBPEGEN bits for a broadcast message error handling. It can take two values:
100 1) CEC_BROADCASTERROR_ERRORBIT_GENERATION.
101 a) BRE detection: error-bit generation on the CEC line if BRESTP=CEC_RX_STOP_ON_BRE
102 and BREGEN=CEC_BRE_ERRORBIT_NO_GENERATION.
103 b) LBPE detection: error-bit generation on the CEC line
104 if LBPGEN=CEC_LBPE_ERRORBIT_NO_GENERATION.
106 2) CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION.
107 no error-bit generation in case neither a) nor b) are satisfied. Additionally,
108 there is no error-bit generation in case of Short Bit Period Error detection in
109 a broadcast message while LSTN bit is set. */
111 uint32_t SignalFreeTimeOption; /*!< Set SFTOP bit @ref CEC_SFT_Option : specifies when SFT timer starts.
112 CEC_SFT_START_ON_TXSOM SFT: timer starts when TXSOM is set by software.
113 CEC_SFT_START_ON_TX_RX_END: SFT timer starts automatically at the end of message transmission/reception. */
115 uint32_t OwnAddress; /*!< Set OAR field, specifies CEC device address within a 15-bit long field */
117 uint32_t ListenMode; /*!< Set LSTN bit @ref CEC_Listening_Mode : specifies device listening mode. It can take two values:
119 CEC_REDUCED_LISTENING_MODE: CEC peripheral receives only message addressed to its
120 own address (OAR). Messages addressed to different destination are ignored.
121 Broadcast messages are always received.
123 CEC_FULL_LISTENING_MODE: CEC peripheral receives messages addressed to its own
124 address (OAR) with positive acknowledge. Messages addressed to different destination
125 are received, but without interfering with the CEC bus: no acknowledge sent. */
127 uint8_t InitiatorAddress; /* Initiator address (source logical address, sent in each header) */
132 * @brief HAL CEC State structures definition
136 HAL_CEC_STATE_RESET = 0x00, /*!< Peripheral Reset state */
137 HAL_CEC_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
138 HAL_CEC_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
139 HAL_CEC_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
140 HAL_CEC_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
141 HAL_CEC_STATE_STANDBY_RX = 0x05, /*!< IP ready to receive, doesn't prevent IP to transmit */
142 HAL_CEC_STATE_TIMEOUT = 0x06, /*!< Timeout state */
143 HAL_CEC_STATE_ERROR = 0x07 /*!< State Error */
144 }HAL_CEC_StateTypeDef;
147 * @brief HAL Error structures definition
151 HAL_CEC_ERROR_NONE = (uint32_t) 0x0, /*!< no error */
152 HAL_CEC_ERROR_RXOVR = CEC_ISR_RXOVR, /*!< CEC Rx-Overrun */
153 HAL_CEC_ERROR_BRE = CEC_ISR_BRE, /*!< CEC Rx Bit Rising Error */
154 HAL_CEC_ERROR_SBPE = CEC_ISR_SBPE, /*!< CEC Rx Short Bit period Error */
155 HAL_CEC_ERROR_LBPE = CEC_ISR_LBPE, /*!< CEC Rx Long Bit period Error */
156 HAL_CEC_ERROR_RXACKE = CEC_ISR_RXACKE, /*!< CEC Rx Missing Acknowledge */
157 HAL_CEC_ERROR_ARBLST = CEC_ISR_ARBLST, /*!< CEC Arbitration Lost */
158 HAL_CEC_ERROR_TXUDR = CEC_ISR_TXUDR, /*!< CEC Tx-Buffer Underrun */
159 HAL_CEC_ERROR_TXERR = CEC_ISR_TXERR, /*!< CEC Tx-Error */
160 HAL_CEC_ERROR_TXACKE = CEC_ISR_TXACKE /*!< CEC Tx Missing Acknowledge */
162 HAL_CEC_ErrorTypeDef;
165 * @brief CEC handle Structure definition
169 CEC_TypeDef *Instance; /* CEC registers base address */
171 CEC_InitTypeDef Init; /* CEC communication parameters */
173 uint8_t *pTxBuffPtr; /* Pointer to CEC Tx transfer Buffer */
175 uint16_t TxXferCount; /* CEC Tx Transfer Counter */
177 uint8_t *pRxBuffPtr; /* Pointer to CEC Rx transfer Buffer */
179 uint16_t RxXferSize; /* CEC Rx Transfer size, 0: header received only */
181 __IO uint32_t ErrorCode; /* For errors handling purposes, copy of ISR register
182 in case error is reported */
184 HAL_LockTypeDef Lock; /* Locking object */
186 HAL_CEC_StateTypeDef State; /* CEC communication state */
193 /* Exported constants --------------------------------------------------------*/
194 /** @defgroup CEC_Exported_Constants CEC Exported Constants
198 /** @defgroup CEC_Signal_Free_Time Signal Free Time setting parameter
201 #define CEC_DEFAULT_SFT ((uint32_t)0x00000000)
202 #define CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001)
203 #define CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002)
204 #define CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003)
205 #define CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004)
206 #define CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005)
207 #define CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006)
208 #define CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007)
209 #define IS_CEC_SIGNALFREETIME(SFT) ((SFT) <= CEC_CFGR_SFT)
214 /** @defgroup CEC_Tolerance Receiver Tolerance
217 #define CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000)
218 #define CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL)
219 #define IS_CEC_TOLERANCE(RXTOL) (((RXTOL) == CEC_STANDARD_TOLERANCE) || \
220 ((RXTOL) == CEC_EXTENDED_TOLERANCE))
225 /** @defgroup CEC_BRERxStop Reception Stop on Error
228 #define CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000)
229 #define CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP)
230 #define IS_CEC_BRERXSTOP(BRERXSTOP) (((BRERXSTOP) == CEC_NO_RX_STOP_ON_BRE) || \
231 ((BRERXSTOP) == CEC_RX_STOP_ON_BRE))
236 /** @defgroup CEC_BREErrorBitGen Error Bit Generation if Bit Rise Error reported
239 #define CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000)
240 #define CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN)
241 #define IS_CEC_BREERRORBITGEN(ERRORBITGEN) (((ERRORBITGEN) == CEC_BRE_ERRORBIT_NO_GENERATION) || \
242 ((ERRORBITGEN) == CEC_BRE_ERRORBIT_GENERATION))
247 /** @defgroup CEC_LBPEErrorBitGen Error Bit Generation if Long Bit Period Error reported
250 #define CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000)
251 #define CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN)
252 #define IS_CEC_LBPEERRORBITGEN(ERRORBITGEN) (((ERRORBITGEN) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \
253 ((ERRORBITGEN) == CEC_LBPE_ERRORBIT_GENERATION))
258 /** @defgroup CEC_BroadCastMsgErrorBitGen Error Bit Generation on Broadcast message
261 #define CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000)
262 #define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN)
263 #define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(ERRORBITGEN) (((ERRORBITGEN) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \
264 ((ERRORBITGEN) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION))
269 /** @defgroup CEC_SFT_Option Signal Free Time start option
272 #define CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000)
273 #define CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT)
274 #define IS_CEC_SFTOP(SFTOP) (((SFTOP) == CEC_SFT_START_ON_TXSOM) || \
275 ((SFTOP) == CEC_SFT_START_ON_TX_RX_END))
280 /** @defgroup CEC_Listening_Mode Listening mode option
283 #define CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000)
284 #define CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN)
285 #define IS_CEC_LISTENING_MODE(MODE) (((MODE) == CEC_REDUCED_LISTENING_MODE) || \
286 ((MODE) == CEC_FULL_LISTENING_MODE))
291 /** @defgroup CEC_ALL_ERROR all RX or TX errors flags in CEC ISR register
294 #define CEC_ISR_ALL_ERROR ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\
295 CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)
300 /** @defgroup CEC_IER_ALL_RX all RX errors interrupts enabling flag
303 #define CEC_IER_RX_ALL_ERR ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE)
308 /** @defgroup CEC_IER_ALL_TX all TX errors interrupts enabling flag
311 #define CEC_IER_TX_ALL_ERR ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE)
316 /** @defgroup CEC_OAR_Position Device Own Address position in CEC CFGR register
319 #define CEC_CFGR_OAR_LSB_POS ((uint32_t) 16)
324 /** @defgroup CEC_Initiator_Position Initiator logical address position in message header
327 #define CEC_INITIATOR_LSB_POS ((uint32_t) 4)
336 /* Exported macros -----------------------------------------------------------*/
337 /** @defgroup CEC_Exported_Macros CEC Exported Macros
341 /** @brief Reset CEC handle state
342 * @param __HANDLE__: CEC handle.
345 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CEC_STATE_RESET)
347 /** @brief Checks whether or not the specified CEC interrupt flag is set.
348 * @param __HANDLE__: specifies the CEC Handle.
349 * @param __INTERRUPT__: specifies the interrupt to check.
350 * This parameter can be one of the following values:
351 * @arg CEC_ISR_RXBR : Rx-Byte Received
352 * @arg CEC_ISR_RXEND : End of Reception
353 * @arg CEC_ISR_RXOVR : Rx Overrun
354 * @arg CEC_ISR_BRE : Rx Bit Rising Error
355 * @arg CEC_ISR_SBPE : Rx Short Bit Period Error
356 * @arg CEC_ISR_LBPE : Rx Long Bit Period Error
357 * @arg CEC_ISR_RXACKE : Rx Missing Acknowledge
358 * @arg CEC_ISR_ARBLST : Arbitration lost
359 * @arg CEC_ISR_TXBR : Tx-Byte Request
360 * @arg CEC_ISR_TXEND : End of Transmission
361 * @arg CEC_ISR_TXUDR : Tx-buffer Underrun
362 * @arg CEC_ISR_TXERR : Tx Error
363 * @arg CEC_ISR_TXACKE : Tx Missing Acknowledge
366 #define __HAL_CEC_GET_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->ISR & (__INTERRUPT__))
368 /** @brief Clears the interrupt or status flag when raised (write at 1)
369 * @param __HANDLE__: specifies the CEC Handle.
370 * @param __FLAG__: specifies the interrupt/status flag to clear.
371 * This parameter can be one of the following values:
372 * @arg CEC_ISR_RXBR : Rx-Byte Received
373 * @arg CEC_ISR_RXEND : End of Reception
374 * @arg CEC_ISR_RXOVR : Rx Overrun
375 * @arg CEC_ISR_BRE : Rx Bit Rising Error
376 * @arg CEC_ISR_SBPE : Rx Short Bit Period Error
377 * @arg CEC_ISR_LBPE : Rx Long Bit Period Error
378 * @arg CEC_ISR_RXACKE : Rx Missing Acknowledge
379 * @arg CEC_ISR_ARBLST : Arbitration lost
380 * @arg CEC_ISR_TXBR : Tx-Byte Request
381 * @arg CEC_ISR_TXEND : End of Transmission
382 * @arg CEC_ISR_TXUDR : Tx-buffer Underrun
383 * @arg CEC_ISR_TXERR : Tx Error
384 * @arg CEC_ISR_TXACKE : Tx Missing Acknowledge
387 #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR = (__FLAG__))
389 /** @brief Enables the specified CEC interrupt.
390 * @param __HANDLE__: specifies the CEC Handle.
391 * @param __INTERRUPT__: specifies the CEC interrupt to enable.
392 * This parameter can be one of the following values:
393 * @arg CEC_IER_RXBRIE : Rx-Byte Received IT Enable
394 * @arg CEC_IER_RXENDIE : End Of Reception IT Enable
395 * @arg CEC_IER_RXOVRIE : Rx-Overrun IT Enable
396 * @arg CEC_IER_BREIE : Rx Bit Rising Error IT Enable
397 * @arg CEC_IER_SBPEIE : Rx Short Bit period Error IT Enable
398 * @arg CEC_IER_LBPEIE : Rx Long Bit period Error IT Enable
399 * @arg CEC_IER_RXACKEIE : Rx Missing Acknowledge IT Enable
400 * @arg CEC_IER_ARBLSTIE : Arbitration Lost IT Enable
401 * @arg CEC_IER_TXBRIE : Tx Byte Request IT Enable
402 * @arg CEC_IER_TXENDIE : End of Transmission IT Enable
403 * @arg CEC_IER_TXUDRIE : Tx-Buffer Underrun IT Enable
404 * @arg CEC_IER_TXERRIE : Tx-Error IT Enable
405 * @arg CEC_IER_TXACKEIE : Tx Missing Acknowledge IT Enable
408 #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
410 /** @brief Disables the specified CEC interrupt.
411 * @param __HANDLE__: specifies the CEC Handle.
412 * @param __INTERRUPT__: specifies the CEC interrupt to disable.
413 * This parameter can be one of the following values:
414 * @arg CEC_IER_RXBRIE : Rx-Byte Received IT Enable
415 * @arg CEC_IER_RXENDIE : End Of Reception IT Enable
416 * @arg CEC_IER_RXOVRIE : Rx-Overrun IT Enable
417 * @arg CEC_IER_BREIE : Rx Bit Rising Error IT Enable
418 * @arg CEC_IER_SBPEIE : Rx Short Bit period Error IT Enable
419 * @arg CEC_IER_LBPEIE : Rx Long Bit period Error IT Enable
420 * @arg CEC_IER_RXACKEIE : Rx Missing Acknowledge IT Enable
421 * @arg CEC_IER_ARBLSTIE : Arbitration Lost IT Enable
422 * @arg CEC_IER_TXBRIE : Tx Byte Request IT Enable
423 * @arg CEC_IER_TXENDIE : End of Transmission IT Enable
424 * @arg CEC_IER_TXUDRIE : Tx-Buffer Underrun IT Enable
425 * @arg CEC_IER_TXERRIE : Tx-Error IT Enable
426 * @arg CEC_IER_TXACKEIE : Tx Missing Acknowledge IT Enable
429 #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
431 /** @brief Checks whether or not the specified CEC interrupt is enabled.
432 * @param __HANDLE__: specifies the CEC Handle.
433 * @param __INTERRUPT__: specifies the CEC interrupt to check.
434 * This parameter can be one of the following values:
435 * @arg CEC_IER_RXBRIE : Rx-Byte Received IT Enable
436 * @arg CEC_IER_RXENDIE : End Of Reception IT Enable
437 * @arg CEC_IER_RXOVRIE : Rx-Overrun IT Enable
438 * @arg CEC_IER_BREIE : Rx Bit Rising Error IT Enable
439 * @arg CEC_IER_SBPEIE : Rx Short Bit period Error IT Enable
440 * @arg CEC_IER_LBPEIE : Rx Long Bit period Error IT Enable
441 * @arg CEC_IER_RXACKEIE : Rx Missing Acknowledge IT Enable
442 * @arg CEC_IER_ARBLSTIE : Arbitration Lost IT Enable
443 * @arg CEC_IER_TXBRIE : Tx Byte Request IT Enable
444 * @arg CEC_IER_TXENDIE : End of Transmission IT Enable
445 * @arg CEC_IER_TXUDRIE : Tx-Buffer Underrun IT Enable
446 * @arg CEC_IER_TXERRIE : Tx-Error IT Enable
447 * @arg CEC_IER_TXACKEIE : Tx Missing Acknowledge IT Enable
450 #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
452 /** @brief Enables the CEC device
453 * @param __HANDLE__: specifies the CEC Handle.
456 #define __HAL_CEC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_CECEN)
458 /** @brief Disables the CEC device
459 * @param __HANDLE__: specifies the CEC Handle.
462 #define __HAL_CEC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CEC_CR_CECEN)
464 /** @brief Set Transmission Start flag
465 * @param __HANDLE__: specifies the CEC Handle.
468 #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXSOM)
470 /** @brief Set Transmission End flag
471 * @param __HANDLE__: specifies the CEC Handle.
473 * If the CEC message consists of only one byte, TXEOM must be set before of TXSOM.
475 #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXEOM)
477 /** @brief Get Transmission Start flag
478 * @param __HANDLE__: specifies the CEC Handle.
481 #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM)
483 /** @brief Get Transmission End flag
484 * @param __HANDLE__: specifies the CEC Handle.
487 #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM)
489 /** @brief Clear OAR register
490 * @param __HANDLE__: specifies the CEC Handle.
493 #define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR)
495 /** @brief Set OAR register (without resetting previously set address in case of multi-address mode)
496 * To reset OAR, __HAL_CEC_CLEAR_OAR() needs to be called beforehand
497 * @param __HANDLE__: specifies the CEC Handle.
498 * @param __ADDRESS__: Own Address value (CEC logical address is identified by bit position)
501 #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) SET_BIT((__HANDLE__)->Instance->CFGR, (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS)
503 /** @brief Check CEC device Own Address Register (OAR) setting.
504 * OAR address is written in a 15-bit field within CEC_CFGR register.
505 * @param __ADDRESS__: CEC own address.
506 * @retval Test result (TRUE or FALSE).
508 #define IS_CEC_OAR_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x07FFF)
510 /** @brief Check CEC initiator or destination logical address setting.
511 * Initiator and destination addresses are coded over 4 bits.
512 * @param __ADDRESS__: CEC initiator or logical address.
513 * @retval Test result (TRUE or FALSE).
515 #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
517 /** @brief Check CEC message size.
518 * The message size is the payload size: without counting the header,
519 * it varies from 0 byte (ping operation, one header only, no payload) to
520 * 15 bytes (1 opcode and up to 14 operands following the header).
521 * @param __SIZE__: CEC message size.
522 * @retval Test result (TRUE or FALSE).
524 #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0xF)
530 /* Exported functions --------------------------------------------------------*/
531 /** @addtogroup CEC_Exported_Functions CEC Exported Functions
534 /** @addtogroup CEC_Exported_Functions_Group1 Initialization/de-initialization function
535 * @brief Initialization and Configuration functions
538 /* Initialization and de-initialization functions ****************************/
539 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
540 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
541 void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
542 void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
547 /** @addtogroup CEC_Exported_Functions_Group2 IO operation function
548 * @brief CEC Transmit/Receive functions
551 /* I/O operation functions ***************************************************/
552 HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout);
553 HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout);
554 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
555 HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData);
556 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
557 void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
558 void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec);
559 void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
564 /** @addtogroup CEC_Exported_Functions_Group3 Peripheral Control function
565 * @brief CEC control functions
568 /* Peripheral State functions ************************************************/
569 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
570 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
587 #endif /* defined(STM32F042x6) || defined(STM32F048xx) || */
588 /* defined(STM32F051x8) || defined(STM32F058xx) || */
589 /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || */
590 /* defined(STM32F091xC) || defined(STM32F098xx) */
595 #endif /* __STM32F0xx_HAL_CEC_H */
597 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/