2 ******************************************************************************
3 * @file stm32f0xx_hal_dac_ex.c
4 * @author MCD Application Team
6 * @date 11-December-2014
7 * @brief DAC HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of DAC extension peripheral:
10 * + Extended features functions
14 ==============================================================================
15 ##### How to use this driver #####
16 ==============================================================================
18 (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
19 Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
20 HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.
21 (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
22 (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
25 ******************************************************************************
28 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
30 * Redistribution and use in source and binary forms, with or without modification,
31 * are permitted provided that the following conditions are met:
32 * 1. Redistributions of source code must retain the above copyright notice,
33 * this list of conditions and the following disclaimer.
34 * 2. Redistributions in binary form must reproduce the above copyright notice,
35 * this list of conditions and the following disclaimer in the documentation
36 * and/or other materials provided with the distribution.
37 * 3. Neither the name of STMicroelectronics nor the names of its contributors
38 * may be used to endorse or promote products derived from this software
39 * without specific prior written permission.
41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
42 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
44 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
48 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
52 ******************************************************************************
56 /* Includes ------------------------------------------------------------------*/
57 #include "stm32f0xx_hal.h"
59 #ifdef HAL_DAC_MODULE_ENABLED
61 #if defined(STM32F051x8) || defined(STM32F058xx) || \
62 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
63 defined(STM32F091xC) || defined(STM32F098xx)
65 /** @addtogroup STM32F0xx_HAL_Driver
69 /** @defgroup DACEx DACEx Extended HAL module driver
70 * @brief DACEx driver module
74 /* Private typedef -----------------------------------------------------------*/
75 /* Private define ------------------------------------------------------------*/
76 /* Private macro -------------------------------------------------------------*/
77 /* Private variables ---------------------------------------------------------*/
78 /* Private function prototypes -----------------------------------------------*/
79 /* Private functions ---------------------------------------------------------*/
80 /** @defgroup DACEx_Private_Functions DACEx Private Functions
83 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
84 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
85 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
90 /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
94 /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
95 * @brief Extended features functions
98 ==============================================================================
99 ##### Extended features functions #####
100 ==============================================================================
101 [..] This section provides functions allowing to:
102 (+) Start conversion.
104 (+) Start conversion and enable DMA transfer.
105 (+) Stop conversion and disable DMA transfer.
106 (+) Get result of conversion.
107 (+) Get result of dual mode conversion.
113 #endif /* STM32F051x8 STM32F058xx */
114 /* STM32F071xB STM32F072xB STM32F078xx */
115 /* STM32F091xC STM32F098xx */
117 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
118 defined(STM32F091xC) || defined(STM32F098xx)
121 * @brief Configures the selected DAC channel.
122 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
123 * the configuration information for the specified DAC.
124 * @param sConfig: DAC configuration structure.
125 * @param Channel: The selected DAC channel.
126 * This parameter can be one of the following values:
127 * @arg DAC_CHANNEL_1: DAC Channel1 selected
128 * @arg DAC_CHANNEL_2: DAC Channel2 selected
131 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
133 uint32_t tmpreg1 = 0, tmpreg2 = 0;
135 /* Check the DAC parameters */
136 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
137 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
138 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
139 assert_param(IS_DAC_CHANNEL(Channel));
144 /* Change DAC state */
145 hdac->State = HAL_DAC_STATE_BUSY;
147 /* Get the DAC CR value */
149 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
150 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
151 /* Configure for the selected DAC channel: buffer output, trigger */
152 /* Set TSELx and TENx bits according to DAC_Trigger value */
153 /* Set BOFFx bit according to DAC_OutputBuffer value */
154 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
155 /* Calculate CR register value depending on DAC_Channel */
156 tmpreg1 |= tmpreg2 << Channel;
157 /* Write to DAC CR */
159 /* Disable wave generation */
160 DAC->CR &= ~(DAC_CR_WAVE1 << Channel);
162 /* Change DAC state */
163 hdac->State = HAL_DAC_STATE_READY;
165 /* Process unlocked */
168 /* Return function status */
172 #endif /* STM32F071xB STM32F072xB STM32F078xx */
173 /* STM32F091xC STM32F098xx */
175 #if defined (STM32F051x8) || defined (STM32F058xx)
178 * @brief Configures the selected DAC channel.
179 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
180 * the configuration information for the specified DAC.
181 * @param sConfig: DAC configuration structure.
182 * @param Channel: The selected DAC channel.
183 * This parameter can be one of the following values:
184 * @arg DAC_CHANNEL_1: DAC Channel1 selected
187 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
189 uint32_t tmpreg1 = 0, tmpreg2 = 0;
191 /* Check the DAC parameters */
192 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
193 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
194 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
195 assert_param(IS_DAC_CHANNEL(Channel));
200 /* Change DAC state */
201 hdac->State = HAL_DAC_STATE_BUSY;
203 /* Get the DAC CR value */
205 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
206 // tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
207 tmpreg1 &= ~(((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
208 /* Configure for the selected DAC channel: buffer output, trigger */
209 /* Set TSELx and TENx bits according to DAC_Trigger value */
210 /* Set BOFFx bit according to DAC_OutputBuffer value */
211 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
212 /* Calculate CR register value depending on DAC_Channel */
213 tmpreg1 |= tmpreg2 << Channel;
214 /* Write to DAC CR */
216 /* Disable wave generation */
217 // DAC->CR &= ~(DAC_CR_WAVE1 << Channel);
219 /* Change DAC state */
220 hdac->State = HAL_DAC_STATE_READY;
222 /* Process unlocked */
225 /* Return function status */
229 #endif /* STM32F051x8 STM32F058xx */
231 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
232 defined(STM32F091xC) || defined(STM32F098xx)
233 /* DAC 1 has 2 channels 1 & 2 */
236 * @brief Returns the last data output value of the selected DAC channel.
237 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
238 * the configuration information for the specified DAC.
239 * @param Channel: The selected DAC channel.
240 * This parameter can be one of the following values:
241 * @arg DAC_CHANNEL_1: DAC Channel1 selected
242 * @arg DAC_CHANNEL_2: DAC Channel2 selected
243 * @retval The selected DAC channel data output value.
245 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
247 /* Check the parameters */
248 assert_param(IS_DAC_CHANNEL(Channel));
250 /* Returns the DAC channel data output register value */
251 if(Channel == DAC_CHANNEL_1)
253 return hdac->Instance->DOR1;
257 return hdac->Instance->DOR2;
261 #endif /* STM32F071xB STM32F072xB STM32F078xx */
262 /* STM32F091xC STM32F098xx */
264 #if defined (STM32F051x8) || defined (STM32F058xx)
266 /* DAC 1 has 1 channels */
269 * @brief Returns the last data output value of the selected DAC channel.
270 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
271 * the configuration information for the specified DAC.
272 * @param Channel: The selected DAC channel.
273 * This parameter can be one of the following values:
274 * @arg DAC_CHANNEL_1: DAC Channel1 selected
275 * @retval The selected DAC channel data output value.
277 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
279 /* Check the parameters */
280 assert_param(IS_DAC_CHANNEL(Channel));
282 /* Returns the DAC channel data output register value */
283 return hdac->Instance->DOR1;
288 #endif /* STM32F051x8 STM32F058xx */
290 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
291 defined(STM32F091xC) || defined(STM32F098xx)
294 * @brief Enables DAC and starts conversion of channel.
295 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
296 * the configuration information for the specified DAC.
297 * @param Channel: The selected DAC channel.
298 * This parameter can be one of the following values:
299 * @arg DAC_CHANNEL_1: DAC Channel1 selected
300 * @arg DAC_CHANNEL_2: DAC Channel2 selected
303 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
305 uint32_t tmp1 = 0, tmp2 = 0;
307 /* Check the parameters */
308 assert_param(IS_DAC_CHANNEL(Channel));
313 /* Change DAC state */
314 hdac->State = HAL_DAC_STATE_BUSY;
316 /* Enable the Peripharal */
317 __HAL_DAC_ENABLE(hdac, Channel);
319 if(Channel == DAC_CHANNEL_1)
321 tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
322 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
323 /* Check if software trigger enabled */
324 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
326 /* Enable the selected DAC software conversion */
327 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1;
332 tmp1 = hdac->Instance->CR & DAC_CR_TEN2;
333 tmp2 = hdac->Instance->CR & DAC_CR_TSEL2;
334 /* Check if software trigger enabled */
335 if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2))
337 /* Enable the selected DAC software conversion*/
338 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG2;
342 /* Change DAC state */
343 hdac->State = HAL_DAC_STATE_READY;
345 /* Process unlocked */
348 /* Return function status */
353 * @brief Enables DAC and starts conversion of channel.
354 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
355 * the configuration information for the specified DAC.
356 * @param Channel: The selected DAC channel.
357 * This parameter can be one of the following values:
358 * @arg DAC_CHANNEL_1: DAC Channel1 selected
359 * @arg DAC_CHANNEL_2: DAC Channel2 selected
360 * @param pData: The destination peripheral Buffer address.
361 * @param Length: The length of data to be transferred from memory to DAC peripheral
362 * @param Alignment: Specifies the data alignment for DAC channel.
363 * This parameter can be one of the following values:
364 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
365 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
366 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
369 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
373 /* Check the parameters */
374 assert_param(IS_DAC_CHANNEL(Channel));
375 assert_param(IS_DAC_ALIGN(Alignment));
380 /* Change DAC state */
381 hdac->State = HAL_DAC_STATE_BUSY;
383 if(Channel == DAC_CHANNEL_1)
385 /* Set the DMA transfer complete callback for channel1 */
386 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
388 /* Set the DMA half transfer complete callback for channel1 */
389 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
391 /* Set the DMA error callback for channel1 */
392 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
394 /* Enable the selected DAC channel1 DMA request */
395 hdac->Instance->CR |= DAC_CR_DMAEN1;
397 /* Case of use of channel 1 */
400 case DAC_ALIGN_12B_R:
401 /* Get DHR12R1 address */
402 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
404 case DAC_ALIGN_12B_L:
405 /* Get DHR12L1 address */
406 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
409 /* Get DHR8R1 address */
410 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
418 /* Set the DMA transfer complete callback for channel2 */
419 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
421 /* Set the DMA half transfer complete callback for channel2 */
422 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
424 /* Set the DMA error callback for channel2 */
425 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
427 /* Enable the selected DAC channel2 DMA request */
428 hdac->Instance->CR |= DAC_CR_DMAEN2;
430 /* Case of use of channel 2 */
433 case DAC_ALIGN_12B_R:
434 /* Get DHR12R2 address */
435 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
437 case DAC_ALIGN_12B_L:
438 /* Get DHR12L2 address */
439 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
442 /* Get DHR8R2 address */
443 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
450 /* Enable the DMA channel */
451 if(Channel == DAC_CHANNEL_1)
453 /* Enable the DAC DMA underrun interrupt */
454 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
456 /* Enable the DMA channel */
457 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
461 /* Enable the DAC DMA underrun interrupt */
462 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
464 /* Enable the DMA channel */
465 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
468 /* Enable the Peripharal */
469 __HAL_DAC_ENABLE(hdac, Channel);
471 /* Process Unlocked */
474 /* Return function status */
480 #endif /* STM32F071xB STM32F072xB STM32F078xx */
481 /* STM32F091xC STM32F098xx */
483 #if defined (STM32F051x8) || defined (STM32F058xx)
485 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
487 uint32_t tmp1 = 0, tmp2 = 0;
489 /* Check the parameters */
490 assert_param(IS_DAC_CHANNEL(Channel));
495 /* Change DAC state */
496 hdac->State = HAL_DAC_STATE_BUSY;
498 /* Enable the Peripharal */
499 __HAL_DAC_ENABLE(hdac, Channel);
501 if(Channel == DAC_CHANNEL_1)
503 tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
504 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
505 /* Check if software trigger enabled */
506 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
508 /* Enable the selected DAC software conversion */
509 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1;
513 /* Change DAC state */
514 hdac->State = HAL_DAC_STATE_READY;
516 /* Process unlocked */
519 /* Return function status */
524 * @brief Enables DAC and starts conversion of channel.
525 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
526 * the configuration information for the specified DAC.
527 * @param Channel: The selected DAC channel.
528 * This parameter can be one of the following values:
529 * @arg DAC_CHANNEL_1: DAC Channel1 selected
530 * @param pData: The destination peripheral Buffer address.
531 * @param Length: The length of data to be transferred from memory to DAC peripheral
532 * @param Alignment: Specifies the data alignment for DAC channel.
533 * This parameter can be one of the following values:
534 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
535 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
536 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
539 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
543 /* Check the parameters */
544 assert_param(IS_DAC_CHANNEL(Channel));
545 assert_param(IS_DAC_ALIGN(Alignment));
550 /* Change DAC state */
551 hdac->State = HAL_DAC_STATE_BUSY;
553 /* Set the DMA transfer complete callback for channel1 */
554 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
556 /* Set the DMA half transfer complete callback for channel1 */
557 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
559 /* Set the DMA error callback for channel1 */
560 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
562 /* Enable the selected DAC channel1 DMA request */
563 hdac->Instance->CR |= DAC_CR_DMAEN1;
565 /* Case of use of channel 1 */
568 case DAC_ALIGN_12B_R:
569 /* Get DHR12R1 address */
570 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
572 case DAC_ALIGN_12B_L:
573 /* Get DHR12L1 address */
574 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
577 /* Get DHR8R1 address */
578 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
584 /* Enable the DMA channel */
585 /* Enable the DAC DMA underrun interrupt */
586 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
588 /* Enable the DMA channel */
589 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
591 /* Enable the DAC DMA underrun interrupt */
592 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
594 /* Enable the DMA channel */
595 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
597 /* Enable the Peripharal */
598 __HAL_DAC_ENABLE(hdac, Channel);
600 /* Process Unlocked */
603 /* Return function status */
607 #endif /* STM32F051x8 STM32F058xx */
609 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
610 defined(STM32F091xC) || defined(STM32F098xx)
611 /* DAC channel 2 is available on top of DAC channel 1 */
614 * @brief Handles DAC interrupt request
615 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
616 * the configuration information for the specified DAC.
619 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
621 /* Check Overrun flag */
622 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
624 /* Change DAC state to error state */
625 hdac->State = HAL_DAC_STATE_ERROR;
627 /* Set DAC error code to chanel1 DMA underrun error */
628 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
630 /* Clear the underrun flag */
631 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
633 /* Disable the selected DAC channel1 DMA request */
634 hdac->Instance->CR &= ~DAC_CR_DMAEN1;
637 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
641 /* Change DAC state to error state */
642 hdac->State = HAL_DAC_STATE_ERROR;
644 /* Set DAC error code to channel2 DMA underrun error */
645 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
647 /* Clear the underrun flag */
648 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
650 /* Disable the selected DAC channel1 DMA request */
651 hdac->Instance->CR &= ~DAC_CR_DMAEN2;
654 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
658 #endif /* STM32F071xB STM32F072xB STM32F078xx */
659 /* STM32F091xC STM32F098xx */
661 #if defined (STM32F051x8) || defined (STM32F058xx)
662 /* DAC channel 2 is NOT available. Only DAC channel 1 is available */
665 * @brief Handles DAC interrupt request
666 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
667 * the configuration information for the specified DAC.
670 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
672 /* Check Overrun flag */
673 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
675 /* Change DAC state to error state */
676 hdac->State = HAL_DAC_STATE_ERROR;
678 /* Set DAC error code to chanel1 DMA underrun error */
679 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
681 /* Clear the underrun flag */
682 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
684 /* Disable the selected DAC channel1 DMA request */
685 hdac->Instance->CR &= ~DAC_CR_DMAEN1;
688 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
692 #endif /* STM32F051x8 STM32F058xx */
694 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
695 defined(STM32F091xC) || defined(STM32F098xx)
698 * @brief Returns the last data output value of the selected DAC channel.
699 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
700 * the configuration information for the specified DAC.
701 * @retval The selected DAC channel data output value.
703 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
707 tmp |= hdac->Instance->DOR1;
709 /* DAC channel 2 is present in DAC 1 */
710 tmp |= hdac->Instance->DOR2 << 16;
712 /* Returns the DAC channel data output register value */
716 #endif /* STM32F071xB STM32F072xB STM32F078xx */
717 /* STM32F091xC STM32F098xx */
719 #if defined (STM32F051x8) || defined (STM32F058xx)
722 * @brief Returns the last data output value of the selected DAC channel.
723 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
724 * the configuration information for the specified DAC.
725 * @retval The selected DAC channel data output value.
727 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
731 tmp |= hdac->Instance->DOR1;
733 /* Returns the DAC channel data output register value */
737 #endif /* STM32F051x8 STM32F058xx */
739 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
740 defined(STM32F091xC) || defined(STM32F098xx)
743 * @brief Enables or disables the selected DAC channel wave generation.
744 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
745 * the configuration information for the specified DAC.
746 * @param Channel: The selected DAC channel.
747 * This parameter can be one of the following values:
748 * DAC_CHANNEL_1 / DAC_CHANNEL_2
749 * @param Amplitude: Select max triangle amplitude.
750 * This parameter can be one of the following values:
751 * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
752 * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
753 * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
754 * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
755 * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
756 * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
757 * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
758 * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
759 * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
760 * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
761 * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
762 * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
765 HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
767 /* Check the parameters */
768 assert_param(IS_DAC_CHANNEL(Channel));
769 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
774 /* Change DAC state */
775 hdac->State = HAL_DAC_STATE_BUSY;
777 /* Enable the selected wave generation for the selected DAC channel */
778 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_WAVE_TRIANGLE | Amplitude) << Channel);
780 /* Change DAC state */
781 hdac->State = HAL_DAC_STATE_READY;
783 /* Process unlocked */
786 /* Return function status */
791 * @brief Enables or disables the selected DAC channel wave generation.
792 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
793 * the configuration information for the specified DAC.
794 * @param Channel: The selected DAC channel.
795 * This parameter can be one of the following values:
796 * DAC_CHANNEL_1 / DAC_CHANNEL_2
797 * @param Amplitude: Unmask DAC channel LFSR for noise wave generation.
798 * This parameter can be one of the following values:
799 * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
800 * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
801 * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
802 * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
803 * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
804 * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
805 * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
806 * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
807 * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
808 * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
809 * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
810 * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
813 HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
815 /* Check the parameters */
816 assert_param(IS_DAC_CHANNEL(Channel));
817 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
822 /* Change DAC state */
823 hdac->State = HAL_DAC_STATE_BUSY;
825 /* Enable the selected wave generation for the selected DAC channel */
826 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_WAVE_NOISE | Amplitude) << Channel);
828 /* Change DAC state */
829 hdac->State = HAL_DAC_STATE_READY;
831 /* Process unlocked */
834 /* Return function status */
838 #endif /* STM32F071xB STM32F072xB STM32F078xx */
839 /* STM32F091xC STM32F098xx */
841 #if defined(STM32F051x8) || defined(STM32F058xx) || \
842 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
843 defined(STM32F091xC) || defined(STM32F098xx)
846 * @brief Set the specified data holding register value for dual DAC channel.
847 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
848 * the configuration information for the specified DAC.
849 * @param Alignment: Specifies the data alignment for dual channel DAC.
850 * This parameter can be one of the following values:
851 * DAC_ALIGN_8B_R: 8bit right data alignment selected
852 * DAC_ALIGN_12B_L: 12bit left data alignment selected
853 * DAC_ALIGN_12B_R: 12bit right data alignment selected
854 * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
855 * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register.
856 * @note In dual mode, a unique register access is required to write in both
857 * DAC channels at the same time.
860 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
862 uint32_t data = 0, tmp = 0;
864 /* Check the parameters */
865 assert_param(IS_DAC_ALIGN(Alignment));
866 assert_param(IS_DAC_DATA(Data1));
867 assert_param(IS_DAC_DATA(Data2));
869 /* Calculate and set dual DAC data holding register value */
870 if (Alignment == DAC_ALIGN_8B_R)
872 data = ((uint32_t)Data2 << 8) | Data1;
876 data = ((uint32_t)Data2 << 16) | Data1;
879 tmp = (uint32_t)hdac->Instance;
880 tmp += __HAL_DHR12RD_ALIGNEMENT(Alignment);
882 /* Set the dual DAC selected data holding register */
883 *(__IO uint32_t *)tmp = data;
885 /* Return function status */
897 /** @addtogroup DACEx_Private_Functions
902 * @brief DMA conversion complete callback.
903 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
904 * the configuration information for the specified DMA module.
907 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
909 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
911 HAL_DAC_ConvCpltCallbackCh1(hdac);
913 hdac->State= HAL_DAC_STATE_READY;
917 * @brief DMA half transfer complete callback.
918 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
919 * the configuration information for the specified DMA module.
922 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
924 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
925 /* Conversion complete callback */
926 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
930 * @brief DMA error callback
931 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
932 * the configuration information for the specified DMA module.
935 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
937 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
939 /* Set DAC error code to DMA error */
940 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
942 HAL_DAC_ErrorCallbackCh1(hdac);
944 hdac->State= HAL_DAC_STATE_READY;
949 #endif /* STM32F051x8 STM32F058xx */
950 /* STM32F071xB STM32F072xB STM32F078xx */
951 /* STM32F091xC STM32F098xx */
953 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
954 defined(STM32F091xC) || defined(STM32F098xx)
956 /** @addtogroup DACEx_Exported_Functions
960 /** @addtogroup DACEx_Exported_Functions_Group1
961 * @brief Extended features functions
965 * @brief Conversion complete callback in non blocking mode for Channel2
966 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
967 * the configuration information for the specified DAC.
970 __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
972 /* NOTE : This function Should not be modified, when the callback is needed,
973 the HAL_DAC_ConvCpltCallback could be implemented in the user file
978 * @brief Conversion half DMA transfer callback in non blocking mode for Channel2
979 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
980 * the configuration information for the specified DAC.
983 __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
985 /* NOTE : This function Should not be modified, when the callback is needed,
986 the HAL_DAC_ConvHalfCpltCallbackCh2 could be implemented in the user file
991 * @brief Error DAC callback for Channel2.
992 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
993 * the configuration information for the specified DAC.
996 __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
998 /* NOTE : This function Should not be modified, when the callback is needed,
999 the HAL_DAC_ErrorCallback could be implemented in the user file
1004 * @brief DMA underrun DAC callback for channel2.
1005 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
1006 * the configuration information for the specified DAC.
1009 __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
1011 /* NOTE : This function Should not be modified, when the callback is needed,
1012 the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
1017 * @brief DMA conversion complete callback.
1018 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1019 * the configuration information for the specified DMA module.
1022 void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
1024 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1026 HAL_DACEx_ConvCpltCallbackCh2(hdac);
1028 hdac->State= HAL_DAC_STATE_READY;
1032 * @brief DMA half transfer complete callback.
1033 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1034 * the configuration information for the specified DMA module.
1037 void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
1039 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1040 /* Conversion complete callback */
1041 HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
1045 * @brief DMA error callback
1046 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1047 * the configuration information for the specified DMA module.
1050 void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
1052 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1054 /* Set DAC error code to DMA error */
1055 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1057 HAL_DACEx_ErrorCallbackCh2(hdac);
1059 hdac->State= HAL_DAC_STATE_READY;
1078 #endif /* STM32F071xB STM32F072xB STM32F078xx */
1079 /* STM32F091xC STM32F098xx */
1081 #endif /* HAL_DAC_MODULE_ENABLED */
1083 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/