tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_pcd.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_hal_pcd.h
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    15-December-2014
   7   * @brief   Header file of PCD HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F1xx_HAL_PCD_H
  40 #define __STM32F1xx_HAL_PCD_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 #if defined(STM32F102x6) || defined(STM32F102xB) || \
  47     defined(STM32F103x6) || defined(STM32F103xB) || \
  48     defined(STM32F103xE) || defined(STM32F103xG) || \
  49     defined(STM32F105xC) || defined(STM32F107xC)
  50
  51 /* Includes ------------------------------------------------------------------*/
  52 #include "stm32f1xx_ll_usb.h"
  53
  54 /** @addtogroup STM32F1xx_HAL_Driver
  55   * @{
  56   */
  57
  58 /** @addtogroup PCD
  59   * @{
  60   */
  61
  62 /* Exported types ------------------------------------------------------------*/
  63 /** @defgroup PCD_Exported_Types PCD Exported Types
  64   * @{
  65   */
  66
  67 /**
  68   * @brief  PCD State structure definition
  69   */
  70 typedef enum
  71 {
  72   HAL_PCD_STATE_RESET   = 0x00,
  73   HAL_PCD_STATE_READY   = 0x01,
  74   HAL_PCD_STATE_ERROR   = 0x02,
  75   HAL_PCD_STATE_BUSY    = 0x03,
  76   HAL_PCD_STATE_TIMEOUT = 0x04
  77 } PCD_StateTypeDef;
  78
  79 #if defined (USB)
  80 /**
  81   * @brief  PCD double buffered endpoint direction
  82   */
  83 typedef enum
  84 {
  85   PCD_EP_DBUF_OUT,
  86   PCD_EP_DBUF_IN,
  87   PCD_EP_DBUF_ERR,
  88 }PCD_EP_DBUF_DIR;
  89
  90 /**
  91   * @brief  PCD endpoint buffer number
  92   */
  93 typedef enum
  94 {
  95   PCD_EP_NOBUF,
  96   PCD_EP_BUF0,
  97   PCD_EP_BUF1
  98 }PCD_EP_BUF_NUM;
  99 #endif /* USB */
 100
 101 #if defined (USB_OTG_FS)
 102 typedef USB_OTG_GlobalTypeDef  PCD_TypeDef;
 103 typedef USB_OTG_CfgTypeDef     PCD_InitTypeDef;
 104 typedef USB_OTG_EPTypeDef      PCD_EPTypeDef;
 105 #endif /* USB_OTG_FS */
 106
 107 #if defined (USB)
 108 typedef USB_TypeDef        PCD_TypeDef;
 109 typedef USB_CfgTypeDef     PCD_InitTypeDef;
 110 typedef USB_EPTypeDef      PCD_EPTypeDef;
 111 #endif /* USB */
 112
 113 /**
 114   * @brief  PCD Handle Structure definition
 115   */
 116 typedef struct
 117 {
 118   PCD_TypeDef             *Instance;   /*!< Register base address               */
 119   PCD_InitTypeDef         Init;        /*!< PCD required parameters             */
 120   __IO uint8_t            USB_Address; /*!< USB Address: not used by USB OTG FS */
 121   PCD_EPTypeDef           IN_ep[15];   /*!< IN endpoint parameters              */
 122   PCD_EPTypeDef           OUT_ep[15];  /*!< OUT endpoint parameters             */
 123   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status               */
 124   __IO PCD_StateTypeDef   State;       /*!< PCD communication state             */
 125   uint32_t                Setup[12];   /*!< Setup packet buffer                 */
 126   void                    *pData;      /*!< Pointer to upper stack Handler      */
 127 } PCD_HandleTypeDef;
 128
 129 /**
 130   * @}
 131   */
 132
 133 /* Include PCD HAL Extension module */
 134 #include "stm32f1xx_hal_pcd_ex.h"
 135
 136 /* Exported constants --------------------------------------------------------*/
 137 /** @defgroup PCD_Exported_Constants PCD Exported Constants
 138   * @{
 139   */
 140
 141 /** @defgroup PCD_Speed PCD Speed
 142   * @{
 143   */
 144 #define PCD_SPEED_HIGH                                                0 /* Not Supported */
 145 #define PCD_SPEED_HIGH_IN_FULL                                        1 /* Not Supported */
 146 #define PCD_SPEED_FULL                                                2
 147 /**
 148   * @}
 149   */
 150
 151 /** @defgroup PCD_PHY_Module PCD PHY Module
 152   * @{
 153   */
 154 #define PCD_PHY_EMBEDDED                                              2
 155 /**
 156   * @}
 157   */
 158
 159 /**
 160   * @}
 161   */
 162
 163 /* Exported macros -----------------------------------------------------------*/
 164 /** @defgroup PCD_Exported_Macros PCD Exported Macros
 165  *  @brief macros to handle interrupts and specific clock configurations
 166  * @{
 167  */
 168 #if defined (USB_OTG_FS)
 169
 170 #define __HAL_PCD_ENABLE(__HANDLE__)                                  USB_EnableGlobalInt ((__HANDLE__)->Instance)
 171 #define __HAL_PCD_DISABLE(__HANDLE__)                                 USB_DisableGlobalInt ((__HANDLE__)->Instance)
 172
 173 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
 174 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
 175 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)                    (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)
 176
 177 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__)                         *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
 178                                                                       ~(USB_OTG_PCGCCTL_STOPCLK)
 179
 180 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__)                           *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
 181
 182 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__)                        ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10)
 183
 184 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT()                      EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
 185 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT()                     EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
 186 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG()                       EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
 187 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG()                     EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
 188
 189 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE()             EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
 190                                                                       EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE
 191
 192 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE()            EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
 193                                                                       EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
 194
 195 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE()     EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
 196                                                                       EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
 197                                                                       EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
 198                                                                       EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE
 199
 200 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT()                  (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
 201 #endif /* USB_OTG_FS */
 202
 203 #if defined (USB)
 204 #define __HAL_PCD_ENABLE(__HANDLE__)                                  USB_EnableGlobalInt ((__HANDLE__)->Instance)
 205 #define __HAL_PCD_DISABLE(__HANDLE__)                                 USB_DisableGlobalInt ((__HANDLE__)->Instance)
 206 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
 207 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
 208
 209 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
 210 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
 211 #define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)
 212 #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE
 213
 214 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE()                    EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
 215                                                                       EXTI->RTSR |= USB_WAKEUP_EXTI_LINE
 216
 217 #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE()                   EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE);\
 218                                                                       EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE)
 219
 220 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE()            EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\
 221                                                                       EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
 222                                                                       EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;\
 223                                                                       EXTI->FTSR |= USB_WAKEUP_EXTI_LINE
 224 #endif /* USB */
 225
 226 /**
 227   * @}
 228   */
 229
 230 /* Exported functions --------------------------------------------------------*/
 231 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
 232   * @{
 233   */
 234
 235 /* Initialization/de-initialization functions  ********************************/
 236 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
 237   * @{
 238   */
 239 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
 240 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
 241 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
 242 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
 243 /**
 244   * @}
 245   */
 246
 247 /* I/O operation functions  ***************************************************/
 248 /* Non-Blocking mode: Interrupt */
 249 /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
 250   * @{
 251   */
 252 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
 253 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
 254 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
 255
 256 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 257 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 258 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
 259 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
 260 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
 261 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
 262 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
 263 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 264 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 265 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
 266 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
 267 /**
 268   * @}
 269   */
 270
 271 /* Peripheral Control functions  **********************************************/
 272 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
 273   * @{
 274   */
 275 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
 276 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
 277 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
 278 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
 279 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 280 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 281 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 282 uint16_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 283 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 284 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 285 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 286 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
 287 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
 288 /**
 289   * @}
 290   */
 291
 292 /* Peripheral State functions  ************************************************/
 293 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
 294   * @{
 295   */
 296 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
 297 /**
 298   * @}
 299   */
 300
 301 /**
 302   * @}
 303   */
 304
 305 /* Private constants ---------------------------------------------------------*/
 306 /** @defgroup PCD_Private_Constants PCD Private Constants
 307   * @{
 308   */
 309 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
 310   * @{
 311   */
 312 #if defined (USB_OTG_FS)
 313 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE                            ((uint32_t)0x08)
 314 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE                           ((uint32_t)0x0C)
 315 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE                    ((uint32_t)0x10)
 316
 317 #define USB_OTG_FS_WAKEUP_EXTI_LINE                                   ((uint32_t)0x00040000)  /*!< External interrupt line 18 Connected to the USB EXTI Line */
 318 #endif /* USB_OTG_FS */
 319
 320 #if defined (USB)
 321 #define  USB_WAKEUP_EXTI_LINE                                         ((uint32_t)0x00040000)  /*!< External interrupt line 18 Connected to the USB EXTI Line */
 322 #endif /* USB */
 323 /**
 324   * @}
 325   */
 326
 327 #if defined (USB)
 328 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
 329   * @{
 330   */
 331 #define PCD_EP0MPS_64                                                 DEP0CTL_MPS_64
 332 #define PCD_EP0MPS_32                                                 DEP0CTL_MPS_32
 333 #define PCD_EP0MPS_16                                                 DEP0CTL_MPS_16
 334 #define PCD_EP0MPS_08                                                 DEP0CTL_MPS_8
 335 /**
 336   * @}
 337   */
 338
 339 /** @defgroup PCD_ENDP PCD ENDP
 340   * @{
 341   */
 342 #define PCD_ENDP0                                                     ((uint8_t)0)
 343 #define PCD_ENDP1                                                     ((uint8_t)1)
 344 #define PCD_ENDP2                                                     ((uint8_t)2)
 345 #define PCD_ENDP3                                                     ((uint8_t)3)
 346 #define PCD_ENDP4                                                     ((uint8_t)4)
 347 #define PCD_ENDP5                                                     ((uint8_t)5)
 348 #define PCD_ENDP6                                                     ((uint8_t)6)
 349 #define PCD_ENDP7                                                     ((uint8_t)7)
 350 /**
 351   * @}
 352   */
 353
 354 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
 355   * @{
 356   */
 357 #define PCD_SNG_BUF                                                   0
 358 #define PCD_DBL_BUF                                                   1
 359 /**
 360   * @}
 361   */
 362 #endif /* USB */
 363 /**
 364   * @}
 365   */
 366
 367 /* Private macros ------------------------------------------------------------*/
 368 /** @addtogroup PCD_Private_Macros PCD Private Macros
 369  * @{
 370  */
 371 #if defined (USB)
 372 /* SetENDPOINT */
 373 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue)  (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue))
 374
 375 /* GetENDPOINT */
 376 #define PCD_GET_ENDPOINT(USBx, bEpNum)            (*(&(USBx)->EP0R + (bEpNum) * 2))
 377
 378 /* ENDPOINT transfer */
 379 #define USB_EP0StartXfer                          USB_EPStartXfer
 380
 381 /**
 382   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
 383   * @param  USBx: USB peripheral instance register address.
 384   * @param  bEpNum: Endpoint Number.
 385   * @param  wType: Endpoint Type.
 386   * @retval None
 387   */
 388 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
 389                                   ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) )))
 390
 391 /**
 392   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
 393   * @param  USBx: USB peripheral instance register address.
 394   * @param  bEpNum: Endpoint Number.
 395   * @retval Endpoint Type
 396   */
 397 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
 398
 399 /**
 400   * @brief free buffer used from the application realizing it to the line
 401           toggles bit SW_BUF in the double buffered endpoint register
 402   * @param  USBx: USB peripheral instance register address.
 403   * @param  bEpNum: Endpoint Number.
 404   * @param  bDir: Direction
 405   * @retval None
 406   */
 407 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
 408 {\
 409   if ((bDir) == PCD_EP_DBUF_OUT)\
 410   { /* OUT double buffered endpoint */\
 411     PCD_TX_DTOG((USBx), (bEpNum));\
 412   }\
 413   else if ((bDir) == PCD_EP_DBUF_IN)\
 414   { /* IN double buffered endpoint */\
 415     PCD_RX_DTOG((USBx), (bEpNum));\
 416   }\
 417 }
 418
 419 /**
 420   * @brief gets direction of the double buffered endpoint
 421   * @param   USBx: USB peripheral instance register address.
 422   * @param   bEpNum: Endpoint Number.
 423   * @retval EP_DBUF_OUT, EP_DBUF_IN,
 424   *         EP_DBUF_ERR if the endpoint counter not yet programmed.
 425   */
 426 #define PCD_GET_DB_DIR(USBx, bEpNum)\
 427 {\
 428   if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
 429     return(PCD_EP_DBUF_OUT);\
 430   else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
 431     return(PCD_EP_DBUF_IN);\
 432   else\
 433     return(PCD_EP_DBUF_ERR);\
 434 }
 435
 436 /**
 437   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
 438   * @param  USBx: USB peripheral instance register address.
 439   * @param  bEpNum: Endpoint Number.
 440   * @param  wState: new state
 441   * @retval None
 442   */
 443 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
 444    \
 445     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
 446    /* toggle first bit ? */     \
 447    if((USB_EPTX_DTOG1 & (wState))!= 0)\
 448    {                                                                            \
 449      _wRegVal ^= USB_EPTX_DTOG1;        \
 450    }                                                                            \
 451    /* toggle second bit ?  */         \
 452    if((USB_EPTX_DTOG2 & (wState))!= 0)      \
 453    {                                                                            \
 454      _wRegVal ^= USB_EPTX_DTOG2;        \
 455    }                                                                            \
 456    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\
 457   } /* PCD_SET_EP_TX_STATUS */
 458
 459 /**
 460   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
 461   * @param  USBx: USB peripheral instance register address.
 462   * @param  bEpNum: Endpoint Number.
 463   * @param  wState: new state
 464   * @retval None
 465   */
 466 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
 467     register uint16_t _wRegVal;   \
 468     \
 469     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
 470     /* toggle first bit ? */  \
 471     if((USB_EPRX_DTOG1 & (wState))!= 0) \
 472     {                                                                             \
 473       _wRegVal ^= USB_EPRX_DTOG1;  \
 474     }                                                                             \
 475     /* toggle second bit ? */  \
 476     if((USB_EPRX_DTOG2 & (wState))!= 0) \
 477     {                                                                             \
 478       _wRegVal ^= USB_EPRX_DTOG2;  \
 479     }                                                                             \
 480     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
 481   } /* PCD_SET_EP_RX_STATUS */
 482
 483 /**
 484   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
 485   * @param  USBx: USB peripheral instance register address.
 486   * @param  bEpNum: Endpoint Number.
 487   * @param  wStaterx: new state.
 488   * @param  wStatetx: new state.
 489   * @retval None
 490   */
 491 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
 492     register uint32_t _wRegVal;   \
 493     \
 494     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
 495     /* toggle first bit ? */  \
 496     if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
 497     {                                                                                    \
 498       _wRegVal ^= USB_EPRX_DTOG1;  \
 499     }                                                                                    \
 500     /* toggle second bit ? */  \
 501     if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
 502     {                                                                                    \
 503       _wRegVal ^= USB_EPRX_DTOG2;  \
 504     }                                                                                    \
 505     /* toggle first bit ? */     \
 506     if((USB_EPTX_DTOG1 & (wStatetx))!= 0)      \
 507     {                                                                                    \
 508       _wRegVal ^= USB_EPTX_DTOG1;        \
 509     }                                                                                    \
 510     /* toggle second bit ?  */         \
 511     if((USB_EPTX_DTOG2 & (wStatetx))!= 0)      \
 512     {                                                                                    \
 513       _wRegVal ^= USB_EPTX_DTOG2;        \
 514     }                                                                                    \
 515     PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX);    \
 516   } /* PCD_SET_EP_TXRX_STATUS */
 517
 518 /**
 519   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
 520   *         /STAT_RX[1:0])
 521   * @param  USBx: USB peripheral instance register address.
 522   * @param  bEpNum: Endpoint Number.
 523   * @retval status
 524   */
 525 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
 526 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
 527
 528 /**
 529   * @brief  sets directly the VALID tx/rx-status into the endpoint register
 530   * @param  USBx: USB peripheral instance register address.
 531   * @param  bEpNum: Endpoint Number.
 532   * @retval None
 533   */
 534 #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
 535 #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
 536
 537 /**
 538   * @brief  checks stall condition in an endpoint.
 539   * @param  USBx: USB peripheral instance register address.
 540   * @param  bEpNum: Endpoint Number.
 541   * @retval TRUE = endpoint in stall condition.
 542   */
 543 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
 544                                    == USB_EP_TX_STALL)
 545 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
 546                                    == USB_EP_RX_STALL)
 547
 548 /**
 549   * @brief  set & clear EP_KIND bit.
 550   * @param  USBx: USB peripheral instance register address.
 551   * @param  bEpNum: Endpoint Number.
 552   * @retval None
 553   */
 554 #define PCD_SET_EP_KIND(USBx, bEpNum)    (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 555                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK))))
 556 #define PCD_CLEAR_EP_KIND(USBx, bEpNum)  (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 557                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
 558
 559 /**
 560   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
 561   * @param  USBx: USB peripheral instance register address.
 562   * @param  bEpNum: Endpoint Number.
 563   * @retval None
 564   */
 565 #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
 566 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
 567
 568 /**
 569   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
 570   * @param  USBx: USB peripheral instance register address.
 571   * @param  bEpNum: Endpoint Number.
 572   * @retval None
 573   */
 574 #define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
 575 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
 576
 577 /**
 578   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
 579   * @param  USBx: USB peripheral instance register address.
 580   * @param  bEpNum: Endpoint Number.
 581   * @retval None
 582   */
 583 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT((USBx), (bEpNum),\
 584                                    PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK))
 585 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT((USBx), (bEpNum),\
 586                                    PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK))
 587
 588 /**
 589   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
 590   * @param  USBx: USB peripheral instance register address.
 591   * @param  bEpNum: Endpoint Number.
 592   * @retval None
 593   */
 594 #define PCD_RX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 595                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
 596 #define PCD_TX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 597                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
 598
 599 /**
 600   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
 601   * @param  USBx: USB peripheral instance register address.
 602   * @param  bEpNum: Endpoint Number.
 603   * @retval None
 604   */
 605 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\
 606                                          {                                                              \
 607                                            PCD_RX_DTOG((USBx), (bEpNum));                               \
 608                                          }
 609 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\
 610                                          {                                                              \
 611                                             PCD_TX_DTOG((USBx), (bEpNum));                              \
 612                                          }
 613
 614 /**
 615   * @brief  Sets address in an endpoint register.
 616   * @param  USBx: USB peripheral instance register address.
 617   * @param  bEpNum: Endpoint Number.
 618   * @param  bAddr: Address.
 619   * @retval None
 620   */
 621 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
 622     USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr))
 623
 624 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
 625
 626 #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8)*2+     ((uint32_t)(USBx) + 0x400)))
 627 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+2)*2+  ((uint32_t)(USBx) + 0x400)))
 628 #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+4)*2+  ((uint32_t)(USBx) + 0x400)))
 629 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+6)*2+  ((uint32_t)(USBx) + 0x400)))
 630
 631 #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
 632     uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
 633     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
 634   }
 635
 636 /**
 637   * @brief  sets address of the tx/rx buffer.
 638   * @param  USBx: USB peripheral instance register address.
 639   * @param  bEpNum: Endpoint Number.
 640   * @param  wAddr: address to be set (must be word aligned).
 641   * @retval None
 642   */
 643 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
 644 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
 645
 646 /**
 647   * @brief  Gets address of the tx/rx buffer.
 648   * @param  USBx: USB peripheral instance register address.
 649   * @param  bEpNum: Endpoint Number.
 650   * @retval address of the buffer.
 651   */
 652 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
 653 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
 654
 655 /**
 656   * @brief  Sets counter of rx buffer with no. of blocks.
 657   * @param  dwReg: Register
 658   * @param  wCount: Counter.
 659   * @param  wNBlocks: no. of Blocks.
 660   * @retval None
 661   */
 662 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
 663     (wNBlocks) = (wCount) >> 5;\
 664     if(((wCount) & 0x1f) == 0)\
 665     {                                                  \
 666       (wNBlocks)--;\
 667     }                                                  \
 668     *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \
 669   }/* PCD_CALC_BLK32 */
 670
 671 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
 672     (wNBlocks) = (wCount) >> 1;\
 673     if(((wCount) & 0x1) != 0)\
 674     {                                                  \
 675       (wNBlocks)++;\
 676     }                                                  \
 677     *pdwReg = (uint16_t)((wNBlocks) << 10);\
 678   }/* PCD_CALC_BLK2 */
 679
 680 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount)  {\
 681     uint16_t wNBlocks;\
 682     if((wCount) > 62)                                \
 683     {                                                \
 684       PCD_CALC_BLK32((dwReg),(wCount),wNBlocks);     \
 685     }                                                \
 686     else                                             \
 687     {                                                \
 688       PCD_CALC_BLK2((dwReg),(wCount),wNBlocks);      \
 689     }                                                \
 690   }/* PCD_SET_EP_CNT_RX_REG */
 691
 692 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
 693     uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
 694     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
 695   }
 696
 697 /**
 698   * @brief  sets counter for the tx/rx buffer.
 699   * @param  USBx: USB peripheral instance register address.
 700   * @param  bEpNum: Endpoint Number.
 701   * @param  wCount: Counter value.
 702   * @retval None
 703   */
 704 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
 705
 706
 707 /**
 708   * @brief  gets counter of the tx buffer.
 709   * @param  USBx: USB peripheral instance register address.
 710   * @param  bEpNum: Endpoint Number.
 711   * @retval Counter value
 712   */
 713 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
 714 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
 715
 716 /**
 717   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
 718   * @param  USBx: USB peripheral instance register address.
 719   * @param  bEpNum: Endpoint Number.
 720   * @param  wBuf0Addr: buffer 0 address.
 721   * @retval Counter value
 722   */
 723 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
 724 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
 725
 726 /**
 727   * @brief  Sets addresses in a double buffer endpoint.
 728   * @param  USBx: USB peripheral instance register address.
 729   * @param  bEpNum: Endpoint Number.
 730   * @param  wBuf0Addr: buffer 0 address.
 731   * @param  wBuf1Addr = buffer 1 address.
 732   * @retval None
 733   */
 734 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
 735     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
 736     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
 737   } /* PCD_SET_EP_DBUF_ADDR */
 738
 739 /**
 740   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 741   * @param  USBx: USB peripheral instance register address.
 742   * @param  bEpNum: Endpoint Number.
 743   * @retval None
 744   */
 745 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
 746 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
 747
 748 /**
 749   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 750   * @param  USBx: USB peripheral instance register address.
 751   * @param  bEpNum: Endpoint Number.
 752   * @param  bDir: endpoint dir  EP_DBUF_OUT = OUT
 753   *         EP_DBUF_IN  = IN
 754   * @param  wCount: Counter value
 755   * @retval None
 756   */
 757 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount)  { \
 758     if((bDir) == PCD_EP_DBUF_OUT)\
 759       /* OUT endpoint */ \
 760     {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
 761     else if((bDir) == PCD_EP_DBUF_IN)\
 762       /* IN endpoint */ \
 763       *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount);  \
 764   } /* SetEPDblBuf0Count*/
 765
 766 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount)  { \
 767     if((bDir) == PCD_EP_DBUF_OUT)\
 768     {/* OUT endpoint */                                       \
 769       PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount));           \
 770     }                                                         \
 771     else if((bDir) == PCD_EP_DBUF_IN)\
 772     {/* IN endpoint */                                        \
 773       *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
 774     }                                                         \
 775   } /* SetEPDblBuf1Count */
 776
 777 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
 778     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
 779     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
 780   } /* PCD_SET_EP_DBUF_CNT  */
 781
 782 /**
 783   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
 784   * @param  USBx: USB peripheral instance register address.
 785   * @param  bEpNum: Endpoint Number.
 786   * @retval None
 787   */
 788 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
 789 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
 790
 791 #endif /* USB */
 792
 793 /** @defgroup PCD_Instance_definition PCD Instance definition
 794   * @{
 795   */
 796 #define IS_PCD_ALL_INSTANCE                                        IS_USB_ALL_INSTANCE
 797 /**
 798   * @}
 799   */
 800
 801 /**
 802   * @}
 803   */
 804
 805 /**
 806   * @}
 807   */
 808
 809 /**
 810   * @}
 811   */
 812
 813 #endif /* STM32F102x6 || STM32F102xB || */
 814        /* STM32F103x6 || STM32F103xB || */
 815        /* STM32F103xE || STM32F103xG || */
 816        /* STM32F105xC || STM32F107xC    */
 817
 818 #ifdef __cplusplus
 819 }
 820 #endif
 821
 822
 823 #endif /* __STM32F1xx_HAL_PCD_H */
 824
 825 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/