2 ******************************************************************************
3 * @file stm32f3xx_hal_smbus.c
4 * @author MCD Application Team
7 * @brief SMBUS HAL module driver.
9 * This file provides firmware functions to manage the following
10 * functionalities of the System Management Bus (SMBus) peripheral,
11 * based on I2C principales of operation :
12 * + Initialization and de-initialization functions
13 * + IO operation functions
14 * + Peripheral State and Errors functions
17 ==============================================================================
18 ##### How to use this driver #####
19 ==============================================================================
21 The SMBUS HAL driver can be used as follows:
23 (#) Declare a SMBUS_HandleTypeDef handle structure, for example:
24 SMBUS_HandleTypeDef hsmbus;
26 (#)Initialize the SMBUS low level resources by implement the HAL_SMBUS_MspInit ()API:
27 (##) Enable the SMBUSx interface clock
28 (##) SMBUS pins configuration
29 (+++) Enable the clock for the SMBUS GPIOs
30 (+++) Configure SMBUS pins as alternate function open-drain
31 (##) NVIC configuration if you need to use interrupt process
32 (+++) Configure the SMBUSx interrupt priority
33 (+++) Enable the NVIC SMBUS IRQ Channel
35 (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Adressing Mode,
36 Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode,
37 Peripheral mode and Packet Error Check mode in the hsmbus Init structure.
39 (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API:
40 (+) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
41 by calling the customed HAL_SMBUS_MspInit(&hsmbus) API.
43 (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady()
45 (#) For SMBUS IO operations, only one mode of operations is available within this driver :
47 *** Interrupt mode IO operation ***
48 ===================================
50 (+) Transmit in master/host SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Master_Transmit_IT()
51 (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback is executed and user can
52 add his own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback
53 (+) Receive in master/host SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Master_Receive_IT()
54 (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback is executed and user can
55 add his own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback
56 (+) Abort a master/host SMBUS process commnunication with Interrupt using HAL_SMBUS_Master_Abort_IT()
57 (++) The associated previous transfer callback is called at the end of abort process
58 (++) mean HAL_SMBUS_MasterTxCpltCallback in case of previous state was master transmit
59 (++) mean HAL_SMBUS_MasterRxCpltCallback in case of previous state was master receive
60 (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode
61 using HAL_SMBUS_Slave_Listen_IT() HAL_SMBUS_DisableListen_IT()
62 (++) When address slave/device SMBUS match, HAL_SMBUS_SlaveAddrCallback is executed and user can
63 add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read).
64 (++) At Listen mode end HAL_SMBUS_SlaveListenCpltCallback is executed and user can
65 add his own code by customization of function pointer HAL_SMBUS_SlaveListenCpltCallback
66 (+) Transmit in slave/device SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Slave_Transmit_IT()
67 (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback is executed and user can
68 add his own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback
69 (+) Receive in slave/device SMBUS mode an amount of data in non blocking mode using HAL_SMBUS_Slave_Receive_IT()
70 (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback is executed and user can
71 add his own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback
72 (+) Enable/Disable the SMBUS alert mode using HAL_SMBUS_EnableAlert_IT() HAL_SMBUS_DisableAlert_IT()
73 (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and user can
74 add his own code by customization of function pointer HAL_SMBUS_ErrorCallback
75 to check the Alert Error Code using function HAL_SMBUS_GetError()
76 (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError()
77 (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and user can
78 add his own code by customization of function pointer HAL_SMBUS_ErrorCallback
79 to check the Error Code using function HAL_SMBUS_GetError()
81 *** SMBUS HAL driver macros list ***
82 ==================================
84 Below the list of most used macros in SMBUS HAL driver.
86 (+) __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral
87 (+) __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral
88 (+) __HAL_SMBUS_GET_FLAG : Checks whether the specified SMBUS flag is set or not
89 (+) __HAL_SMBUS_CLEAR_FLAG : Clears the specified SMBUS pending flag
90 (+) __HAL_SMBUS_ENABLE_IT: Enables the specified SMBUS interrupt
91 (+) __HAL_SMBUS_DISABLE_IT: Disables the specified SMBUS interrupt
94 (@) You can refer to the SMBUS HAL driver header file for more useful macros
98 ******************************************************************************
101 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
103 * Redistribution and use in source and binary forms, with or without modification,
104 * are permitted provided that the following conditions are met:
105 * 1. Redistributions of source code must retain the above copyright notice,
106 * this list of conditions and the following disclaimer.
107 * 2. Redistributions in binary form must reproduce the above copyright notice,
108 * this list of conditions and the following disclaimer in the documentation
109 * and/or other materials provided with the distribution.
110 * 3. Neither the name of STMicroelectronics nor the names of its contributors
111 * may be used to endorse or promote products derived from this software
112 * without specific prior written permission.
114 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
115 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
116 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
117 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
118 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
119 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
121 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
122 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
123 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
125 ******************************************************************************
128 /* Includes ------------------------------------------------------------------*/
129 #include "stm32f3xx_hal.h"
131 /** @addtogroup STM32F3xx_HAL_Driver
135 /** @defgroup SMBUS SMBUS HAL module driver
136 * @brief SMBUS HAL module driver
140 #ifdef HAL_SMBUS_MODULE_ENABLED
142 /* Private typedef -----------------------------------------------------------*/
143 /* Private define ------------------------------------------------------------*/
144 /** @defgroup SMBUS_Private_Define SMBUS Private Define
147 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! SMBUS TIMING clear register Mask */
148 #define HAL_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */
149 #define HAL_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */
150 #define HAL_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */
151 #define HAL_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */
152 #define HAL_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */
153 #define HAL_TIMEOUT_TC ((uint32_t)25) /* 25 ms */
154 #define HAL_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */
155 #define HAL_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */
156 #define MAX_NBYTE_SIZE 255
161 /* Private macro -------------------------------------------------------------*/
162 /** @defgroup SMBUS_Private_Macro SMBUS Private Macro
165 #define __SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR)
166 #define __SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
171 /* Private variables ---------------------------------------------------------*/
172 /* Private function prototypes -----------------------------------------------*/
173 /** @defgroup SMBUS_Private_Functions SMBUS Private Functions
176 static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
178 static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
179 static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
180 static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus);
181 static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus);
183 static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
188 /* Exported functions ---------------------------------------------------------*/
190 /** @defgroup SMBUS_Exported_Functions SMBUS Exported Functions
194 /** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
195 * @brief Initialization and Configuration functions
198 ===============================================================================
199 ##### Initialization and de-initialization functions #####
200 ===============================================================================
201 [..] This subsection provides a set of functions allowing to initialize and
202 de-initialiaze the SMBUSx peripheral:
204 (+) User must Implement HAL_SMBUS_MspInit() function in which he configures
205 all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
207 (+) Call the function HAL_SMBUS_Init() to configure the selected device with
208 the selected configuration:
211 (++) Analog Filer mode
213 (++) Addressing mode (Master, Slave)
214 (++) Dual Addressing mode
216 (++) Own Address 2 Mask
217 (++) General call mode
219 (++) Packet Error Check mode
223 (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration
224 of the selected SMBUSx periperal.
231 * @brief Initializes the SMBUS according to the specified parameters
232 * in the SMBUS_InitTypeDef and create the associated handle.
233 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
234 * the configuration information for the specified SMBUS.
237 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
239 /* Check the SMBUS handle allocation */
240 if(hsmbus == HAL_NULL)
245 /* Check the parameters */
246 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
247 assert_param(IS_SMBUS_ANALOG_FILTER(hsmbus->Init.AnalogFilter));
248 assert_param(IS_SMBUS_OWN_ADDRESS1(hsmbus->Init.OwnAddress1));
249 assert_param(IS_SMBUS_ADDRESSING_MODE(hsmbus->Init.AddressingMode));
250 assert_param(IS_SMBUS_DUAL_ADDRESS(hsmbus->Init.DualAddressMode));
251 assert_param(IS_SMBUS_OWN_ADDRESS2(hsmbus->Init.OwnAddress2));
252 assert_param(IS_SMBUS_OWN_ADDRESS2_MASK(hsmbus->Init.OwnAddress2Masks));
253 assert_param(IS_SMBUS_GENERAL_CALL(hsmbus->Init.GeneralCallMode));
254 assert_param(IS_SMBUS_NO_STRETCH(hsmbus->Init.NoStretchMode));
255 assert_param(IS_SMBUS_PEC(hsmbus->Init.PacketErrorCheckMode));
256 assert_param(IS_SMBUS_PERIPHERAL_MODE(hsmbus->Init.PeripheralMode));
258 if(hsmbus->State == HAL_SMBUS_STATE_RESET)
260 /* Init the low level hardware : GPIO, CLOCK, NVIC */
261 HAL_SMBUS_MspInit(hsmbus);
264 hsmbus->State = HAL_SMBUS_STATE_BUSY;
266 /* Disable the selected SMBUS peripheral */
267 __HAL_SMBUS_DISABLE(hsmbus);
269 /*---------------------------- SMBUSx TIMINGR Configuration ------------------------*/
270 /* Configure SMBUSx: Frequency range */
271 hsmbus->Instance->TIMINGR = hsmbus->Init.Timing & TIMING_CLEAR_MASK;
273 /*---------------------------- SMBUSx TIMEOUTR Configuration ------------------------*/
274 /* Configure SMBUSx: Bus Timeout */
275 hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TIMOUTEN;
276 hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TEXTEN;
277 hsmbus->Instance->TIMEOUTR = hsmbus->Init.SMBusTimeout;
279 /*---------------------------- SMBUSx OAR1 Configuration -----------------------*/
280 /* Configure SMBUSx: Own Address1 and ack own address1 mode */
281 hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
283 if(hsmbus->Init.OwnAddress1 != 0)
285 if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
287 hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | hsmbus->Init.OwnAddress1);
289 else /* SMBUS_ADDRESSINGMODE_10BIT */
291 hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hsmbus->Init.OwnAddress1);
295 /*---------------------------- SMBUSx CR2 Configuration ------------------------*/
296 /* Configure SMBUSx: Addressing Master mode */
297 if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT)
299 hsmbus->Instance->CR2 = (I2C_CR2_ADD10);
301 /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */
302 /* AUTOEND and NACK bit will be manage during Transfer process */
303 hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
305 /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
306 /* Configure SMBUSx: Dual mode and Own Address2 */
307 hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8));
309 /*---------------------------- SMBUSx CR1 Configuration ------------------------*/
310 /* Configure SMBUSx: Generalcall and NoStretch mode */
311 hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter);
313 /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */
314 if( (hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLED)
315 && ( (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP) ) )
317 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
320 /* Enable the selected SMBUS peripheral */
321 __HAL_SMBUS_ENABLE(hsmbus);
323 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
324 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
325 hsmbus->State = HAL_SMBUS_STATE_READY;
331 * @brief DeInitializes the SMBUS peripheral.
332 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
333 * the configuration information for the specified SMBUS.
336 HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus)
338 /* Check the SMBUS handle allocation */
339 if(hsmbus == HAL_NULL)
344 /* Check the parameters */
345 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
347 hsmbus->State = HAL_SMBUS_STATE_BUSY;
349 /* Disable the SMBUS Peripheral Clock */
350 __HAL_SMBUS_DISABLE(hsmbus);
352 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
353 HAL_SMBUS_MspDeInit(hsmbus);
355 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
356 hsmbus->PreviousState = HAL_SMBUS_STATE_RESET;
357 hsmbus->State = HAL_SMBUS_STATE_RESET;
360 __HAL_UNLOCK(hsmbus);
366 * @brief SMBUS MSP Init.
367 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
368 * the configuration information for the specified SMBUS.
371 __weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus)
373 /* NOTE : This function Should not be modified, when the callback is needed,
374 the HAL_SMBUS_MspInit could be implemented in the user file
379 * @brief SMBUS MSP DeInit
380 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
381 * the configuration information for the specified SMBUS.
384 __weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus)
386 /* NOTE : This function Should not be modified, when the callback is needed,
387 the HAL_SMBUS_MspDeInit could be implemented in the user file
395 /** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
396 * @brief Data transfers functions
399 ===============================================================================
400 ##### IO operation functions #####
401 ===============================================================================
403 This subsection provides a set of functions allowing to manage the SMBUS data
406 (#) Blocking mode function to check if device is ready for usage is :
407 (++) HAL_SMBUS_IsDeviceReady()
409 (#) There is only one mode of transfer:
410 (++) No-Blocking mode : The communication is performed using Interrupts.
411 These functions return the status of the transfer startup.
412 The end of the data processing will be indicated through the
413 dedicated SMBUS IRQ when using Interrupt mode.
415 (#) No-Blocking mode functions with Interrupt are :
416 (++) HAL_SMBUS_Master_Transmit_IT()
417 (++) HAL_SMBUS_Master_Receive_IT()
418 (++) HAL_SMBUS_Slave_Transmit_IT()
419 (++) HAL_SMBUS_Slave_Receive_IT()
420 (++) HAL_SMBUS_Slave_Listen_IT() or alias HAL_SMBUS_EnableListen_IT()
421 (++) HAL_SMBUS_DisableListen_IT()
422 (++) HAL_SMBUS_EnableAlert_IT()
423 (++) HAL_SMBUS_DisableAlert_IT()
425 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
426 (++) HAL_SMBUS_MasterTxCpltCallback()
427 (++) HAL_SMBUS_MasterRxCpltCallback()
428 (++) HAL_SMBUS_SlaveTxCpltCallback()
429 (++) HAL_SMBUS_SlaveRxCpltCallback()
430 (++) HAL_SMBUS_SlaveAddrCallback() or alias HAL_SMBUS_AddrCallback()
431 (++) HAL_SMBUS_SlaveListenCpltCallback() or alias HAL_SMBUS_ListenCpltCallback()
432 (++) HAL_SMBUS_ErrorCallback()
438 /** @defgroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt
443 * @brief Transmit in master/host SMBUS mode an amount of data in no-blocking mode with Interrupt
444 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
445 * the configuration information for the specified SMBUS.
446 * @param DevAddress: Target device address
447 * @param pData: Pointer to data buffer
448 * @param Size: Amount of data to be sent
449 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
452 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
454 /* Check the parameters */
455 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
457 if(hsmbus->State == HAL_SMBUS_STATE_READY)
462 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
463 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
464 /* Prepare transfer parameters */
465 hsmbus->pBuffPtr = pData;
466 hsmbus->XferCount = Size;
467 hsmbus->XferOptions = XferOptions;
469 /* In case of Quick command, remove autoend mode */
470 /* Manage the stop generation by software */
471 if(hsmbus->pBuffPtr == HAL_NULL)
473 hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
476 if(Size > MAX_NBYTE_SIZE)
478 hsmbus->XferSize = MAX_NBYTE_SIZE;
482 hsmbus->XferSize = Size;
485 /* Send Slave Address */
486 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
487 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
489 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE);
493 /* If transfer direction not change, do not generate Restart Condition */
494 /* Mean Previous state is same as current state */
495 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
497 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
499 /* Else transfer direction change, so generate Restart with new transfer direction */
502 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE);
505 /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
506 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
507 if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)
514 /* Process Unlocked */
515 __HAL_UNLOCK(hsmbus);
517 /* Note : The SMBUS interrupts must be enabled after unlocking current process
518 to avoid the risk of SMBUS interrupt handle execution before current
520 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
531 * @brief Receive in master/host SMBUS mode an amount of data in no-blocking mode with Interrupt
532 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
533 * the configuration information for the specified SMBUS.
534 * @param DevAddress: Target device address
535 * @param pData: Pointer to data buffer
536 * @param Size: Amount of data to be sent
537 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
540 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
542 /* Check the parameters */
543 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
545 if(hsmbus->State == HAL_SMBUS_STATE_READY)
550 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
551 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
553 /* Prepare transfer parameters */
554 hsmbus->pBuffPtr = pData;
555 hsmbus->XferCount = Size;
556 hsmbus->XferOptions = XferOptions;
558 /* In case of Quick command, remove autoend mode */
559 /* Manage the stop generation by software */
560 if(hsmbus->pBuffPtr == HAL_NULL)
562 hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
565 if(Size > MAX_NBYTE_SIZE)
567 hsmbus->XferSize = MAX_NBYTE_SIZE;
571 hsmbus->XferSize = Size;
574 /* Send Slave Address */
575 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
576 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
578 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ);
582 /* If transfer direction not change, do not generate Restart Condition */
583 /* Mean Previous state is same as current state */
584 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
586 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
588 /* Else transfer direction change, so generate Restart with new transfer direction */
591 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ);
595 /* Process Unlocked */
596 __HAL_UNLOCK(hsmbus);
598 /* Note : The SMBUS interrupts must be enabled after unlocking current process
599 to avoid the risk of SMBUS interrupt handle execution before current
601 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
612 * @brief Abort a master/host SMBUS process commnunication with Interrupt
613 * @note : This abort can be called only if state is ready
614 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
615 * the configuration information for the specified SMBUS.
616 * @param DevAddress: Target device address
619 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress)
621 if(hsmbus->State == HAL_SMBUS_STATE_READY)
626 /* Keep the same state as previous */
627 /* to perform as well the call of the corresponding end of transfer callback */
628 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
630 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
632 else if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
634 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
638 /* Wrong usage of abort function */
639 /* This function should be used only in case of abort monitored by master device */
642 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
644 /* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */
645 /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
646 SMBUS_TransferConfig(hsmbus, DevAddress, 1, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
648 /* Process Unlocked */
649 __HAL_UNLOCK(hsmbus);
651 /* Note : The SMBUS interrupts must be enabled after unlocking current process
652 to avoid the risk of SMBUS interrupt handle execution before current
654 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
656 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
658 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
660 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
672 * @brief Transmit in slave/device SMBUS mode an amount of data in no-blocking mode with Interrupt
673 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
674 * the configuration information for the specified SMBUS.
675 * @param pData: Pointer to data buffer
676 * @param Size: Amount of data to be sent
677 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
680 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
682 /* Check the parameters */
683 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
685 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
687 if((pData == HAL_NULL) || (Size == 0))
692 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
693 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_TX);
698 hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_TX;
699 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
701 /* Set SBC bit to manage Acknowledge at each bit */
702 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
704 /* Enable Address Acknowledge */
705 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
707 /* Prepare transfer parameters */
708 hsmbus->pBuffPtr = pData;
709 hsmbus->XferSize = Size;
710 hsmbus->XferCount = Size;
711 hsmbus->XferOptions = XferOptions;
713 if(Size > MAX_NBYTE_SIZE)
715 hsmbus->XferSize = MAX_NBYTE_SIZE;
719 hsmbus->XferSize = Size;
722 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
723 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
725 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
729 /* Set NBYTE to transmit */
730 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
732 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
733 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
734 if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)
741 /* Clear ADDR flag after prepare the transfer parameters */
742 /* This action will generate an acknowledge to the HOST */
743 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
745 /* Process Unlocked */
746 __HAL_UNLOCK(hsmbus);
748 /* Note : The SMBUS interrupts must be enabled after unlocking current process
749 to avoid the risk of SMBUS interrupt handle execution before current
751 /* REnable ADDR interrupt */
752 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX | SMBUS_IT_ADDR);
763 * @brief Receive in slave/device SMBUS mode an amount of data in no-blocking mode with Interrupt
764 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
765 * the configuration information for the specified SMBUS.
766 * @param pData: Pointer to data buffer
767 * @param Size: Amount of data to be sent
768 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
771 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
773 /* Check the parameters */
774 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
776 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
778 if((pData == HAL_NULL) || (Size == 0))
783 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
784 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_RX);
789 hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_RX;
790 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
792 /* Set SBC bit to manage Acknowledge at each bit */
793 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
795 /* Enable Address Acknowledge */
796 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
798 /* Prepare transfer parameters */
799 hsmbus->pBuffPtr = pData;
800 hsmbus->XferSize = Size;
801 hsmbus->XferCount = Size;
802 hsmbus->XferOptions = XferOptions;
804 /* Set NBYTE to receive */
805 /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */
806 /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
807 /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
808 /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
809 if((hsmbus->XferSize == 1) || ((hsmbus->XferSize == 2) && (__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
811 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
815 SMBUS_TransferConfig(hsmbus,0, 1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
818 /* Clear ADDR flag after prepare the transfer parameters */
819 /* This action will generate an acknowledge to the HOST */
820 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
822 /* Process Unlocked */
823 __HAL_UNLOCK(hsmbus);
825 /* Note : The SMBUS interrupts must be enabled after unlocking current process
826 to avoid the risk of SMBUS interrupt handle execution before current
828 /* REnable ADDR interrupt */
829 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_ADDR);
840 * @brief This function enable the Address listen mode
841 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
842 * the configuration information for the specified SMBUS.
845 HAL_StatusTypeDef HAL_SMBUS_Slave_Listen_IT(SMBUS_HandleTypeDef *hsmbus)
847 hsmbus->State = HAL_SMBUS_STATE_LISTEN;
849 /* Enable the Address Match interrupt */
850 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ADDR);
856 * @brief This function disable the Address listen mode
857 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
858 * the configuration information for the specified SMBUS.
861 HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus)
863 /* Disable Address listen mode only if a transfer is not ongoing */
864 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
866 hsmbus->State = HAL_SMBUS_STATE_READY;
868 /* Disable the Address Match interrupt */
869 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
880 * @brief This function enable the SMBUS alert mode.
881 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
882 * the configuration information for the specified SMBUSx peripheral.
885 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
887 /* Enable SMBus alert */
888 hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN;
890 /* Clear ALERT flag */
891 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
893 /* Enable Alert Interrupt */
894 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ALERT);
899 * @brief This function disable the SMBUS alert mode.
900 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
901 * the configuration information for the specified SMBUSx peripheral.
904 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
906 /* Enable SMBus alert */
907 hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN;
909 /* Disable Alert Interrupt */
910 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ALERT);
919 /** @defgroup Blocking_mode_Polling Blocking mode Polling
923 * @brief Checks if target device is ready for communication.
924 * @note This function is used with Memory devices
925 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
926 * the configuration information for the specified SMBUS.
927 * @param DevAddress: Target device address
928 * @param Trials: Number of trials
929 * @param Timeout: Timeout duration
932 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
934 uint32_t tickstart = 0;
936 __IO uint32_t SMBUS_Trials = 0;
938 if(hsmbus->State == HAL_SMBUS_STATE_READY)
940 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET)
948 hsmbus->State = HAL_SMBUS_STATE_BUSY;
949 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
954 hsmbus->Instance->CR2 = __HAL_SMBUS_GENERATE_START(hsmbus->Init.AddressingMode,DevAddress);
956 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
957 /* Wait until STOPF flag is set or a NACK flag is set*/
958 tickstart = HAL_GetTick();
959 while((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT))
961 if(Timeout != HAL_MAX_DELAY)
963 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
965 /* Device is ready */
966 hsmbus->State = HAL_SMBUS_STATE_READY;
968 /* Process Unlocked */
969 __HAL_UNLOCK(hsmbus);
975 /* Check if the NACKF flag has not been set */
976 if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET)
978 /* Wait until STOPF flag is reset */
979 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
984 /* Clear STOP Flag */
985 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
987 /* Device is ready */
988 hsmbus->State = HAL_SMBUS_STATE_READY;
990 /* Process Unlocked */
991 __HAL_UNLOCK(hsmbus);
997 /* Wait until STOPF flag is reset */
998 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
1003 /* Clear NACK Flag */
1004 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
1006 /* Clear STOP Flag, auto generated with autoend*/
1007 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
1010 /* Check if the maximum allowed number of trials has been reached */
1011 if (SMBUS_Trials++ == Trials)
1014 hsmbus->Instance->CR2 |= I2C_CR2_STOP;
1016 /* Wait until STOPF flag is reset */
1017 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
1022 /* Clear STOP Flag */
1023 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
1025 }while(SMBUS_Trials < Trials);
1027 hsmbus->State = HAL_SMBUS_STATE_READY;
1029 /* Process Unlocked */
1030 __HAL_UNLOCK(hsmbus);
1043 /** @defgroup IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
1048 * @brief This function handles SMBUS event interrupt request.
1049 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1050 * the configuration information for the specified SMBUS.
1053 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
1055 uint32_t tmpisrvalue = 0;
1057 /* Use a local variable to store the current ISR flags */
1058 /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
1059 tmpisrvalue = __SMBUS_GET_ISR_REG(hsmbus);
1061 /* SMBUS in mode Transmitter ---------------------------------------------------*/
1062 if (((__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET))
1064 /* Slave mode selected */
1065 if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
1067 SMBUS_Slave_ISR(hsmbus);
1069 /* Master mode selected */
1070 else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX)
1072 SMBUS_Master_ISR(hsmbus);
1076 /* SMBUS in mode Receiver ----------------------------------------------------*/
1077 if (((__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET))
1079 /* Slave mode selected */
1080 if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
1082 SMBUS_Slave_ISR(hsmbus);
1084 /* Master mode selected */
1085 else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX)
1087 SMBUS_Master_ISR(hsmbus);
1091 /* SMBUS in mode Listener Only --------------------------------------------------*/
1092 if (((__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (__SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))
1093 && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET)))
1095 if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
1097 SMBUS_Slave_ISR(hsmbus);
1103 * @brief This function handles SMBUS error interrupt request.
1104 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1105 * the configuration information for the specified SMBUS.
1108 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
1110 /* SMBUS Bus error interrupt occurred ------------------------------------*/
1111 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
1113 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR;
1115 /* Clear BERR flag */
1116 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR);
1119 /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
1120 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_OVR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
1122 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR;
1124 /* Clear OVR flag */
1125 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR);
1128 /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
1129 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ARLO) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
1131 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO;
1133 /* Clear ARLO flag */
1134 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO);
1137 /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/
1138 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
1140 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT;
1142 /* Clear TIMEOUT flag */
1143 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT);
1146 /* SMBUS Alert error interrupt occurred -----------------------------------------------*/
1147 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ALERT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
1149 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT;
1151 /* Clear ALERT flag */
1152 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
1155 /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/
1156 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_PECERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
1158 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR;
1160 /* Clear PEC error flag */
1161 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
1164 /* Call the Error Callback in case of Error detected */
1165 if((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE)&&(hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF))
1167 /* Do not Reset the the HAL state in case of ALERT error */
1168 if((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT)
1170 if(((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
1171 || ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX))
1173 /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX */
1174 /* keep HAL_SMBUS_STATE_LISTEN if set */
1175 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
1176 hsmbus->State = HAL_SMBUS_STATE_LISTEN;
1180 /* Call the Error callback to prevent upper layer */
1181 HAL_SMBUS_ErrorCallback(hsmbus);
1186 * @brief Master Tx Transfer completed callbacks.
1187 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1188 * the configuration information for the specified SMBUS.
1191 __weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
1193 /* NOTE : This function Should not be modified, when the callback is needed,
1194 the HAL_SMBUS_TxCpltCallback could be implemented in the user file
1199 * @brief Master Rx Transfer completed callbacks.
1200 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1201 * the configuration information for the specified SMBUS.
1204 __weak void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
1206 /* NOTE : This function Should not be modified, when the callback is needed,
1207 the HAL_SMBUS_TxCpltCallback could be implemented in the user file
1211 /** @brief Slave Tx Transfer completed callbacks.
1212 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1213 * the configuration information for the specified SMBUS.
1216 __weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
1218 /* NOTE : This function Should not be modified, when the callback is needed,
1219 the HAL_SMBUS_TxCpltCallback could be implemented in the user file
1224 * @brief Slave Rx Transfer completed callbacks.
1225 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1226 * the configuration information for the specified SMBUS.
1229 __weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
1231 /* NOTE : This function Should not be modified, when the callback is needed,
1232 the HAL_SMBUS_TxCpltCallback could be implemented in the user file
1237 * @brief Slave Address Match callbacks.
1238 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1239 * the configuration information for the specified SMBUS.
1240 * @param TransferDirection: Master request Transfer Direction (Write/Read)
1241 * @param AddrMatchCode: Address Match Code
1244 __weak void HAL_SMBUS_SlaveAddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
1246 /* NOTE : This function Should not be modified, when the callback is needed,
1247 the HAL_SMBUS_SlaveAddrCallback could be implemented in the user file
1252 * @brief Listen Complete callbacks.
1253 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1254 * the configuration information for the specified SMBUS.
1257 __weak void HAL_SMBUS_SlaveListenCpltCallback(SMBUS_HandleTypeDef *hsmbus)
1259 /* NOTE : This function Should not be modified, when the callback is needed,
1260 the HAL_SMBUS_SlaveListenCpltCallback could be implemented in the user file
1265 * @brief SMBUS error callbacks.
1266 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1267 * the configuration information for the specified SMBUS.
1270 __weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
1272 /* NOTE : This function Should not be modified, when the callback is needed,
1273 the HAL_SMBUS_ErrorCallback could be implemented in the user file
1285 /** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
1286 * @brief Peripheral State and Errors functions
1289 ===============================================================================
1290 ##### Peripheral State and Errors functions #####
1291 ===============================================================================
1293 This subsection permit to get in run-time the status of the peripheral
1301 * @brief Returns the SMBUS state.
1302 * @param hsmbus : SMBUS handle
1305 HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus)
1307 return hsmbus->State;
1311 * @brief Return the SMBUS error code
1312 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
1313 * the configuration information for the specified SMBUS.
1314 * @retval SMBUS Error Code
1316 uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus)
1318 return hsmbus->ErrorCode;
1329 /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
1330 * @brief Data transfers Private functions
1335 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode
1336 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1337 * the configuration information for the specified SMBUS.
1338 * @retval HAL status
1340 static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus)
1342 uint16_t DevAddress;
1344 /* Process Locked */
1347 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
1349 /* Clear NACK Flag */
1350 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
1352 /* Set corresponding Error Code */
1353 /* No need to generate STOP, it is automatically done */
1354 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
1356 /* Process Unlocked */
1357 __HAL_UNLOCK(hsmbus);
1359 /* Call the Error callback to prevent upper layer */
1360 HAL_SMBUS_ErrorCallback(hsmbus);
1362 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
1365 /* Call the corresponding callback to inform upper layer of End of Transfer */
1366 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
1368 /* Disable Interrupt */
1369 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
1371 /* Clear STOP Flag */
1372 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
1374 /* Clear Configuration Register 2 */
1375 __HAL_SMBUS_RESET_CR2(hsmbus);
1377 /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */
1378 /* Disable the selected SMBUS peripheral */
1379 __HAL_SMBUS_DISABLE(hsmbus);
1381 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
1382 hsmbus->State = HAL_SMBUS_STATE_READY;
1384 /* Process Unlocked */
1385 __HAL_UNLOCK(hsmbus);
1387 /* REenable the selected SMBUS peripheral */
1388 __HAL_SMBUS_ENABLE(hsmbus);
1390 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
1392 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
1394 /* Disable Interrupt */
1395 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
1397 /* Clear STOP Flag */
1398 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
1400 /* Clear Configuration Register 2 */
1401 __HAL_SMBUS_RESET_CR2(hsmbus);
1403 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
1404 hsmbus->State = HAL_SMBUS_STATE_READY;
1406 /* Process Unlocked */
1407 __HAL_UNLOCK(hsmbus);
1409 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
1412 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
1414 /* Read data from RXDR */
1415 (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
1417 hsmbus->XferCount--;
1419 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
1421 /* Write data to TXDR */
1422 hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
1424 hsmbus->XferCount--;
1426 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
1428 if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
1430 DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD);
1432 if(hsmbus->XferCount > MAX_NBYTE_SIZE)
1434 SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
1435 hsmbus->XferSize = MAX_NBYTE_SIZE;
1439 hsmbus->XferSize = hsmbus->XferCount;
1440 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
1441 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
1442 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
1443 if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)
1446 hsmbus->XferCount--;
1450 else if((hsmbus->XferSize == 0)&&(hsmbus->XferCount==0))
1452 /* Call TxCpltCallback if no stop mode is set */
1453 if(__HAL_SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
1455 /* Call the corresponding callback to inform upper layer of End of Transfer */
1456 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
1458 /* Disable Interrupt */
1459 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
1460 hsmbus->PreviousState = hsmbus->State;
1461 hsmbus->State = HAL_SMBUS_STATE_READY;
1463 /* Process Unlocked */
1464 __HAL_UNLOCK(hsmbus);
1466 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
1468 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
1470 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
1471 hsmbus->PreviousState = hsmbus->State;
1472 hsmbus->State = HAL_SMBUS_STATE_READY;
1474 /* Process Unlocked */
1475 __HAL_UNLOCK(hsmbus);
1477 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
1482 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
1484 if(hsmbus->XferCount == 0)
1486 /* Specific use case for Quick command */
1487 if(hsmbus->pBuffPtr == HAL_NULL)
1489 /* Generate a Stop command */
1490 hsmbus->Instance->CR2 |= I2C_CR2_STOP;
1492 /* Call TxCpltCallback if no stop mode is set */
1493 else if(__HAL_SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
1495 /* No Generate Stop, to permit restart mode */
1496 /* The stop will be done at the end of transfer, when SMBUS_AUTOEND_MODE enable */
1498 /* Call the corresponding callback to inform upper layer of End of Transfer */
1499 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
1501 /* Disable Interrupt */
1502 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
1503 hsmbus->PreviousState = hsmbus->State;
1504 hsmbus->State = HAL_SMBUS_STATE_READY;
1506 /* Process Unlocked */
1507 __HAL_UNLOCK(hsmbus);
1509 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
1511 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
1513 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
1514 hsmbus->PreviousState = hsmbus->State;
1515 hsmbus->State = HAL_SMBUS_STATE_READY;
1517 /* Process Unlocked */
1518 __HAL_UNLOCK(hsmbus);
1520 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
1526 /* Process Unlocked */
1527 __HAL_UNLOCK(hsmbus);
1532 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode
1533 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1534 * the configuration information for the specified SMBUS.
1535 * @retval HAL status
1537 static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
1539 uint8_t TransferDirection = 0;
1540 uint16_t SlaveAddrCode = 0;
1542 /* Process Locked */
1545 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
1547 /* Check that SMBUS transfer finished */
1548 /* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */
1549 /* Mean XferCount == 0*/
1550 /* So clear Flag NACKF only */
1551 if(hsmbus->XferCount == 0)
1553 /* Clear NACK Flag */
1554 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
1556 /* Process Unlocked */
1557 __HAL_UNLOCK(hsmbus);
1561 /* if no, error usecase, a Non-Acknowledge of last Data is generated by the HOST*/
1562 /* Clear NACK Flag */
1563 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
1565 /* Set HAL State to "Idle" State, mean to LISTEN state */
1566 /* So reset Slave Busy state */
1567 hsmbus->PreviousState = hsmbus->State;
1568 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
1569 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
1571 /* Disable RX/TX Interrupts, keep only ADDR Interrupt */
1572 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
1574 /* Set ErrorCode corresponding to a Non-Acknowledge */
1575 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
1577 /* Process Unlocked */
1578 __HAL_UNLOCK(hsmbus);
1580 /* Call the Error callback to prevent upper layer */
1581 HAL_SMBUS_ErrorCallback(hsmbus);
1584 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET)
1586 TransferDirection = __HAL_SMBUS_GET_DIR(hsmbus);
1587 SlaveAddrCode = __HAL_SMBUS_GET_ADDR_MATCH(hsmbus);
1589 /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/
1590 /* Other ADDRInterrupt will be treat in next Listen usecase */
1591 __HAL_SMBUS_DISABLE_IT(hsmbus, SMBUS_IT_ADDRI);
1593 /* Process Unlocked */
1594 __HAL_UNLOCK(hsmbus);
1596 /* Call Slave Addr callback */
1597 HAL_SMBUS_SlaveAddrCallback(hsmbus, TransferDirection, SlaveAddrCode);
1599 else if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET))
1601 if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
1603 /* Read data from RXDR */
1604 (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
1606 hsmbus->XferCount--;
1608 if(hsmbus->XferCount == 1)
1610 /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
1611 /* or only the last Byte of Transfer */
1612 /* So reset the RELOAD bit mode */
1613 hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE;
1614 SMBUS_TransferConfig(hsmbus,0 ,1 , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
1616 else if(hsmbus->XferCount == 0)
1618 /* Last Byte is received, disable Interrupt */
1619 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
1621 /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_SMBUS_STATE_LISTEN */
1622 hsmbus->PreviousState = hsmbus->State;
1623 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
1625 /* Process Unlocked */
1626 __HAL_UNLOCK(hsmbus);
1628 /* Call the Rx complete callback to inform upper layer of the end of receive process */
1629 HAL_SMBUS_SlaveRxCpltCallback(hsmbus);
1633 /* Set Reload for next Bytes */
1634 SMBUS_TransferConfig(hsmbus,0, 1, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
1636 /* Ack last Byte Read */
1637 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
1640 else if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
1642 if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
1644 if(hsmbus->XferCount > MAX_NBYTE_SIZE)
1646 SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
1647 hsmbus->XferSize = MAX_NBYTE_SIZE;
1651 hsmbus->XferSize = hsmbus->XferCount;
1652 SMBUS_TransferConfig(hsmbus, 0, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
1653 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
1654 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
1655 if(__HAL_SMBUS_GET_PEC_MODE(hsmbus) != RESET)
1658 hsmbus->XferCount--;
1664 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
1666 /* Write data to TXDR only if XferCount not reach "0" */
1667 /* A TXIS flag can be set, during STOP treatment */
1668 /* Check if all Datas have already been sent */
1669 /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
1670 if(hsmbus->XferCount > 0)
1672 /* Write data to TXDR */
1673 hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
1674 hsmbus->XferCount--;
1678 if(hsmbus->XferCount == 0)
1680 /* Last Byte is Transmitted */
1681 /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */
1682 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
1683 hsmbus->PreviousState = hsmbus->State;
1684 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
1686 /* Process Unlocked */
1687 __HAL_UNLOCK(hsmbus);
1689 /* Call the Tx complete callback to inform upper layer of the end of transmit process */
1690 HAL_SMBUS_SlaveTxCpltCallback(hsmbus);
1694 /* Check if STOPF is set */
1695 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
1697 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN)
1699 /* Disable RX and TX Interrupts */
1700 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
1702 /* Disable ADDR Interrupt */
1703 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
1705 /* Disable Address Acknowledge */
1706 hsmbus->Instance->CR2 |= I2C_CR2_NACK;
1708 /* Clear Configuration Register 2 */
1709 __HAL_SMBUS_RESET_CR2(hsmbus);
1711 /* Clear STOP Flag */
1712 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
1714 /* Clear ADDR flag */
1715 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
1717 hsmbus->XferOptions = 0;
1718 hsmbus->PreviousState = hsmbus->State;
1719 hsmbus->State = HAL_SMBUS_STATE_READY;
1721 /* Process Unlocked */
1722 __HAL_UNLOCK(hsmbus);
1724 /* Call the Listen Complete callback, to prevent upper layer of the end of Listen usecase */
1725 HAL_SMBUS_SlaveListenCpltCallback(hsmbus);
1729 /* Process Unlocked */
1730 __HAL_UNLOCK(hsmbus);
1735 * @brief Manage the enabling of Interrupts
1736 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1737 * the configuration information for the specified SMBUS.
1738 * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition.
1739 * @retval HAL status
1741 static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
1743 uint32_t tmpisr = 0;
1745 if((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
1747 /* Enable ERR interrupt */
1748 tmpisr |= SMBUS_IT_ERRI;
1751 if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
1753 /* Enable ADDR, STOP interrupt */
1754 tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_ERRI;
1757 if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
1759 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
1760 tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI;
1763 if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
1765 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
1766 tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI;
1769 /* Enable interrupts only at the end */
1770 /* to avoid the risk of SMBUS interrupt handle execution before */
1771 /* all interrupts requested done */
1772 __HAL_SMBUS_ENABLE_IT(hsmbus, tmpisr);
1777 * @brief Manage the disabling of Interrupts
1778 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1779 * the configuration information for the specified SMBUS.
1780 * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition.
1781 * @retval HAL status
1783 static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
1785 uint32_t tmpisr = 0;
1787 if( ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY) )
1789 /* Disable ERR interrupt */
1790 tmpisr |= SMBUS_IT_ERRI;
1793 if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
1795 /* Disable TC, STOP, NACK, TXI interrupt */
1796 tmpisr |= SMBUS_IT_TCI | SMBUS_IT_TXI;
1798 if((__HAL_SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
1799 && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
1801 /* Disable ERR interrupt */
1802 tmpisr |= SMBUS_IT_ERRI;
1805 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
1807 /* Disable STOPI, NACKI */
1808 tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
1812 if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
1814 /* Disable TC, STOP, NACK, RXI interrupt */
1815 tmpisr |= SMBUS_IT_TCI | SMBUS_IT_RXI;
1817 if((__HAL_SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
1818 && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
1820 /* Disable ERR interrupt */
1821 tmpisr |= SMBUS_IT_ERRI;
1824 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
1826 /* Disable STOPI, NACKI */
1827 tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
1831 if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
1833 /* Enable ADDR, STOP interrupt */
1834 tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI;
1836 if(__HAL_SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
1838 /* Disable ERR interrupt */
1839 tmpisr |= SMBUS_IT_ERRI;
1843 /* Disable interrupts only at the end */
1844 /* to avoid a breaking situation like at "t" time */
1845 /* all disable interrupts request are not done */
1846 __HAL_SMBUS_DISABLE_IT(hsmbus, tmpisr);
1851 * @brief This function handles SMBUS Communication Timeout.
1852 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
1853 * the configuration information for the specified SMBUS.
1854 * @param Flag: specifies the SMBUS flag to check.
1855 * @param Status: The new Flag status (SET or RESET).
1856 * @param Timeout: Timeout duration
1857 * @retval HAL status
1859 static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
1861 uint32_t tickstart = HAL_GetTick();
1863 /* Wait until flag is set */
1866 while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET)
1868 /* Check for the Timeout */
1869 if(Timeout != HAL_MAX_DELAY)
1871 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
1873 hsmbus->PreviousState = hsmbus->State;
1874 hsmbus->State= HAL_SMBUS_STATE_READY;
1876 /* Process Unlocked */
1877 __HAL_UNLOCK(hsmbus);
1886 while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET)
1888 /* Check for the Timeout */
1889 if(Timeout != HAL_MAX_DELAY)
1891 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
1893 hsmbus->PreviousState = hsmbus->State;
1894 hsmbus->State= HAL_SMBUS_STATE_READY;
1896 /* Process Unlocked */
1897 __HAL_UNLOCK(hsmbus);
1908 * @brief Handles SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set).
1909 * @param hsmbus: SMBUS handle.
1910 * @param DevAddress: specifies the slave address to be programmed.
1911 * @param Size: specifies the number of bytes to be programmed.
1912 * This parameter must be a value between 0 and 255.
1913 * @param Mode: new state of the SMBUS START condition generation.
1914 * This parameter can be one or a combination of the following values:
1915 * @arg SMBUS_NO_MODE: No specific mode enabled.
1916 * @arg SMBUS_RELOAD_MODE: Enable Reload mode.
1917 * @arg SMBUS_AUTOEND_MODE: Enable Automatic end mode.
1918 * @arg SMBUS_SOFTEND_MODE: Enable Software end mode and Reload mode.
1919 * @param Request: new state of the SMBUS START condition generation.
1920 * This parameter can be one of the following values:
1921 * @arg SMBUS_NO_STARTSTOP: Don't Generate stop and start condition.
1922 * @arg SMBUS_GENERATE_STOP: Generate stop condition (Size should be set to 0).
1923 * @arg SMBUS_GENERATE_START_READ: Generate Restart for read request.
1924 * @arg SMBUS_GENERATE_START_WRITE: Generate Restart for write request.
1927 static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
1929 uint32_t tmpreg = 0;
1931 /* Check the parameters */
1932 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
1933 assert_param(IS_SMBUS_TRANSFER_MODE(Mode));
1934 assert_param(IS_SMBUS_TRANSFER_REQUEST(Request));
1936 /* Get the CR2 register value */
1937 tmpreg = hsmbus->Instance->CR2;
1939 /* clear tmpreg specific bits */
1940 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE));
1943 tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \
1944 (uint32_t)Mode | (uint32_t)Request);
1946 /* update CR2 register */
1947 hsmbus->Instance->CR2 = tmpreg;
1953 #endif /* HAL_SMBUS_MODULE_ENABLED */
1962 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/