2 ******************************************************************************
3 * @file stm32f3xx_hal_spi.c
4 * @author MCD Application Team
7 * @brief SPI HAL module driver.
9 * This file provides firmware functions to manage the following
10 * functionalities of the SPI peripheral:
11 * + Initialization/de-initialization functions
12 * + I/O operation functions
13 * + Peripheral Control functions
14 * + Peripheral State functions
17 ===============================================================================
18 ##### How to use this driver #####
19 ===============================================================================
21 The SPI HAL driver can be used as follows:
23 (#) Declare a SPI_HandleTypeDef handle structure, for example:
24 SPI_HandleTypeDef hspi;
26 (#)Initialize the SPI low level resources by implement the HAL_SPI_MspInit ()API:
27 (##) Enable the SPIx interface clock
28 (##) SPI pins configuration
29 (+) Enable the clock for the SPI GPIOs
30 (+) Configure these SPI pins as alternate function push-pull
31 (##) NVIC configuration if you need to use interrupt process
32 (+) Configure the SPIx interrupt priority
33 (+) Enable the NVIC SPI IRQ handle
34 (##) DMA Configuration if you need to use DMA process
35 (+) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
36 (+) Enable the DMAx interface clock using
37 (+) Configure the DMA handle parameters
38 (+) Configure the DMA Tx or Rx channel
39 (+) Associate the initilalized hdma_tx handle to the hspi DMA Tx or Rx handle
40 (+) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx channel
42 (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
43 management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
45 (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
46 (+) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
47 by calling the customed HAL_SPI_MspInit(&hspi) API.
50 Using the HAL it is not possible to reach all supported SPI frequency with the differents SPI Modes,
51 the following table resume the max SPI frequency reached with data size 8bits/16bits:
52 +-----------------------------------------------------------------------------------------+
53 | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line |
54 | Process | Tranfert mode |--------------------|--------------------|--------------------|
55 | | | Master | Slave | Master | Slave | Master | Slave |
56 |=========================================================================================|
57 | T | Polling | Fcpu/4 | Fcpu/8 | NA | NA | NA | NA |
58 | X |----------------|----------|---------|----------|---------|----------|---------|
59 | / | Interrupt | Fcpu/4 | Fcpu/16 | NA | NA | NA | NA |
60 | R |----------------|----------|---------|----------|---------|----------|---------|
61 | X | DMA | Fcpu/2 | Fcpu/2 | NA | NA | NA | NA |
62 |=========|================|==========|=========|==========|=========|==========|=========|
63 | | Polling | Fcpu/4 | Fcpu/8 | Fcpu/16 | Fcpu/8 | Fcpu/8 | Fcpu/8 |
64 | |----------------|----------|---------|----------|---------|----------|---------|
65 | R | Interrupt | Fcpu/8 | Fcpu/16 | Fcpu/8 | Fcpu/8 | Fcpu/8 | Fcpu/4 |
66 | X |----------------|----------|---------|----------|---------|----------|---------|
67 | | DMA | Fcpu/4 | Fcpu/2 | Fcpu/2 | Fcpu/16 | Fcpu/2 | Fcpu/16 |
68 |=========|================|==========|=========|==========|=========|==========|=========|
69 | | Polling | Fcpu/8 | Fcpu/2 | NA | NA | Fcpu/8 | Fcpu/8 |
70 | |----------------|----------|---------|----------|---------|----------|---------|
71 | T | Interrupt | Fcpu/2 | Fcpu/4 | NA | NA | Fcpu/16 | Fcpu/8 |
72 | X |----------------|----------|---------|----------|---------|----------|---------|
73 | | DMA | Fcpu/2 | Fcpu/2 | NA | NA | Fcpu/8 | Fcpu/16 |
74 +-----------------------------------------------------------------------------------------+
75 @note The max SPI frequency depend on SPI data size (4bits, 5bits,..., 8bits,...15bits, 16bits),
76 SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
78 (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
79 (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
80 (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
83 ******************************************************************************
86 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
88 * Redistribution and use in source and binary forms, with or without modification,
89 * are permitted provided that the following conditions are met:
90 * 1. Redistributions of source code must retain the above copyright notice,
91 * this list of conditions and the following disclaimer.
92 * 2. Redistributions in binary form must reproduce the above copyright notice,
93 * this list of conditions and the following disclaimer in the documentation
94 * and/or other materials provided with the distribution.
95 * 3. Neither the name of STMicroelectronics nor the names of its contributors
96 * may be used to endorse or promote products derived from this software
97 * without specific prior written permission.
99 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
100 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
101 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
102 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
103 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
104 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
105 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
106 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
107 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
108 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
110 ******************************************************************************
113 /* Includes ------------------------------------------------------------------*/
114 #include "stm32f3xx_hal.h"
116 /** @addtogroup STM32F3xx_HAL_Driver
120 /** @defgroup SPI SPI HAL module driver
121 * @brief SPI HAL module driver
124 #ifdef HAL_SPI_MODULE_ENABLED
126 /* Private typedef -----------------------------------------------------------*/
127 /* Private define ------------------------------------------------------------*/
128 /** @defgroup SPI_Private_Define SPI Private Define
131 #define SPI_DEFAULT_TIMEOUT 50
136 /* Private macro -------------------------------------------------------------*/
137 /* Private variables ---------------------------------------------------------*/
138 /* Private function prototypes -----------------------------------------------*/
139 /** @defgroup SPI_Private_Functions SPI Private Functions
143 static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
144 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
145 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
146 static void SPI_DMAError(DMA_HandleTypeDef *hdma);
147 static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout);
148 static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout);
149 static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
150 static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
151 static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
152 static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
153 static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
154 static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
155 static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
156 static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
157 static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
158 static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
159 static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
160 static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
161 static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi);
162 static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi);
163 static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi);
164 static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout);
165 static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout);
170 /* Exported functions ---------------------------------------------------------*/
172 /** @defgroup SPI_Exported_Functions SPI Exported Functions
176 /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
177 * @brief Initialization and Configuration functions
180 ===============================================================================
181 ##### Initialization/de-initialization functions #####
182 ===============================================================================
183 [..] This subsection provides a set of functions allowing to initialize and
184 de-initialiaze the SPIx peripheral:
186 (+) User must Implement HAL_SPI_MspInit() function in which he configures
187 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
189 (+) Call the function HAL_SPI_Init() to configure the selected device with
190 the selected configuration:
194 (++) Clock Polarity and Phase
196 (++) BaudRate Prescaler
200 (++) CRC Polynomial if CRC enabled
201 (++) CRC Length, used only with Data8 and Data16
202 (++) FIFO reception threshold
204 (+) Call the function HAL_SPI_DeInit() to restore the default configuration
205 of the selected SPIx periperal.
212 * @brief Initializes the SPI according to the specified parameters
213 * in the SPI_InitTypeDef and create the associated handle.
214 * @param hspi: SPI handle
217 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
221 /* Check the SPI handle allocation */
227 /* Check the parameters */
228 assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
229 assert_param(IS_SPI_MODE(hspi->Init.Mode));
230 assert_param(IS_SPI_DIRECTION(hspi->Init.Direction));
231 assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
232 assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
233 assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
234 assert_param(IS_SPI_NSS(hspi->Init.NSS));
235 assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode));
236 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
237 assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
238 assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
239 assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
240 assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
241 assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength));
243 hspi->State = HAL_SPI_STATE_BUSY;
245 /* Init the low level hardware : GPIO, CLOCK, NVIC... */
246 HAL_SPI_MspInit(hspi);
248 /* Disable the selected SPI peripheral */
249 __HAL_SPI_DISABLE(hspi);
251 /* Align by default the rs fifo threshold on the data size */
252 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
254 frxth = SPI_RXFIFO_THRESHOLD_HF;
258 frxth = SPI_RXFIFO_THRESHOLD_QF;
261 /* CRC calculation is valid only for 16Bit and 8 Bit */
262 if(( hspi->Init.DataSize != SPI_DATASIZE_16BIT ) && ( hspi->Init.DataSize != SPI_DATASIZE_8BIT ))
264 /* CRC must be disabled */
265 hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
268 /* Align the CRC Length on the data size */
269 if( hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE)
271 /* CRC Lengtht aligned on the data size : value set by default */
272 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
274 hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT;
278 hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT;
282 /*---------------------------- SPIx CR1 & CR2 Configuration ------------------------*/
283 /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
284 Communication speed, First bit, CRC calculation state, CRC Length */
285 hspi->Instance->CR1 = (hspi->Init.Mode | hspi->Init.Direction |
286 hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
287 hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation);
289 if( hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
291 hspi->Instance->CR1|= SPI_CR1_CRCL;
294 /* Configure : NSS management */
295 /* Configure : Rx Fifo Threshold */
296 hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode | hspi->Init.NSSPMode |
297 hspi->Init.DataSize ) | frxth;
299 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
300 /* Configure : CRC Polynomial */
301 hspi->Instance->CRCPR = hspi->Init.CRCPolynomial;
303 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
304 hspi->State= HAL_SPI_STATE_READY;
310 * @brief DeInitializes the SPI peripheral
311 * @param hspi: SPI handle
314 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
316 /* Check the SPI handle allocation */
322 /* Check the parameters */
323 assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
325 hspi->State = HAL_SPI_STATE_BUSY;
327 /* Disable the SPI Peripheral Clock */
328 __HAL_SPI_DISABLE(hspi);
330 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
331 HAL_SPI_MspDeInit(hspi);
333 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
334 hspi->State = HAL_SPI_STATE_RESET;
342 * @brief SPI MSP Init
343 * @param hspi: SPI handle
346 __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
348 /* NOTE : This function Should not be modified, when the callback is needed,
349 the HAL_SPI_MspInit could be implenetd in the user file
354 * @brief SPI MSP DeInit
355 * @param hspi: SPI handle
358 __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
360 /* NOTE : This function Should not be modified, when the callback is needed,
361 the HAL_SPI_MspDeInit could be implenetd in the user file
369 /** @defgroup SPI_Exported_Functions_Group2 Input and Output operation functions
370 * @brief Data transfers functions
373 ===============================================================================
374 ##### I/O operation functions #####
375 ===============================================================================
376 This subsection provides a set of functions allowing to manage the SPI
379 [..] The SPI supports master and slave mode :
381 (#) There are two mode of transfer:
382 (+) Blocking mode: The communication is performed in polling mode.
383 The HAL status of all data processing is returned by the same function
384 after finishing transfer.
385 (+) No-Blocking mode: The communication is performed using Interrupts
386 or DMA, These API's return the HAL status.
387 The end of the data processing will be indicated through the
388 dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
390 The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
391 will be executed respectivelly at the end of the transmit or Receive process
392 The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
394 (#) Blocking mode API's are :
395 (+) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
396 (+) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
397 (+) HAL_SPI_TransmitReceive() in full duplex mode
399 (#) Non-Blocking mode API's with Interrupt are :
400 (+) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
401 (+) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
402 (+) HAL_SPI_TransmitReceive_IT()in full duplex mode
403 (+) HAL_SPI_IRQHandler()
405 (#) No-Blocking mode functions with DMA are :
406 (+) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
407 (+) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
408 (+) HAL_SPI_TransmitReceie_DMA() in full duplex mode
410 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
411 (+) HAL_SPI_TxCpltCallback()
412 (+) HAL_SPI_RxCpltCallback()
413 (+) HAL_SPI_ErrorCallback()
414 (+) HAL_SPI_TxRxCpltCallback()
421 * @brief Transmit an amount of data in blocking mode
422 * @param hspi: SPI handle
423 * @param pData: pointer to data buffer
424 * @param Size: amount of data to be sent
425 * @param Timeout: Timeout duration
428 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
430 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
432 if(hspi->State != HAL_SPI_STATE_READY)
437 if((pData == HAL_NULL ) || (Size == 0))
445 /* Set the transaction information */
446 hspi->State = HAL_SPI_STATE_BUSY_TX;
447 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
448 hspi->pTxBuffPtr = pData;
449 hspi->TxXferSize = Size;
450 hspi->TxXferCount = Size;
451 hspi->pRxBuffPtr = HAL_NULL;
452 hspi->RxXferSize = 0;
453 hspi->RxXferCount = 0;
455 /* Reset CRC Calculation */
456 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
458 __HAL_SPI_RESET_CRC(hspi);
461 /* Configure communication direction : 1Line */
462 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
464 __HAL_SPI_1LINE_TX(hspi);
467 /* Check if the SPI is already enabled */
468 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
470 /* Enable SPI peripheral */
471 __HAL_SPI_ENABLE(hspi);
474 /* Transmit data in 16 Bit mode */
475 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
477 while (hspi->TxXferCount > 0)
479 /* Wait until TXE flag is set to send data */
480 if(SPI_WaitFlagStateUntilTimeout(hspi,SPI_FLAG_TXE,SPI_FLAG_TXE,Timeout) != HAL_OK)
484 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
485 hspi->pTxBuffPtr += sizeof(uint16_t);
489 /* Transmit data in 8 Bit mode */
492 while (hspi->TxXferCount > 0)
494 if(hspi->TxXferCount != 0x1)
496 /* Wait until TXE flag is set to send data */
497 if(SPI_WaitFlagStateUntilTimeout(hspi,SPI_FLAG_TXE,SPI_FLAG_TXE,Timeout) != HAL_OK)
501 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
502 hspi->pTxBuffPtr += sizeof(uint16_t);
503 hspi->TxXferCount -= 2;
507 /* Wait until TXE flag is set to send data */
508 if(SPI_WaitFlagStateUntilTimeout(hspi,SPI_FLAG_TXE,SPI_FLAG_TXE,Timeout) != HAL_OK)
512 *((__IO uint8_t*)&hspi->Instance->DR) = (*hspi->pTxBuffPtr++);
518 /* Enable CRC Transmission */
519 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
521 hspi->Instance->CR1|= SPI_CR1_CRCNEXT;
524 /* Check the end of the transaction */
525 if(SPI_EndRxTxTransaction(hspi,Timeout) != HAL_OK)
530 /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
531 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
533 __HAL_SPI_CLEAR_OVRFLAG(hspi);
536 hspi->State = HAL_SPI_STATE_READY;
538 /* Process Unlocked */
541 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
552 * @brief Receive an amount of data in blocking mode
553 * @param hspi: SPI handle
554 * @param pData: pointer to data buffer
555 * @param Size: amount of data to be sent
556 * @param Timeout: Timeout duration
559 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
561 __IO uint16_t tmpreg;
563 if(hspi->State != HAL_SPI_STATE_READY)
568 if((pData == HAL_NULL ) || (Size == 0))
573 if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
575 /* the receive process is not supported in 2Lines direction master mode */
576 /* in this case we call the transmitReceive process */
577 return HAL_SPI_TransmitReceive(hspi,pData,pData,Size,Timeout);
583 hspi->State = HAL_SPI_STATE_BUSY_RX;
584 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
585 hspi->pRxBuffPtr = pData;
586 hspi->RxXferSize = Size;
587 hspi->RxXferCount = Size;
588 hspi->pTxBuffPtr = HAL_NULL;
589 hspi->TxXferSize = 0;
590 hspi->TxXferCount = 0;
592 /* Reset CRC Calculation */
593 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
595 __HAL_SPI_RESET_CRC(hspi);
598 /* Set the Rx Fido thresold */
599 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
601 /* set fiforxthresold according the reception data lenght: 16bit */
602 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
606 /* set fiforxthresold according the reception data lenght: 8bit */
607 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
610 /* Configure communication direction 1Line and enabled SPI if needed */
611 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
613 __HAL_SPI_1LINE_RX(hspi);
616 /* Check if the SPI is already enabled */
617 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
619 /* Enable SPI peripheral */
620 __HAL_SPI_ENABLE(hspi);
623 /* Receive data in 8 Bit mode */
624 if(hspi->Init.DataSize <= SPI_DATASIZE_8BIT)
626 while(hspi->RxXferCount > 1)
628 /* Wait until the RXNE flag */
629 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
633 (*hspi->pRxBuffPtr++)= *(__IO uint8_t *)&hspi->Instance->DR;
637 else /* Receive data in 16 Bit mode */
639 while(hspi->RxXferCount > 1 )
641 /* Wait until RXNE flag is reset to read data */
642 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
646 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
647 hspi->pRxBuffPtr += sizeof(uint16_t);
652 /* Enable CRC Transmission */
653 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
655 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
658 /* Wait until RXNE flag is set */
659 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
664 /* Receive last data in 16 Bit mode */
665 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
667 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
668 hspi->pRxBuffPtr += sizeof(uint16_t);
670 /* Receive last data in 8 Bit mode */
673 (*hspi->pRxBuffPtr++) = *(__IO uint8_t *)&hspi->Instance->DR;
677 /* Read CRC from DR to close CRC calculation process */
678 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
680 /* Wait until TXE flag */
681 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
683 /* Erreur on the CRC reception */
684 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
686 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
688 tmpreg = hspi->Instance->DR;
692 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
693 if((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
695 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
697 /* Erreur on the CRC reception */
698 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
700 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
705 /* Check the end of the transaction */
706 if(SPI_EndRxTransaction(hspi,Timeout) != HAL_OK)
711 hspi->State = HAL_SPI_STATE_READY;
713 /* Check if CRC error occurred */
714 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
716 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
717 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
719 /* Process Unlocked */
724 /* Process Unlocked */
727 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
738 * @brief Transmit and Receive an amount of data in blocking mode
739 * @param hspi: SPI handle
740 * @param pTxData: pointer to transmission data buffer
741 * @param pRxData: pointer to reception data buffer to be
742 * @param Size: amount of data to be sent
743 * @param Timeout: Timeout duration
746 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
748 __IO uint16_t tmpreg = 0;
749 uint32_t tickstart = 0;
751 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
753 if(hspi->State != HAL_SPI_STATE_READY)
758 if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0))
763 tickstart = HAL_GetTick();
768 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
769 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
770 hspi->pRxBuffPtr = pRxData;
771 hspi->RxXferCount = Size;
772 hspi->RxXferSize = Size;
773 hspi->pTxBuffPtr = pTxData;
774 hspi->TxXferCount = Size;
775 hspi->TxXferSize = Size;
777 /* Reset CRC Calculation */
778 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
780 __HAL_SPI_RESET_CRC(hspi);
783 /* Set the Rx Fido threshold */
784 if((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount > 1))
786 /* set fiforxthreshold according the reception data lenght: 16bit */
787 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
791 /* set fiforxthreshold according the reception data lenght: 8bit */
792 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
795 /* Check if the SPI is already enabled */
796 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
798 /* Enable SPI peripheral */
799 __HAL_SPI_ENABLE(hspi);
802 /* Transmit and Receive data in 16 Bit mode */
803 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
805 while ((hspi->TxXferCount > 0 ) || (hspi->RxXferCount > 0))
807 /* Wait until TXE flag */
808 if((hspi->TxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE))
810 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
811 hspi->pTxBuffPtr += sizeof(uint16_t);
814 /* Enable CRC Transmission */
815 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
817 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
821 /* Wait until RXNE flag */
822 if((hspi->RxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE))
824 *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
825 hspi->pRxBuffPtr += sizeof(uint16_t);
828 if(Timeout != HAL_MAX_DELAY)
830 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
832 hspi->State = HAL_SPI_STATE_READY;
839 /* Transmit and Receive data in 8 Bit mode */
842 while((hspi->TxXferCount > 0) || (hspi->RxXferCount > 0))
844 /* check if TXE flag is set to send data */
845 if((hspi->TxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE))
847 if(hspi->TxXferCount > 2)
849 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
850 hspi->pTxBuffPtr += sizeof(uint16_t);
851 hspi->TxXferCount -= 2;
855 *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
859 /* Enable CRC Transmission */
860 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
862 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
866 /* Wait until RXNE flag is reset */
867 if((hspi->RxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE))
869 if(hspi->RxXferCount > 1)
871 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
872 hspi->pRxBuffPtr += sizeof(uint16_t);
873 hspi->RxXferCount -= 2;
874 if(hspi->RxXferCount <= 1)
876 /* set fiforxthresold before to switch on 8 bit data size */
877 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
882 (*hspi->pRxBuffPtr++) = *(__IO uint8_t *)&hspi->Instance->DR;
886 if(Timeout != HAL_MAX_DELAY)
888 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
890 hspi->State = HAL_SPI_STATE_READY;
898 /* Read CRC from DR to close CRC calculation process */
899 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
901 /* Wait until TXE flag */
902 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
904 /* Erreur on the CRC reception */
905 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
908 if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
910 tmpreg = hspi->Instance->DR;
914 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
915 if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
917 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
919 /* Erreur on the CRC reception */
920 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
922 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
927 /* Check the end of the transaction */
928 if(SPI_EndRxTxTransaction(hspi,Timeout) != HAL_OK)
933 hspi->State = HAL_SPI_STATE_READY;
935 /* Check if CRC error occurred */
936 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
938 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
940 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
942 /* Process Unlocked */
948 /* Process Unlocked */
951 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
962 * @brief Transmit an amount of data in no-blocking mode with Interrupt
963 * @param hspi: SPI handle
964 * @param pData: pointer to data buffer
965 * @param Size: amount of data to be sent
968 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
970 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
972 if(hspi->State == HAL_SPI_STATE_READY)
974 if((pData == HAL_NULL) || (Size == 0))
982 hspi->State = HAL_SPI_STATE_BUSY_TX;
983 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
984 hspi->pTxBuffPtr = pData;
985 hspi->TxXferSize = Size;
986 hspi->TxXferCount = Size;
987 hspi->pRxBuffPtr = HAL_NULL;
988 hspi->RxXferSize = 0;
989 hspi->RxXferCount = 0;
991 /* Set the function for IT treatement */
992 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
994 hspi->RxISR = HAL_NULL;
995 hspi->TxISR = SPI_TxISR_16BIT;
999 hspi->RxISR = HAL_NULL;
1000 hspi->TxISR = SPI_TxISR_8BIT;
1003 /* Configure communication direction : 1Line */
1004 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1006 __HAL_SPI_1LINE_TX(hspi);
1009 /* Reset CRC Calculation */
1010 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1012 __HAL_SPI_RESET_CRC(hspi);
1015 /* Enable TXE and ERR interrupt */
1016 __HAL_SPI_ENABLE_IT(hspi,(SPI_IT_TXE));
1018 /* Process Unlocked */
1021 /* Note : The SPI must be enabled after unlocking current process
1022 to avoid the risk of SPI interrupt handle execution before current
1025 /* Check if the SPI is already enabled */
1026 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1028 /* Enable SPI peripheral */
1029 __HAL_SPI_ENABLE(hspi);
1041 * @brief Receive an amount of data in no-blocking mode with Interrupt
1042 * @param hspi: SPI handle
1043 * @param pData: pointer to data buffer
1044 * @param Size: amount of data to be sent
1045 * @retval HAL status
1047 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1049 if(hspi->State == HAL_SPI_STATE_READY)
1051 if((pData == HAL_NULL) || (Size == 0))
1056 /* Process Locked */
1059 /* Configure communication */
1060 hspi->State = HAL_SPI_STATE_BUSY_RX;
1061 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1062 hspi->pRxBuffPtr = pData;
1063 hspi->RxXferSize = Size;
1064 hspi->RxXferCount = Size;
1065 hspi->pTxBuffPtr = HAL_NULL;
1066 hspi->TxXferSize = 0;
1067 hspi->TxXferCount = 0;
1069 if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
1071 /* Process Unlocked */
1073 /* the receive process is not supported in 2Lines direction master mode */
1074 /* in this we call the transmitReceive process */
1075 return HAL_SPI_TransmitReceive_IT(hspi,pData,pData,Size);
1078 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1081 if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
1091 /* check the data size to adapt Rx threshold and the set the function for IT treatement */
1092 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
1094 /* set fiforxthresold according the reception data lenght: 16 bit */
1095 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1096 hspi->RxISR = SPI_RxISR_16BIT;
1097 hspi->TxISR = HAL_NULL;
1101 /* set fiforxthresold according the reception data lenght: 8 bit */
1102 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1103 hspi->RxISR = SPI_RxISR_8BIT;
1104 hspi->TxISR = HAL_NULL;
1107 /* Configure communication direction : 1Line */
1108 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1110 __HAL_SPI_1LINE_RX(hspi);
1113 /* Reset CRC Calculation */
1114 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1116 __HAL_SPI_RESET_CRC(hspi);
1119 /* Enable TXE and ERR interrupt */
1120 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
1122 /* Process Unlocked */
1125 /* Note : The SPI must be enabled after unlocking current process
1126 to avoid the risk of SPI interrupt handle execution before current
1129 /* Check if the SPI is already enabled */
1130 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
1132 /* Enable SPI peripheral */
1133 __HAL_SPI_ENABLE(hspi);
1145 * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
1146 * @param hspi: SPI handle
1147 * @param pTxData: pointer to transmission data buffer
1148 * @param pRxData: pointer to reception data buffer to be
1149 * @param Size: amount of data to be sent
1150 * @retval HAL status
1152 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
1154 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
1156 if((hspi->State == HAL_SPI_STATE_READY) || \
1157 ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
1159 if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
1164 /* Process locked */
1168 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1171 if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
1177 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
1179 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
1182 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1183 hspi->pTxBuffPtr = pTxData;
1184 hspi->TxXferSize = Size;
1185 hspi->TxXferCount = Size;
1186 hspi->pRxBuffPtr = pRxData;
1187 hspi->RxXferSize = Size;
1188 hspi->RxXferCount = Size;
1190 /* Set the function for IT treatement */
1191 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
1193 hspi->RxISR = SPI_2linesRxISR_16BIT;
1194 hspi->TxISR = SPI_2linesTxISR_16BIT;
1198 hspi->RxISR = SPI_2linesRxISR_8BIT;
1199 hspi->TxISR = SPI_2linesTxISR_8BIT;
1202 /* Reset CRC Calculation */
1203 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1205 __HAL_SPI_RESET_CRC(hspi);
1208 /* check if packing mode is enabled and if there is more than 2 data to receive */
1209 if((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount >= 2))
1211 /* set fiforxthresold according the reception data lenght: 16 bit */
1212 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1216 /* set fiforxthresold according the reception data lenght: 8 bit */
1217 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1220 /* Enable TXE, RXNE and ERR interrupt */
1221 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
1223 /* Process Unlocked */
1226 /* Check if the SPI is already enabled */
1227 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
1229 /* Enable SPI peripheral */
1230 __HAL_SPI_ENABLE(hspi);
1242 * @brief Transmit an amount of data in no-blocking mode with DMA
1243 * @param hspi: SPI handle
1244 * @param pData: pointer to data buffer
1245 * @param Size: amount of data to be sent
1246 * @retval HAL status
1248 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1250 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
1252 if(hspi->State != HAL_SPI_STATE_READY)
1257 if((pData == HAL_NULL) || (Size == 0))
1262 /* Process Locked */
1265 hspi->State = HAL_SPI_STATE_BUSY_TX;
1266 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1267 hspi->pTxBuffPtr = pData;
1268 hspi->TxXferSize = Size;
1269 hspi->TxXferCount = Size;
1270 hspi->pRxBuffPtr = HAL_NULL;
1271 hspi->RxXferSize = 0;
1272 hspi->RxXferCount = 0;
1274 /* Configure communication direction : 1Line */
1275 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1277 __HAL_SPI_1LINE_TX(hspi);
1280 /* Reset CRC Calculation */
1281 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1283 __HAL_SPI_RESET_CRC(hspi);
1286 /* Set the SPI TxDMA transfer complete callback */
1287 hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
1289 /* Set the DMA error callback */
1290 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
1292 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
1293 /* packing mode is enabled only if the DMA setting is HALWORD */
1294 if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
1296 /* Check the even/odd of the data size + crc if enabled */
1297 if((hspi->TxXferCount & 0x1) == 0)
1299 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
1300 hspi->TxXferCount = (hspi->TxXferCount >> 1);
1304 SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
1305 hspi->TxXferCount = (hspi->TxXferCount >> 1) + 1;
1309 /* Enable the Tx DMA channel */
1310 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
1312 /* Check if the SPI is already enabled */
1313 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1315 /* Enable SPI peripheral */
1316 __HAL_SPI_ENABLE(hspi);
1319 /* Enable Tx DMA Request */
1320 hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
1322 /* Process Unlocked */
1329 * @brief Receive an amount of data in no-blocking mode with DMA
1330 * @param hspi: SPI handle
1331 * @param pData: pointer to data buffer
1332 * @param Size: amount of data to be sent
1333 * @retval HAL status
1335 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1337 if(hspi->State != HAL_SPI_STATE_READY)
1342 if((pData == HAL_NULL) || (Size == 0))
1347 /* Process Locked */
1350 hspi->State = HAL_SPI_STATE_BUSY_RX;
1351 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1352 hspi->pRxBuffPtr = pData;
1353 hspi->RxXferSize = Size;
1354 hspi->RxXferCount = Size;
1355 hspi->pTxBuffPtr = HAL_NULL;
1356 hspi->TxXferSize = 0;
1357 hspi->TxXferCount = 0;
1359 if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
1361 /* Process Unlocked */
1363 /* the receive process is not supported in 2Lines direction master mode */
1364 /* in this case we call the transmitReceive process */
1365 return HAL_SPI_TransmitReceive_DMA(hspi,pData,pData,Size);
1368 /* Configure communication direction : 1Line */
1369 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1371 __HAL_SPI_1LINE_RX(hspi);
1374 /* Reset CRC Calculation */
1375 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1377 __HAL_SPI_RESET_CRC(hspi);
1380 /* packing mode management is enabled by the DMA settings */
1381 if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
1383 /* Process Locked */
1385 /* Restriction the DMA data received is not allowed in this mode */
1389 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
1390 if( hspi->Init.DataSize > SPI_DATASIZE_8BIT)
1392 /* set fiforxthresold according the reception data lenght: 16bit */
1393 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1397 /* set fiforxthresold according the reception data lenght: 8bit */
1398 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1401 /* Set the SPI Rx DMA transfer complete callback */
1402 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
1404 /* Set the DMA error callback */
1405 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
1407 /* Enable Rx DMA Request */
1408 hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
1410 /* Enable the Rx DMA channel */
1411 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
1413 /* Process Unlocked */
1416 /* Check if the SPI is already enabled */
1417 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
1419 /* Enable SPI peripheral */
1420 __HAL_SPI_ENABLE(hspi);
1427 * @brief Transmit and Receive an amount of data in no-blocking mode with DMA
1428 * @param hspi: SPI handle
1429 * @param pTxData: pointer to transmission data buffer
1430 * @param pRxData: pointer to reception data buffer to be
1431 * @param Size: amount of data to be sent
1432 * @retval HAL status
1434 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
1436 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
1438 if((hspi->State == HAL_SPI_STATE_READY) ||
1439 ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
1441 if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
1446 /* Process locked */
1449 /* check if the transmit Receive function is not called by a receive master */
1450 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
1452 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
1455 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1456 hspi->pTxBuffPtr = (uint8_t *)pTxData;
1457 hspi->TxXferSize = Size;
1458 hspi->TxXferCount = Size;
1459 hspi->pRxBuffPtr = (uint8_t *)pRxData;
1460 hspi->RxXferSize = Size;
1461 hspi->RxXferCount = Size;
1463 /* Reset CRC Calculation + increase the rxsize */
1464 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1466 __HAL_SPI_RESET_CRC(hspi);
1469 /* Reset the threshold bit */
1470 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
1471 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
1473 /* the packing mode management is enabled by the DMA settings according the spi data size */
1474 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
1476 /* set fiforxthreshold according the reception data lenght: 16bit */
1477 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1481 /* set fiforxthresold according the reception data lenght: 8bit */
1482 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1484 if(hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
1486 if((hspi->TxXferSize & 0x1) == 0x0 )
1488 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
1489 hspi->TxXferCount = hspi->TxXferCount >> 1;
1493 SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
1494 hspi->TxXferCount = (hspi->TxXferCount >> 1) + 1;
1498 if(hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
1500 /* set fiforxthresold according the reception data lenght: 16bit */
1501 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1503 /* Size must include the CRC lenght */
1504 if((hspi->RxXferCount & 0x1) == 0x0 )
1506 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
1507 hspi->RxXferCount = hspi->RxXferCount >> 1;
1511 SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
1512 hspi->RxXferCount = (hspi->RxXferCount >> 1) + 1;
1517 /* Set the SPI Rx DMA transfer complete callback because the last generated transfer request is
1518 the reception request (RXNE) */
1519 if(hspi->State == HAL_SPI_STATE_BUSY_RX)
1521 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
1525 hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
1527 /* Set the DMA error callback */
1528 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
1530 /* Enable Rx DMA Request */
1531 hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
1533 /* Enable the Rx DMA channel */
1534 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t) hspi->pRxBuffPtr, hspi->RxXferCount);
1536 /* Set the SPI Tx DMA transfer complete callback as HAL_NULL because the communication closing
1537 is performed in DMA reception complete callback */
1538 hspi->hdmatx->XferCpltCallback = HAL_NULL;
1540 /* Set the DMA error callback */
1541 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
1543 /* Enable the Tx DMA channel */
1544 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
1546 /* Check if the SPI is already enabled */
1547 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1549 /* Enable SPI peripheral */
1550 __HAL_SPI_ENABLE(hspi);
1553 /* Enable Tx DMA Request */
1554 hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
1556 /* Process Unlocked */
1568 * @brief This function handles SPI interrupt request.
1569 * @param hspi: SPI handle
1570 * @retval HAL status
1572 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
1574 /* SPI in mode Receiver ----------------------------------------------------*/
1575 if((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET) &&
1576 (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET))
1582 /* SPI in mode Tramitter ---------------------------------------------------*/
1583 if((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET) && (__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET))
1589 /* SPI in Erreur Treatment ---------------------------------------------------*/
1590 if((hspi->Instance->SR & (SPI_FLAG_MODF | SPI_FLAG_OVR | SPI_FLAG_FRE)) != RESET)
1592 /* SPI Overrun error interrupt occured -------------------------------------*/
1593 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
1595 if(hspi->State != HAL_SPI_STATE_BUSY_TX)
1597 hspi->ErrorCode |= HAL_SPI_ERROR_OVR;
1598 __HAL_SPI_CLEAR_OVRFLAG(hspi);
1606 /* SPI Mode Fault error interrupt occured -------------------------------------*/
1607 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
1609 hspi->ErrorCode |= HAL_SPI_ERROR_MODF;
1610 __HAL_SPI_CLEAR_MODFFLAG(hspi);
1613 /* SPI Frame error interrupt occured ----------------------------------------*/
1614 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
1616 hspi->ErrorCode |= HAL_SPI_ERROR_FRE;
1617 __HAL_SPI_CLEAR_FREFLAG(hspi);
1620 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
1621 hspi->State = HAL_SPI_STATE_READY;
1622 HAL_SPI_ErrorCallback(hspi);
1629 * @brief DMA SPI transmit process complete callback
1630 * @param hdma : DMA handle
1633 static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
1635 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1637 /* Disable Tx DMA Request */
1638 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
1640 /* Check the end of the transaction */
1641 SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT);
1643 /* Clear OVERUN flag in 2 Lines communication mode because received data is not read */
1644 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
1646 __HAL_SPI_CLEAR_OVRFLAG(hspi);
1649 hspi->TxXferCount = 0;
1650 hspi->State = HAL_SPI_STATE_READY;
1652 /* Check if CRC error occurred or Error code */
1653 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
1655 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
1656 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
1657 HAL_SPI_ErrorCallback(hspi);
1661 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
1663 HAL_SPI_TxCpltCallback(hspi);
1667 HAL_SPI_ErrorCallback(hspi);
1673 * @brief DMA SPI receive process complete callback
1674 * @param hdma : DMA handle
1677 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
1679 __IO uint16_t tmpreg;
1680 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1683 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1685 /* Wait until TXE flag */
1686 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT) != HAL_OK)
1688 /* Erreur on the CRC reception */
1689 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
1691 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
1693 tmpreg = hspi->Instance->DR;
1697 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
1698 if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
1700 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT) != HAL_OK)
1702 /* Erreur on the CRC reception */
1703 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
1705 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
1710 /* Disable Rx DMA Request */
1711 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
1712 /* Disable Tx DMA Request (done by default to handle the case master rx direction 2 lines) */
1713 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
1715 /* Check the end of the transaction */
1716 SPI_EndRxTransaction(hspi,SPI_DEFAULT_TIMEOUT);
1718 hspi->RxXferCount = 0;
1719 hspi->State = HAL_SPI_STATE_READY;
1721 /* Check if CRC error occurred */
1722 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
1724 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
1725 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
1726 HAL_SPI_RxCpltCallback(hspi);
1730 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
1732 HAL_SPI_RxCpltCallback(hspi);
1736 HAL_SPI_ErrorCallback(hspi);
1742 * @brief DMA SPI transmit receive process complete callback
1743 * @param hdma : DMA handle
1747 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
1749 __IO int16_t tmpreg;
1750 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1753 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1755 if((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_8BIT))
1757 if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_QUARTER_FULL, SPI_DEFAULT_TIMEOUT) != HAL_OK)
1759 /* Erreur on the CRC reception */
1760 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
1762 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
1766 if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TIMEOUT) != HAL_OK)
1768 /* Erreur on the CRC reception */
1769 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
1771 tmpreg = hspi->Instance->DR;
1775 /* Check the end of the transaction */
1776 SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT);
1778 /* Disable Tx DMA Request */
1779 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1781 /* Disable Rx DMA Request */
1782 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1784 hspi->TxXferCount = 0;
1785 hspi->RxXferCount = 0;
1786 hspi->State = HAL_SPI_STATE_READY;
1788 /* Check if CRC error occurred */
1789 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
1791 hspi->ErrorCode = HAL_SPI_ERROR_CRC;
1792 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
1793 HAL_SPI_ErrorCallback(hspi);
1797 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
1799 HAL_SPI_TxRxCpltCallback(hspi);
1803 HAL_SPI_ErrorCallback(hspi);
1809 * @brief DMA SPI communication error callback
1810 * @param hdma : DMA handle
1813 static void SPI_DMAError(DMA_HandleTypeDef *hdma)
1815 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1816 hspi->TxXferCount = 0;
1817 hspi->RxXferCount = 0;
1818 hspi->ErrorCode|= HAL_SPI_ERROR_DMA;
1819 hspi->State = HAL_SPI_STATE_READY;
1820 HAL_SPI_ErrorCallback(hspi);
1824 * @brief Tx Transfer completed callbacks
1825 * @param hspi: SPI handle
1828 __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
1830 /* NOTE : This function Should not be modified, when the callback is needed,
1831 the HAL_SPI_TxCpltCallback could be implenetd in the user file
1836 * @brief Rx Transfer completed callbacks
1837 * @param hspi: SPI handle
1840 __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
1842 /* NOTE : This function Should not be modified, when the callback is needed,
1843 the HAL_SPI_RxCpltCallback could be implenetd in the user file
1848 * @brief Tx and Rx Transfer completed callbacks
1849 * @param hspi: SPI handle
1852 __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
1854 /* NOTE : This function Should not be modified, when the callback is needed,
1855 the HAL_SPI_TxRxCpltCallback could be implenetd in the user file
1860 * @brief SPI error callbacks
1861 * @param hspi: SPI handle
1864 __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
1866 /* NOTE : This function Should not be modified, when the callback is needed,
1867 the HAL_SPI_ErrorCallback could be implenetd in the user file
1875 /** @defgroup SPI_Exported_Functions_Group3 Peripheral Control functions
1876 * @brief SPI control functions
1879 ===============================================================================
1880 ##### Peripheral Control functions #####
1881 ===============================================================================
1883 This subsection provides a set of functions allowing to control the SPI.
1884 (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral.
1885 (+) HAL_SPI_Ctl() API can be used to update the spi configuration (only one parameter)
1886 without calling the HAL_SPI_Init() API
1892 * @brief Return the SPI state
1893 * @param hspi : SPI handle
1896 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
1908 /** @addtogroup SPI_Private_Functions SPI Private Functions
1909 * @brief Data transfers Private functions
1914 * @brief Rx Handler for Transmit and Receive in Interrupt mode
1915 * @param hspi: SPI handle
1917 static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
1919 /* Receive data in packing mode */
1920 if(hspi->RxXferCount > 1)
1922 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
1923 hspi->pRxBuffPtr += sizeof(uint16_t);
1924 hspi->RxXferCount -= 2;
1925 if(hspi->RxXferCount == 1)
1927 /* set fiforxthresold according the reception data lenght: 8bit */
1928 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
1931 /* Receive data in 8 Bit mode */
1934 *hspi->pRxBuffPtr++ = *((__IO uint8_t *)&hspi->Instance->DR);
1935 hspi->RxXferCount--;
1938 /* check end of the reception */
1939 if(hspi->RxXferCount == 0)
1941 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1943 hspi->RxISR = SPI_2linesRxISR_8BITCRC;
1947 /* Disable RXNE interrupt */
1948 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
1950 if(hspi->TxXferCount == 0)
1952 SPI_CloseRxTx_ISR(hspi);
1958 * @brief Rx Handler for Transmit and Receive in Interrupt mode
1959 * @param hspi: SPI handle
1961 static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
1963 __IO uint8_t tmpreg;
1965 tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
1968 /* check end of the reception */
1969 if(hspi->CRCSize == 0)
1971 /* Disable RXNE interrupt */
1972 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
1974 if(hspi->TxXferCount == 0)
1976 SPI_CloseRxTx_ISR(hspi);
1982 * @brief Tx Handler for Transmit and Receive in Interrupt mode
1983 * @param hspi: SPI handle
1985 static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
1987 /* Transmit data in packing Bit mode */
1988 if(hspi->TxXferCount >= 2)
1990 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
1991 hspi->pTxBuffPtr += sizeof(uint16_t);
1992 hspi->TxXferCount -= 2;
1994 /* Transmit data in 8 Bit mode */
1997 *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
1998 hspi->TxXferCount--;
2001 /* check the end of the transmission */
2002 if(hspi->TxXferCount == 0)
2004 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2006 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
2008 /* Disable TXE interrupt */
2009 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
2011 if(hspi->RxXferCount == 0)
2013 SPI_CloseRxTx_ISR(hspi);
2019 * @brief Rx 16Bit Handler for Transmit and Receive in Interrupt mode
2020 * @param hspi: SPI handle
2022 static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
2024 /* Receive data in 16 Bit mode */
2025 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
2026 hspi->pRxBuffPtr += sizeof(uint16_t);
2027 hspi->RxXferCount--;
2029 if(hspi->RxXferCount == 0)
2031 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2033 hspi->RxISR = SPI_2linesRxISR_16BITCRC;
2037 /* Disable RXNE interrupt */
2038 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
2040 if(hspi->TxXferCount == 0)
2042 SPI_CloseRxTx_ISR(hspi);
2048 * @brief Manage the CRC 16bit receive for Transmit and Receive in Interrupt mode
2049 * @param hspi: SPI handle
2051 static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
2053 __IO uint16_t tmpreg;
2054 /* Receive data in 16 Bit mode */
2055 tmpreg = hspi->Instance->DR;
2057 /* Disable RXNE interrupt */
2058 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
2060 SPI_CloseRxTx_ISR(hspi);
2064 * @brief Tx Handler for Transmit and Receive in Interrupt mode
2065 * @param hspi: SPI handle
2067 static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
2069 /* Transmit data in 16 Bit mode */
2070 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
2071 hspi->pTxBuffPtr += sizeof(uint16_t);
2072 hspi->TxXferCount--;
2074 /* Enable CRC Transmission */
2075 if(hspi->TxXferCount == 0)
2077 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2079 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
2081 /* Disable TXE interrupt */
2082 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
2084 if(hspi->RxXferCount == 0)
2086 SPI_CloseRxTx_ISR(hspi);
2092 * @brief Manage the CRC receive in Interrupt context
2093 * @param hspi: SPI handle
2095 static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
2097 __IO uint8_t tmpreg;
2098 tmpreg = *((__IO uint8_t*)&hspi->Instance->DR);
2101 if(hspi->CRCSize == 0)
2103 SPI_CloseRx_ISR(hspi);
2108 * @brief Manage the recieve in Interrupt context
2109 * @param hspi: SPI handle
2111 static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
2113 *hspi->pRxBuffPtr++ = (*(__IO uint8_t *)&hspi->Instance->DR);
2114 hspi->RxXferCount--;
2116 /* Enable CRC Transmission */
2117 if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
2119 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
2122 if(hspi->RxXferCount == 0)
2124 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2126 hspi->RxISR = SPI_RxISR_8BITCRC;
2129 SPI_CloseRx_ISR(hspi);
2134 * @brief Manage the CRC 16bit recieve in Interrupt context
2135 * @param hspi: SPI handle
2137 static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
2139 __IO uint16_t tmpreg;
2141 tmpreg = hspi->Instance->DR;
2143 /* Disable RXNE and ERR interrupt */
2144 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
2146 SPI_CloseRx_ISR(hspi);
2150 * @brief Manage the 16Bit recieve in Interrupt context
2151 * @param hspi: SPI handle
2153 static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
2155 *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
2156 hspi->pRxBuffPtr += sizeof(uint16_t);
2157 hspi->RxXferCount--;
2159 /* Enable CRC Transmission */
2160 if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
2162 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
2165 if(hspi->RxXferCount == 0)
2167 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2169 hspi->RxISR = SPI_RxISR_16BITCRC;
2172 SPI_CloseRx_ISR(hspi);
2177 * @brief Handle the data 8Bit transmit in Interrupt mode
2178 * @param hspi: SPI handle
2180 static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
2182 *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
2183 hspi->TxXferCount--;
2185 if(hspi->TxXferCount == 0)
2187 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2189 /* Enable CRC Transmission */
2190 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
2192 SPI_CloseTx_ISR(hspi);
2197 * @brief Handle the data 16Bit transmit in Interrupt mode
2198 * @param hspi: SPI handle
2200 static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
2202 /* Transmit data in 16 Bit mode */
2203 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
2204 hspi->pTxBuffPtr += sizeof(uint16_t);
2205 hspi->TxXferCount--;
2207 if(hspi->TxXferCount == 0)
2209 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2211 /* Enable CRC Transmission */
2212 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
2214 SPI_CloseTx_ISR(hspi);
2219 * @brief This function handles SPI Communication Timeout.
2220 * @param hspi: SPI handle
2221 * @param Flag : SPI flag to check
2222 * @param State : flag state to check
2223 * @param Timeout : Timeout duration
2224 * @retval HAL status
2226 static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout)
2228 uint32_t tickstart = HAL_GetTick();
2230 while((hspi->Instance->SR & Flag) != State)
2232 if(Timeout != HAL_MAX_DELAY)
2234 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
2236 /* Disable the SPI and reset the CRC: the CRC value should be cleared
2237 on both master and slave sides in order to resynchronize the master
2238 and slave for their respective CRC calculation */
2240 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
2241 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
2243 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
2245 /* Disable SPI peripheral */
2246 __HAL_SPI_DISABLE(hspi);
2249 /* Reset CRC Calculation */
2250 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2252 __HAL_SPI_RESET_CRC(hspi);
2255 hspi->State= HAL_SPI_STATE_READY;
2257 /* Process Unlocked */
2269 * @brief This function handles SPI Communication Timeout.
2270 * @param hspi: SPI handle
2271 * @param Flag: Fifo flag to check
2272 * @param State: Fifo state to check
2273 * @param Timeout : Timeout duration
2274 * @retval HAL status
2276 static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout)
2278 __IO uint8_t tmpreg;
2279 uint32_t tickstart = HAL_GetTick();
2281 while((hspi->Instance->SR & Flag) != State)
2283 if((Flag == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
2285 tmpreg = *((__IO uint8_t*)&hspi->Instance->DR);
2287 if(Timeout != HAL_MAX_DELAY)
2289 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
2291 /* Disable the SPI and reset the CRC: the CRC value should be cleared
2292 on both master and slave sides in order to resynchronize the master
2293 and slave for their respective CRC calculation */
2295 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
2296 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
2298 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
2300 /* Disable SPI peripheral */
2301 __HAL_SPI_DISABLE(hspi);
2304 /* Reset CRC Calculation */
2305 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2307 __HAL_SPI_RESET_CRC(hspi);
2310 hspi->State = HAL_SPI_STATE_READY;
2312 /* Process Unlocked */
2324 * @brief This function handles the check of the RX transaction complete.
2325 * @param hspi: SPI handle
2326 * @param Timeout : Timeout duration
2328 static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout)
2330 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
2332 /* Disable SPI peripheral */
2333 __HAL_SPI_DISABLE(hspi);
2335 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout) != HAL_OK)
2337 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
2340 if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout) != HAL_OK)
2342 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
2350 * @brief This function handles the check of the RXTX or TX transaction complete.
2351 * @param hspi: SPI handle
2352 * @param Timeout : Timeout duration
2354 static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout)
2356 /* Procedure to check the transaction complete */
2357 if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout) != HAL_OK)
2359 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
2362 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout) != HAL_OK)
2364 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
2367 if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout) != HAL_OK)
2369 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
2376 * @brief This function handles the close of the RXTX transaction.
2377 * @param hspi: SPI handle
2379 static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
2381 /* Disable ERR interrupt */
2382 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
2384 /* Check the end of the transaction */
2385 SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT);
2387 /* Check if CRC error occurred */
2388 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
2390 hspi->State = HAL_SPI_STATE_READY;
2391 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
2392 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
2393 HAL_SPI_ErrorCallback(hspi);
2397 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
2399 if(hspi->State == HAL_SPI_STATE_BUSY_RX)
2401 hspi->State = HAL_SPI_STATE_READY;
2402 HAL_SPI_RxCpltCallback(hspi);
2406 hspi->State = HAL_SPI_STATE_READY;
2407 HAL_SPI_TxRxCpltCallback(hspi);
2412 hspi->State = HAL_SPI_STATE_READY;
2413 HAL_SPI_ErrorCallback(hspi);
2419 * @brief This function handles the close of the RX transaction.
2420 * @param hspi: SPI handle
2422 static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
2424 /* Disable RXNE and ERR interrupt */
2425 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
2427 /* Check the end of the transaction */
2428 SPI_EndRxTransaction(hspi,SPI_DEFAULT_TIMEOUT);
2430 hspi->State = HAL_SPI_STATE_READY;
2432 /* Check if CRC error occurred */
2433 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
2435 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
2436 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
2437 HAL_SPI_ErrorCallback(hspi);
2441 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
2443 HAL_SPI_RxCpltCallback(hspi);
2447 HAL_SPI_ErrorCallback(hspi);
2453 * @brief This function handles the close of the TX transaction.
2454 * @param hspi: SPI handle
2456 static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
2458 /* Disable TXE and ERR interrupt */
2459 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
2461 /* Check the end of the transaction */
2462 SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT);
2464 /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
2465 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
2467 __HAL_SPI_CLEAR_OVRFLAG(hspi);
2470 hspi->State = HAL_SPI_STATE_READY;
2471 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
2473 HAL_SPI_ErrorCallback(hspi);
2477 HAL_SPI_TxCpltCallback(hspi);
2485 #endif /* HAL_SPI_MODULE_ENABLED */
2494 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/