2 ******************************************************************************
3 * @file stm32f30x_can.c
4 * @author MCD Application Team
6 * @date 27-February-2014
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Controller area network (CAN) peripheral:
9 * + Initialization and Configuration
10 * + CAN Frames Transmission
11 * + CAN Frames Reception
12 * + Operation modes switch
14 * + Interrupts and flags
18 ===============================================================================
19 ##### How to use this driver #####
20 ===============================================================================
22 (#) Enable the CAN controller interface clock using
23 RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1, ENABLE);
24 (#) CAN pins configuration:
25 (++) Enable the clock for the CAN GPIOs using the following function:
26 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOx, ENABLE);
27 (++) Connect the involved CAN pins to AF9 using the following function
28 GPIO_PinAFConfig(GPIOx, GPIO_PinSourcex, GPIO_AF_CANx);
29 (++) Configure these CAN pins in alternate function mode by calling
30 the function GPIO_Init();
31 (#) Initialise and configure the CAN using CAN_Init() and
32 CAN_FilterInit() functions.
33 (#) Transmit the desired CAN frame using CAN_Transmit() function.
34 (#) Check the transmission of a CAN frame using CAN_TransmitStatus() function.
35 (#) Cancel the transmission of a CAN frame using CAN_CancelTransmit() function.
36 (#) Receive a CAN frame using CAN_Recieve() function.
37 (#) Release the receive FIFOs using CAN_FIFORelease() function.
38 (#) Return the number of pending received frames using CAN_MessagePending() function.
39 (#) To control CAN events you can use one of the following two methods:
40 (++) Check on CAN flags using the CAN_GetFlagStatus() function.
41 (++) Use CAN interrupts through the function CAN_ITConfig() at initialization
42 phase and CAN_GetITStatus() function into interrupt routines to check
43 if the event has occurred or not.
44 After checking on a flag you should clear it using CAN_ClearFlag()
45 function. And after checking on an interrupt event you should clear it
46 using CAN_ClearITPendingBit() function.
50 ******************************************************************************
53 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
55 * Redistribution and use in source and binary forms, with or without modification,
56 * are permitted provided that the following conditions are met:
57 * 1. Redistributions of source code must retain the above copyright notice,
58 * this list of conditions and the following disclaimer.
59 * 2. Redistributions in binary form must reproduce the above copyright notice,
60 * this list of conditions and the following disclaimer in the documentation
61 * and/or other materials provided with the distribution.
62 * 3. Neither the name of STMicroelectronics nor the names of its contributors
63 * may be used to endorse or promote products derived from this software
64 * without specific prior written permission.
66 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
67 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
68 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
69 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
70 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
71 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
72 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
73 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
74 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
75 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
77 ******************************************************************************
80 /* Includes ------------------------------------------------------------------*/
81 #include "stm32f30x_can.h"
82 #include "stm32f30x_rcc.h"
84 /** @addtogroup STM32F30x_StdPeriph_Driver
89 * @brief CAN driver modules
92 /* Private typedef -----------------------------------------------------------*/
93 /* Private define ------------------------------------------------------------*/
95 /* CAN Master Control Register bits */
96 #define MCR_DBF ((uint32_t)0x00010000) /* software master reset */
98 /* CAN Mailbox Transmit Request */
99 #define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */
101 /* CAN Filter Master Register bits */
102 #define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */
104 /* Time out for INAK bit */
105 #define INAK_TIMEOUT ((uint32_t)0x00FFFFFF)
106 /* Time out for SLAK bit */
107 #define SLAK_TIMEOUT ((uint32_t)0x00FFFFFF)
109 /* Flags in TSR register */
110 #define CAN_FLAGS_TSR ((uint32_t)0x08000000)
111 /* Flags in RF1R register */
112 #define CAN_FLAGS_RF1R ((uint32_t)0x04000000)
113 /* Flags in RF0R register */
114 #define CAN_FLAGS_RF0R ((uint32_t)0x02000000)
115 /* Flags in MSR register */
116 #define CAN_FLAGS_MSR ((uint32_t)0x01000000)
117 /* Flags in ESR register */
118 #define CAN_FLAGS_ESR ((uint32_t)0x00F00000)
120 /* Mailboxes definition */
121 #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
122 #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
123 #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
125 #define CAN_MODE_MASK ((uint32_t) 0x00000003)
127 /* Private macro -------------------------------------------------------------*/
128 /* Private variables ---------------------------------------------------------*/
129 /* Private function prototypes -----------------------------------------------*/
130 /* Private functions ---------------------------------------------------------*/
131 static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit);
133 /** @defgroup CAN_Private_Functions
137 /** @defgroup CAN_Group1 Initialization and Configuration functions
138 * @brief Initialization and Configuration functions
141 ===============================================================================
142 ##### Initialization and Configuration functions #####
143 ===============================================================================
144 [..] This section provides functions allowing to:
145 (+) Initialize the CAN peripherals : Prescaler, operating mode, the maximum
146 number of time quanta to perform resynchronization, the number of time
147 quanta in Bit Segment 1 and 2 and many other modes.
148 (+) Configure the CAN reception filter.
149 (+) Select the start bank filter for slave CAN.
150 (+) Enable or disable the Debug Freeze mode for CAN.
151 (+) Enable or disable the CAN Time Trigger Operation communication mode.
158 * @brief Deinitializes the CAN peripheral registers to their default reset values.
159 * @param CANx: where x can be 1 to select the CAN1 peripheral.
162 void CAN_DeInit(CAN_TypeDef* CANx)
164 /* Check the parameters */
165 assert_param(IS_CAN_ALL_PERIPH(CANx));
167 /* Enable CAN1 reset state */
168 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE);
169 /* Release CAN1 from reset state */
170 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE);
174 * @brief Initializes the CAN peripheral according to the specified
175 * parameters in the CAN_InitStruct.
176 * @param CANx: where x can be 1 to select the CAN1 peripheral.
177 * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that contains
178 * the configuration information for the CAN peripheral.
179 * @retval Constant indicates initialization succeed which will be
180 * CAN_InitStatus_Failed or CAN_InitStatus_Success.
182 uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct)
184 uint8_t InitStatus = CAN_InitStatus_Failed;
185 __IO uint32_t wait_ack = 0x00000000;
186 /* Check the parameters */
187 assert_param(IS_CAN_ALL_PERIPH(CANx));
188 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM));
189 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM));
190 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM));
191 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART));
192 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM));
193 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP));
194 assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode));
195 assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW));
196 assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1));
197 assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2));
198 assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler));
200 /* Exit from sleep mode */
201 CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
203 /* Request initialisation */
204 CANx->MCR |= CAN_MCR_INRQ ;
206 /* Wait the acknowledge */
207 while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
212 /* Check acknowledge */
213 if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
215 InitStatus = CAN_InitStatus_Failed;
219 /* Set the time triggered communication mode */
220 if (CAN_InitStruct->CAN_TTCM == ENABLE)
222 CANx->MCR |= CAN_MCR_TTCM;
226 CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM;
229 /* Set the automatic bus-off management */
230 if (CAN_InitStruct->CAN_ABOM == ENABLE)
232 CANx->MCR |= CAN_MCR_ABOM;
236 CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM;
239 /* Set the automatic wake-up mode */
240 if (CAN_InitStruct->CAN_AWUM == ENABLE)
242 CANx->MCR |= CAN_MCR_AWUM;
246 CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM;
249 /* Set the no automatic retransmission */
250 if (CAN_InitStruct->CAN_NART == ENABLE)
252 CANx->MCR |= CAN_MCR_NART;
256 CANx->MCR &= ~(uint32_t)CAN_MCR_NART;
259 /* Set the receive FIFO locked mode */
260 if (CAN_InitStruct->CAN_RFLM == ENABLE)
262 CANx->MCR |= CAN_MCR_RFLM;
266 CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM;
269 /* Set the transmit FIFO priority */
270 if (CAN_InitStruct->CAN_TXFP == ENABLE)
272 CANx->MCR |= CAN_MCR_TXFP;
276 CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP;
279 /* Set the bit timing register */
280 CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \
281 ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \
282 ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \
283 ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \
284 ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1);
286 /* Request leave initialisation */
287 CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ;
289 /* Wait the acknowledge */
292 while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
297 /* ...and check acknowledged */
298 if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
300 InitStatus = CAN_InitStatus_Failed;
304 InitStatus = CAN_InitStatus_Success ;
308 /* At this step, return the status of initialization */
313 * @brief Configures the CAN reception filter according to the specified
314 * parameters in the CAN_FilterInitStruct.
315 * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef structure that
316 * contains the configuration information.
319 void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct)
321 uint32_t filter_number_bit_pos = 0;
322 /* Check the parameters */
323 assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber));
324 assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode));
325 assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale));
326 assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment));
327 assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation));
329 filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber;
331 /* Initialisation mode for the filter */
332 CAN1->FMR |= FMR_FINIT;
334 /* Filter Deactivation */
335 CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos;
338 if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
340 /* 16-bit scale for the filter */
341 CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos;
343 /* First 16-bit identifier and First 16-bit mask */
344 /* Or First 16-bit identifier and Second 16-bit identifier */
345 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
346 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
347 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
349 /* Second 16-bit identifier and Second 16-bit mask */
350 /* Or Third 16-bit identifier and Fourth 16-bit identifier */
351 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
352 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
353 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh);
356 if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
358 /* 32-bit scale for the filter */
359 CAN1->FS1R |= filter_number_bit_pos;
360 /* 32-bit identifier or First 32-bit identifier */
361 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
362 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
363 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
364 /* 32-bit mask or Second 32-bit identifier */
365 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
366 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
367 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow);
371 if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
373 /*Id/Mask mode for the filter*/
374 CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos;
376 else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
378 /*Identifier list mode for the filter*/
379 CAN1->FM1R |= (uint32_t)filter_number_bit_pos;
382 /* Filter FIFO assignment */
383 if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0)
385 /* FIFO 0 assignation for the filter */
386 CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos;
389 if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1)
391 /* FIFO 1 assignation for the filter */
392 CAN1->FFA1R |= (uint32_t)filter_number_bit_pos;
395 /* Filter activation */
396 if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
398 CAN1->FA1R |= filter_number_bit_pos;
401 /* Leave the initialisation mode for the filter */
402 CAN1->FMR &= ~FMR_FINIT;
406 * @brief Fills each CAN_InitStruct member with its default value.
407 * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure which ill be initialized.
410 void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
412 /* Reset CAN init structure parameters values */
414 /* Initialize the time triggered communication mode */
415 CAN_InitStruct->CAN_TTCM = DISABLE;
417 /* Initialize the automatic bus-off management */
418 CAN_InitStruct->CAN_ABOM = DISABLE;
420 /* Initialize the automatic wake-up mode */
421 CAN_InitStruct->CAN_AWUM = DISABLE;
423 /* Initialize the no automatic retransmission */
424 CAN_InitStruct->CAN_NART = DISABLE;
426 /* Initialize the receive FIFO locked mode */
427 CAN_InitStruct->CAN_RFLM = DISABLE;
429 /* Initialize the transmit FIFO priority */
430 CAN_InitStruct->CAN_TXFP = DISABLE;
432 /* Initialize the CAN_Mode member */
433 CAN_InitStruct->CAN_Mode = CAN_Mode_Normal;
435 /* Initialize the CAN_SJW member */
436 CAN_InitStruct->CAN_SJW = CAN_SJW_1tq;
438 /* Initialize the CAN_BS1 member */
439 CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq;
441 /* Initialize the CAN_BS2 member */
442 CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq;
444 /* Initialize the CAN_Prescaler member */
445 CAN_InitStruct->CAN_Prescaler = 1;
449 * @brief Select the start bank filter for slave CAN.
450 * @param CAN_BankNumber: Select the start slave bank filter from 1..27.
453 void CAN_SlaveStartBank(uint8_t CAN_BankNumber)
455 /* Check the parameters */
456 assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber));
458 /* Enter Initialisation mode for the filter */
459 CAN1->FMR |= FMR_FINIT;
461 /* Select the start slave bank */
462 CAN1->FMR &= (uint32_t)0xFFFFC0F1 ;
463 CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8;
465 /* Leave Initialisation mode for the filter */
466 CAN1->FMR &= ~FMR_FINIT;
470 * @brief Enables or disables the DBG Freeze for CAN.
471 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
472 * @param NewState: new state of the CAN peripheral.
473 * This parameter can be: ENABLE (CAN reception/transmission is frozen
474 * during debug. Reception FIFOs can still be accessed/controlled normally)
475 * or DISABLE (CAN is working during debug).
478 void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState)
480 /* Check the parameters */
481 assert_param(IS_CAN_ALL_PERIPH(CANx));
482 assert_param(IS_FUNCTIONAL_STATE(NewState));
484 if (NewState != DISABLE)
486 /* Enable Debug Freeze */
487 CANx->MCR |= MCR_DBF;
491 /* Disable Debug Freeze */
492 CANx->MCR &= ~MCR_DBF;
497 * @brief Enables or disables the CAN Time TriggerOperation communication mode.
498 * @note DLC must be programmed as 8 in order Time Stamp (2 bytes) to be
499 * sent over the CAN bus.
500 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
501 * @param NewState: Mode new state. This parameter can be: ENABLE or DISABLE.
502 * When enabled, Time stamp (TIME[15:0]) value is sent in the last two
503 * data bytes of the 8-byte message: TIME[7:0] in data byte 6 and TIME[15:8]
507 void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState)
509 /* Check the parameters */
510 assert_param(IS_CAN_ALL_PERIPH(CANx));
511 assert_param(IS_FUNCTIONAL_STATE(NewState));
512 if (NewState != DISABLE)
514 /* Enable the TTCM mode */
515 CANx->MCR |= CAN_MCR_TTCM;
518 CANx->sTxMailBox[0].TDTR |= ((uint32_t)CAN_TDT0R_TGT);
519 CANx->sTxMailBox[1].TDTR |= ((uint32_t)CAN_TDT1R_TGT);
520 CANx->sTxMailBox[2].TDTR |= ((uint32_t)CAN_TDT2R_TGT);
524 /* Disable the TTCM mode */
525 CANx->MCR &= (uint32_t)(~(uint32_t)CAN_MCR_TTCM);
528 CANx->sTxMailBox[0].TDTR &= ((uint32_t)~CAN_TDT0R_TGT);
529 CANx->sTxMailBox[1].TDTR &= ((uint32_t)~CAN_TDT1R_TGT);
530 CANx->sTxMailBox[2].TDTR &= ((uint32_t)~CAN_TDT2R_TGT);
538 /** @defgroup CAN_Group2 CAN Frames Transmission functions
539 * @brief CAN Frames Transmission functions
542 ===============================================================================
543 ##### CAN Frames Transmission functions #####
544 ===============================================================================
545 [..] This section provides functions allowing to
546 (+) Initiate and transmit a CAN frame message (if there is an empty mailbox).
547 (+) Check the transmission status of a CAN Frame.
548 (+) Cancel a transmit request.
555 * @brief Initiates and transmits a CAN frame message.
556 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
557 * @param TxMessage: pointer to a structure which contains CAN Id, CAN DLC and CAN data.
558 * @retval The number of the mailbox that is used for transmission or
559 * CAN_TxStatus_NoMailBox if there is no empty mailbox.
561 uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage)
563 uint8_t transmit_mailbox = 0;
564 /* Check the parameters */
565 assert_param(IS_CAN_ALL_PERIPH(CANx));
566 assert_param(IS_CAN_IDTYPE(TxMessage->IDE));
567 assert_param(IS_CAN_RTR(TxMessage->RTR));
568 assert_param(IS_CAN_DLC(TxMessage->DLC));
570 /* Select one empty transmit mailbox */
571 if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
573 transmit_mailbox = 0;
575 else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
577 transmit_mailbox = 1;
579 else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
581 transmit_mailbox = 2;
585 transmit_mailbox = CAN_TxStatus_NoMailBox;
588 if (transmit_mailbox != CAN_TxStatus_NoMailBox)
591 CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ;
592 if (TxMessage->IDE == CAN_Id_Standard)
594 assert_param(IS_CAN_STDID(TxMessage->StdId));
595 CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | \
600 assert_param(IS_CAN_EXTID(TxMessage->ExtId));
601 CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId << 3) | \
607 TxMessage->DLC &= (uint8_t)0x0000000F;
608 CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0;
609 CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC;
611 /* Set up the data field */
612 CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) |
613 ((uint32_t)TxMessage->Data[2] << 16) |
614 ((uint32_t)TxMessage->Data[1] << 8) |
615 ((uint32_t)TxMessage->Data[0]));
616 CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) |
617 ((uint32_t)TxMessage->Data[6] << 16) |
618 ((uint32_t)TxMessage->Data[5] << 8) |
619 ((uint32_t)TxMessage->Data[4]));
620 /* Request transmission */
621 CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ;
623 return transmit_mailbox;
627 * @brief Checks the transmission status of a CAN Frame.
628 * @param CANx: where x can be 1 to select the CAN1 peripheral.
629 * @param TransmitMailbox: the number of the mailbox that is used for transmission.
630 * @retval CAN_TxStatus_Ok if the CAN driver transmits the message,
631 * CAN_TxStatus_Failed in an other case.
633 uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox)
637 /* Check the parameters */
638 assert_param(IS_CAN_ALL_PERIPH(CANx));
639 assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox));
641 switch (TransmitMailbox)
643 case (CAN_TXMAILBOX_0):
644 state = CANx->TSR & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0);
646 case (CAN_TXMAILBOX_1):
647 state = CANx->TSR & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1);
649 case (CAN_TXMAILBOX_2):
650 state = CANx->TSR & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2);
653 state = CAN_TxStatus_Failed;
658 /* transmit pending */
659 case (0x0): state = CAN_TxStatus_Pending;
661 /* transmit failed */
662 case (CAN_TSR_RQCP0 | CAN_TSR_TME0): state = CAN_TxStatus_Failed;
664 case (CAN_TSR_RQCP1 | CAN_TSR_TME1): state = CAN_TxStatus_Failed;
666 case (CAN_TSR_RQCP2 | CAN_TSR_TME2): state = CAN_TxStatus_Failed;
668 /* transmit succeeded */
669 case (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0):state = CAN_TxStatus_Ok;
671 case (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1):state = CAN_TxStatus_Ok;
673 case (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2):state = CAN_TxStatus_Ok;
675 default: state = CAN_TxStatus_Failed;
678 return (uint8_t) state;
682 * @brief Cancels a transmit request.
683 * @param CANx: where x can be 1 to select the CAN1 peripheral.
684 * @param Mailbox: Mailbox number.
687 void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox)
689 /* Check the parameters */
690 assert_param(IS_CAN_ALL_PERIPH(CANx));
691 assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox));
692 /* abort transmission */
695 case (CAN_TXMAILBOX_0): CANx->TSR |= CAN_TSR_ABRQ0;
697 case (CAN_TXMAILBOX_1): CANx->TSR |= CAN_TSR_ABRQ1;
699 case (CAN_TXMAILBOX_2): CANx->TSR |= CAN_TSR_ABRQ2;
710 /** @defgroup CAN_Group3 CAN Frames Reception functions
711 * @brief CAN Frames Reception functions
714 ===============================================================================
715 ##### CAN Frames Reception functions #####
716 ===============================================================================
717 [..] This section provides functions allowing to
718 (+) Receive a correct CAN frame.
719 (+) Release a specified receive FIFO (2 FIFOs are available).
720 (+) Return the number of the pending received CAN frames.
727 * @brief Receives a correct CAN frame.
728 * @param CANx: where x can be 1 to select the CAN1 peripheral.
729 * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
730 * @param RxMessage: pointer to a structure receive frame which contains CAN Id,
731 * CAN DLC, CAN data and FMI number.
734 void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage)
736 /* Check the parameters */
737 assert_param(IS_CAN_ALL_PERIPH(CANx));
738 assert_param(IS_CAN_FIFO(FIFONumber));
740 RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR;
741 if (RxMessage->IDE == CAN_Id_Standard)
743 RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21);
747 RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3);
750 RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR;
752 RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR;
754 RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8);
755 /* Get the data field */
756 RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR;
757 RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8);
758 RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16);
759 RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24);
760 RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR;
761 RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8);
762 RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16);
763 RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24);
764 /* Release the FIFO */
766 if (FIFONumber == CAN_FIFO0)
768 CANx->RF0R |= CAN_RF0R_RFOM0;
771 else /* FIFONumber == CAN_FIFO1 */
773 CANx->RF1R |= CAN_RF1R_RFOM1;
778 * @brief Releases the specified receive FIFO.
779 * @param CANx: where x can be 1 to select the CAN1 peripheral.
780 * @param FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1.
783 void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber)
785 /* Check the parameters */
786 assert_param(IS_CAN_ALL_PERIPH(CANx));
787 assert_param(IS_CAN_FIFO(FIFONumber));
789 if (FIFONumber == CAN_FIFO0)
791 CANx->RF0R |= CAN_RF0R_RFOM0;
794 else /* FIFONumber == CAN_FIFO1 */
796 CANx->RF1R |= CAN_RF1R_RFOM1;
801 * @brief Returns the number of pending received messages.
802 * @param CANx: where x can be 1 to select the CAN1 peripheral.
803 * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
804 * @retval NbMessage : which is the number of pending message.
806 uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber)
808 uint8_t message_pending=0;
809 /* Check the parameters */
810 assert_param(IS_CAN_ALL_PERIPH(CANx));
811 assert_param(IS_CAN_FIFO(FIFONumber));
812 if (FIFONumber == CAN_FIFO0)
814 message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03);
816 else if (FIFONumber == CAN_FIFO1)
818 message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03);
824 return message_pending;
831 /** @defgroup CAN_Group4 CAN Operation modes functions
832 * @brief CAN Operation modes functions
835 ===============================================================================
836 ##### CAN Operation modes functions #####
837 ===============================================================================
838 [..] This section provides functions allowing to select the CAN Operation modes:
841 (+) initialization mode.
849 * @brief Selects the CAN Operation mode.
850 * @param CAN_OperatingMode: CAN Operating Mode.
851 * This parameter can be one of @ref CAN_OperatingMode_TypeDef enumeration.
852 * @retval status of the requested mode which can be:
853 * - CAN_ModeStatus_Failed: CAN failed entering the specific mode
854 * - CAN_ModeStatus_Success: CAN Succeed entering the specific mode
856 uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode)
858 uint8_t status = CAN_ModeStatus_Failed;
860 /* Timeout for INAK or also for SLAK bits*/
861 uint32_t timeout = INAK_TIMEOUT;
863 /* Check the parameters */
864 assert_param(IS_CAN_ALL_PERIPH(CANx));
865 assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode));
867 if (CAN_OperatingMode == CAN_OperatingMode_Initialization)
869 /* Request initialisation */
870 CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ);
872 /* Wait the acknowledge */
873 while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0))
877 if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK)
879 status = CAN_ModeStatus_Failed;
883 status = CAN_ModeStatus_Success;
886 else if (CAN_OperatingMode == CAN_OperatingMode_Normal)
888 /* Request leave initialisation and sleep mode and enter Normal mode */
889 CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ));
891 /* Wait the acknowledge */
892 while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0))
896 if ((CANx->MSR & CAN_MODE_MASK) != 0)
898 status = CAN_ModeStatus_Failed;
902 status = CAN_ModeStatus_Success;
905 else if (CAN_OperatingMode == CAN_OperatingMode_Sleep)
907 /* Request Sleep mode */
908 CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
910 /* Wait the acknowledge */
911 while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0))
915 if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK)
917 status = CAN_ModeStatus_Failed;
921 status = CAN_ModeStatus_Success;
926 status = CAN_ModeStatus_Failed;
929 return (uint8_t) status;
933 * @brief Enters the Sleep (low power) mode.
934 * @param CANx: where x can be 1 to select the CAN1 peripheral.
935 * @retval CAN_Sleep_Ok if sleep entered, CAN_Sleep_Failed otherwise.
937 uint8_t CAN_Sleep(CAN_TypeDef* CANx)
939 uint8_t sleepstatus = CAN_Sleep_Failed;
941 /* Check the parameters */
942 assert_param(IS_CAN_ALL_PERIPH(CANx));
944 /* Request Sleep mode */
945 CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
947 /* Sleep mode status */
948 if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK)
950 /* Sleep mode not entered */
951 sleepstatus = CAN_Sleep_Ok;
953 /* return sleep mode status */
954 return (uint8_t)sleepstatus;
958 * @brief Wakes up the CAN peripheral from sleep mode .
959 * @param CANx: where x can be 1 to select the CAN1 peripheral.
960 * @retval CAN_WakeUp_Ok if sleep mode left, CAN_WakeUp_Failed otherwise.
962 uint8_t CAN_WakeUp(CAN_TypeDef* CANx)
964 uint32_t wait_slak = SLAK_TIMEOUT;
965 uint8_t wakeupstatus = CAN_WakeUp_Failed;
967 /* Check the parameters */
968 assert_param(IS_CAN_ALL_PERIPH(CANx));
970 /* Wake up request */
971 CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
973 /* Sleep mode status */
974 while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00))
978 if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK)
980 /* wake up done : Sleep mode exited */
981 wakeupstatus = CAN_WakeUp_Ok;
983 /* return wakeup status */
984 return (uint8_t)wakeupstatus;
991 /** @defgroup CAN_Group5 CAN Bus Error management functions
992 * @brief CAN Bus Error management functions
995 ===============================================================================
996 ##### CAN Bus Error management functions #####
997 ===============================================================================
998 [..] This section provides functions allowing to
999 (+) Return the CANx's last error code (LEC).
1000 (+) Return the CANx Receive Error Counter (REC).
1001 (+) Return the LSB of the 9-bit CANx Transmit Error Counter(TEC).
1003 (@) If TEC is greater than 255, The CAN is in bus-off state.
1004 (@) If REC or TEC are greater than 96, an Error warning flag occurs.
1005 (@) If REC or TEC are greater than 127, an Error Passive Flag occurs.
1012 * @brief Returns the CANx's last error code (LEC).
1013 * @param CANx: where x can be 1 to select the CAN1 peripheral.
1014 * @retval Error code:
1015 * - CAN_ERRORCODE_NoErr: No Error
1016 * - CAN_ERRORCODE_StuffErr: Stuff Error
1017 * - CAN_ERRORCODE_FormErr: Form Error
1018 * - CAN_ERRORCODE_ACKErr : Acknowledgment Error
1019 * - CAN_ERRORCODE_BitRecessiveErr: Bit Recessive Error
1020 * - CAN_ERRORCODE_BitDominantErr: Bit Dominant Error
1021 * - CAN_ERRORCODE_CRCErr: CRC Error
1022 * - CAN_ERRORCODE_SoftwareSetErr: Software Set Error
1024 uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx)
1026 uint8_t errorcode=0;
1028 /* Check the parameters */
1029 assert_param(IS_CAN_ALL_PERIPH(CANx));
1031 /* Get the error code*/
1032 errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC);
1034 /* Return the error code*/
1039 * @brief Returns the CANx Receive Error Counter (REC).
1040 * @note In case of an error during reception, this counter is incremented
1041 * by 1 or by 8 depending on the error condition as defined by the CAN
1042 * standard. After every successful reception, the counter is
1043 * decremented by 1 or reset to 120 if its value was higher than 128.
1044 * When the counter value exceeds 127, the CAN controller enters the
1045 * error passive state.
1046 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1047 * @retval CAN Receive Error Counter.
1049 uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx)
1053 /* Check the parameters */
1054 assert_param(IS_CAN_ALL_PERIPH(CANx));
1056 /* Get the Receive Error Counter*/
1057 counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24);
1059 /* Return the Receive Error Counter*/
1065 * @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC).
1066 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1067 * @retval LSB of the 9-bit CAN Transmit Error Counter.
1069 uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx)
1073 /* Check the parameters */
1074 assert_param(IS_CAN_ALL_PERIPH(CANx));
1076 /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
1077 counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16);
1079 /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */
1086 /** @defgroup CAN_Group6 Interrupts and flags management functions
1087 * @brief Interrupts and flags management functions
1090 ===============================================================================
1091 ##### Interrupts and flags management functions #####
1092 ===============================================================================
1093 [..] This section provides functions allowing to configure the CAN Interrupts
1094 and to get the status and clear flags and Interrupts pending bits.
1095 [..] The CAN provides 14 Interrupts sources and 15 Flags:
1099 [..] The 15 flags can be divided on 4 groups:
1101 (++) CAN_FLAG_RQCP0.
1102 (++) CAN_FLAG_RQCP1.
1103 (++) CAN_FLAG_RQCP2: Request completed MailBoxes 0, 1 and 2 Flags
1104 Set when when the last request (transmit or abort) has
1108 (++) CAN_FLAG_FMP1: FIFO 0 and 1 Message Pending Flags;
1109 Set to signal that messages are pending in the receive FIFO.
1110 These Flags are cleared only by hardware.
1112 (++) CAN_FLAG_FF1: FIFO 0 and 1 Full Flags;
1113 Set when three messages are stored in the selected FIFO.
1115 (++) CAN_FLAG_FOV1: FIFO 0 and 1 Overrun Flags;
1116 Set when a new message has been received and passed the filter
1117 while the FIFO was full.
1118 (+) Operating Mode Flags:
1119 (++) CAN_FLAG_WKU: Wake up Flag;
1120 Set to signal that a SOF bit has been detected while the CAN
1121 hardware was in Sleep mode.
1122 (++) CAN_FLAG_SLAK: Sleep acknowledge Flag;
1123 Set to signal that the CAN has entered Sleep Mode.
1125 (++) CAN_FLAG_EWG: Error Warning Flag;
1126 Set when the warning limit has been reached (Receive Error Counter
1127 or Transmit Error Counter greater than 96).
1128 This Flag is cleared only by hardware.
1129 (++) CAN_FLAG_EPV: Error Passive Flag;
1130 Set when the Error Passive limit has been reached (Receive Error
1131 Counter or Transmit Error Counter greater than 127).
1132 This Flag is cleared only by hardware.
1133 (++) CAN_FLAG_BOF: Bus-Off Flag;
1134 Set when CAN enters the bus-off state. The bus-off state is
1135 entered on TEC overflow, greater than 255.
1136 This Flag is cleared only by hardware.
1137 (++) CAN_FLAG_LEC: Last error code Flag;
1138 Set If a message has been transferred (reception or transmission)
1139 with error, and the error code is hold.
1143 [..] The 14 interrupts can be divided on 4 groups:
1144 (+) Transmit interrupt:
1145 (++) CAN_IT_TME: Transmit mailbox empty Interrupt;
1146 If enabled, this interrupt source is pending when no transmit
1147 request are pending for Tx mailboxes.
1148 (+) Receive Interrupts:
1150 (++) CAN_IT_FMP1: FIFO 0 and FIFO1 message pending Interrupts;
1151 If enabled, these interrupt sources are pending when messages
1152 are pending in the receive FIFO.
1153 The corresponding interrupt pending bits are cleared only by hardware.
1155 (++) CAN_IT_FF1: FIFO 0 and FIFO1 full Interrupts;
1156 If enabled, these interrupt sources are pending when three messages
1157 are stored in the selected FIFO.
1159 (++) CAN_IT_FOV1: FIFO 0 and FIFO1 overrun Interrupts;
1160 If enabled, these interrupt sources are pending when a new message
1161 has been received and passed the filter while the FIFO was full.
1162 (+) Operating Mode Interrupts:
1163 (++) CAN_IT_WKU: Wake-up Interrupt;
1164 If enabled, this interrupt source is pending when a SOF bit has
1165 been detected while the CAN hardware was in Sleep mode.
1166 (++) CAN_IT_SLK: Sleep acknowledge Interrupt:
1167 If enabled, this interrupt source is pending when the CAN has
1169 (+) Error Interrupts:
1170 (++) CAN_IT_EWG: Error warning Interrupt;
1171 If enabled, this interrupt source is pending when the warning limit
1172 has been reached (Receive Error Counter or Transmit Error Counter=96).
1173 (++) CAN_IT_EPV: Error passive Interrupt;
1174 If enabled, this interrupt source is pending when the Error Passive
1175 limit has been reached (Receive Error Counter or Transmit Error Counter>127).
1176 (++) CAN_IT_BOF: Bus-off Interrupt;
1177 If enabled, this interrupt source is pending when CAN enters
1178 the bus-off state. The bus-off state is entered on TEC overflow,
1180 This Flag is cleared only by hardware.
1181 (++) CAN_IT_LEC: Last error code Interrupt;
1182 If enabled, this interrupt source is pending when a message has
1183 been transferred (reception or transmission) with error and the
1185 (++) CAN_IT_ERR: Error Interrupt;
1186 If enabled, this interrupt source is pending when an error condition
1188 [..] Managing the CAN controller events:
1189 The user should identify which mode will be used in his application to manage
1190 the CAN controller events: Polling mode or Interrupt mode.
1191 (+) In the Polling Mode it is advised to use the following functions:
1192 (++) CAN_GetFlagStatus() : to check if flags events occur.
1193 (++) CAN_ClearFlag() : to clear the flags events.
1194 (+) In the Interrupt Mode it is advised to use the following functions:
1195 (++) CAN_ITConfig() : to enable or disable the interrupt source.
1196 (++) CAN_GetITStatus() : to check if Interrupt occurs.
1197 (++) CAN_ClearITPendingBit() : to clear the Interrupt pending Bit
1198 (corresponding Flag).
1199 This function has no impact on CAN_IT_FMP0 and CAN_IT_FMP1 Interrupts
1200 pending bits since there are cleared only by hardware.
1206 * @brief Enables or disables the specified CANx interrupts.
1207 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1208 * @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled.
1209 * This parameter can be:
1210 * @arg CAN_IT_TME: Transmit mailbox empty Interrupt
1211 * @arg CAN_IT_FMP0: FIFO 0 message pending Interrupt
1212 * @arg CAN_IT_FF0: FIFO 0 full Interrupt
1213 * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
1214 * @arg CAN_IT_FMP1: FIFO 1 message pending Interrupt
1215 * @arg CAN_IT_FF1: FIFO 1 full Interrupt
1216 * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
1217 * @arg CAN_IT_WKU: Wake-up Interrupt
1218 * @arg CAN_IT_SLK: Sleep acknowledge Interrupt
1219 * @arg CAN_IT_EWG: Error warning Interrupt
1220 * @arg CAN_IT_EPV: Error passive Interrupt
1221 * @arg CAN_IT_BOF: Bus-off Interrupt
1222 * @arg CAN_IT_LEC: Last error code Interrupt
1223 * @arg CAN_IT_ERR: Error Interrupt
1224 * @param NewState: new state of the CAN interrupts.
1225 * This parameter can be: ENABLE or DISABLE.
1228 void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState)
1230 /* Check the parameters */
1231 assert_param(IS_CAN_ALL_PERIPH(CANx));
1232 assert_param(IS_CAN_IT(CAN_IT));
1233 assert_param(IS_FUNCTIONAL_STATE(NewState));
1235 if (NewState != DISABLE)
1237 /* Enable the selected CANx interrupt */
1238 CANx->IER |= CAN_IT;
1242 /* Disable the selected CANx interrupt */
1243 CANx->IER &= ~CAN_IT;
1247 * @brief Checks whether the specified CAN flag is set or not.
1248 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1249 * @param CAN_FLAG: specifies the flag to check.
1250 * This parameter can be one of the following values:
1251 * @arg CAN_FLAG_RQCP0: Request MailBox0 Flag
1252 * @arg CAN_FLAG_RQCP1: Request MailBox1 Flag
1253 * @arg CAN_FLAG_RQCP2: Request MailBox2 Flag
1254 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
1255 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
1256 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
1257 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
1258 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
1259 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
1260 * @arg CAN_FLAG_WKU: Wake up Flag
1261 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
1262 * @arg CAN_FLAG_EWG: Error Warning Flag
1263 * @arg CAN_FLAG_EPV: Error Passive Flag
1264 * @arg CAN_FLAG_BOF: Bus-Off Flag
1265 * @arg CAN_FLAG_LEC: Last error code Flag
1266 * @retval The new state of CAN_FLAG (SET or RESET).
1268 FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
1270 FlagStatus bitstatus = RESET;
1272 /* Check the parameters */
1273 assert_param(IS_CAN_ALL_PERIPH(CANx));
1274 assert_param(IS_CAN_GET_FLAG(CAN_FLAG));
1277 if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET)
1279 /* Check the status of the specified CAN flag */
1280 if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1282 /* CAN_FLAG is set */
1287 /* CAN_FLAG is reset */
1291 else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET)
1293 /* Check the status of the specified CAN flag */
1294 if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1296 /* CAN_FLAG is set */
1301 /* CAN_FLAG is reset */
1305 else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET)
1307 /* Check the status of the specified CAN flag */
1308 if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1310 /* CAN_FLAG is set */
1315 /* CAN_FLAG is reset */
1319 else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET)
1321 /* Check the status of the specified CAN flag */
1322 if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1324 /* CAN_FLAG is set */
1329 /* CAN_FLAG is reset */
1333 else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */
1335 /* Check the status of the specified CAN flag */
1336 if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
1338 /* CAN_FLAG is set */
1343 /* CAN_FLAG is reset */
1347 /* Return the CAN_FLAG status */
1352 * @brief Clears the CAN's pending flags.
1353 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1354 * @param CAN_FLAG: specifies the flag to clear.
1355 * This parameter can be one of the following values:
1356 * @arg CAN_FLAG_RQCP0: Request MailBox0 Flag
1357 * @arg CAN_FLAG_RQCP1: Request MailBox1 Flag
1358 * @arg CAN_FLAG_RQCP2: Request MailBox2 Flag
1359 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
1360 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
1361 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
1362 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
1363 * @arg CAN_FLAG_WKU: Wake up Flag
1364 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
1365 * @arg CAN_FLAG_LEC: Last error code Flag
1368 void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
1371 /* Check the parameters */
1372 assert_param(IS_CAN_ALL_PERIPH(CANx));
1373 assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG));
1375 if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */
1377 /* Clear the selected CAN flags */
1378 CANx->ESR = (uint32_t)RESET;
1380 else /* MSR or TSR or RF0R or RF1R */
1382 flagtmp = CAN_FLAG & 0x000FFFFF;
1384 if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET)
1387 CANx->RF0R = (uint32_t)(flagtmp);
1389 else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET)
1392 CANx->RF1R = (uint32_t)(flagtmp);
1394 else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET)
1396 /* Transmit Flags */
1397 CANx->TSR = (uint32_t)(flagtmp);
1399 else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */
1401 /* Operating mode Flags */
1402 CANx->MSR = (uint32_t)(flagtmp);
1408 * @brief Checks whether the specified CANx interrupt has occurred or not.
1409 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1410 * @param CAN_IT: specifies the CAN interrupt source to check.
1411 * This parameter can be one of the following values:
1412 * @arg CAN_IT_TME: Transmit mailbox empty Interrupt
1413 * @arg CAN_IT_FMP0: FIFO 0 message pending Interrupt
1414 * @arg CAN_IT_FF0: FIFO 0 full Interrupt
1415 * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
1416 * @arg CAN_IT_FMP1: FIFO 1 message pending Interrupt
1417 * @arg CAN_IT_FF1: FIFO 1 full Interrupt
1418 * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
1419 * @arg CAN_IT_WKU: Wake-up Interrupt
1420 * @arg CAN_IT_SLK: Sleep acknowledge Interrupt
1421 * @arg CAN_IT_EWG: Error warning Interrupt
1422 * @arg CAN_IT_EPV: Error passive Interrupt
1423 * @arg CAN_IT_BOF: Bus-off Interrupt
1424 * @arg CAN_IT_LEC: Last error code Interrupt
1425 * @arg CAN_IT_ERR: Error Interrupt
1426 * @retval The current state of CAN_IT (SET or RESET).
1428 ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT)
1430 ITStatus itstatus = RESET;
1431 /* Check the parameters */
1432 assert_param(IS_CAN_ALL_PERIPH(CANx));
1433 assert_param(IS_CAN_IT(CAN_IT));
1435 /* check the interrupt enable bit */
1436 if((CANx->IER & CAN_IT) != RESET)
1438 /* in case the Interrupt is enabled, .... */
1442 /* Check CAN_TSR_RQCPx bits */
1443 itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2);
1446 /* Check CAN_RF0R_FMP0 bit */
1447 itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0);
1450 /* Check CAN_RF0R_FULL0 bit */
1451 itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0);
1454 /* Check CAN_RF0R_FOVR0 bit */
1455 itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0);
1458 /* Check CAN_RF1R_FMP1 bit */
1459 itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1);
1462 /* Check CAN_RF1R_FULL1 bit */
1463 itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1);
1466 /* Check CAN_RF1R_FOVR1 bit */
1467 itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1);
1470 /* Check CAN_MSR_WKUI bit */
1471 itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI);
1474 /* Check CAN_MSR_SLAKI bit */
1475 itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI);
1478 /* Check CAN_ESR_EWGF bit */
1479 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF);
1482 /* Check CAN_ESR_EPVF bit */
1483 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF);
1486 /* Check CAN_ESR_BOFF bit */
1487 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF);
1490 /* Check CAN_ESR_LEC bit */
1491 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC);
1494 /* Check CAN_MSR_ERRI bit */
1495 itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI);
1498 /* in case of error, return RESET */
1505 /* in case the Interrupt is not enabled, return RESET */
1509 /* Return the CAN_IT status */
1514 * @brief Clears the CANx's interrupt pending bits.
1515 * @param CANx: where x can be 1 or 2 to to select the CAN peripheral.
1516 * @param CAN_IT: specifies the interrupt pending bit to clear.
1517 * This parameter can be one of the following values:
1518 * @arg CAN_IT_TME: Transmit mailbox empty Interrupt
1519 * @arg CAN_IT_FF0: FIFO 0 full Interrupt
1520 * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt
1521 * @arg CAN_IT_FF1: FIFO 1 full Interrupt
1522 * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt
1523 * @arg CAN_IT_WKU: Wake-up Interrupt
1524 * @arg CAN_IT_SLK: Sleep acknowledge Interrupt
1525 * @arg CAN_IT_EWG: Error warning Interrupt
1526 * @arg CAN_IT_EPV: Error passive Interrupt
1527 * @arg CAN_IT_BOF: Bus-off Interrupt
1528 * @arg CAN_IT_LEC: Last error code Interrupt
1529 * @arg CAN_IT_ERR: Error Interrupt
1532 void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT)
1534 /* Check the parameters */
1535 assert_param(IS_CAN_ALL_PERIPH(CANx));
1536 assert_param(IS_CAN_CLEAR_IT(CAN_IT));
1541 /* Clear CAN_TSR_RQCPx (rc_w1)*/
1542 CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2;
1545 /* Clear CAN_RF0R_FULL0 (rc_w1)*/
1546 CANx->RF0R = CAN_RF0R_FULL0;
1549 /* Clear CAN_RF0R_FOVR0 (rc_w1)*/
1550 CANx->RF0R = CAN_RF0R_FOVR0;
1553 /* Clear CAN_RF1R_FULL1 (rc_w1)*/
1554 CANx->RF1R = CAN_RF1R_FULL1;
1557 /* Clear CAN_RF1R_FOVR1 (rc_w1)*/
1558 CANx->RF1R = CAN_RF1R_FOVR1;
1561 /* Clear CAN_MSR_WKUI (rc_w1)*/
1562 CANx->MSR = CAN_MSR_WKUI;
1565 /* Clear CAN_MSR_SLAKI (rc_w1)*/
1566 CANx->MSR = CAN_MSR_SLAKI;
1569 /* Clear CAN_MSR_ERRI (rc_w1) */
1570 CANx->MSR = CAN_MSR_ERRI;
1571 /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
1574 /* Clear CAN_MSR_ERRI (rc_w1) */
1575 CANx->MSR = CAN_MSR_ERRI;
1576 /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
1579 /* Clear CAN_MSR_ERRI (rc_w1) */
1580 CANx->MSR = CAN_MSR_ERRI;
1581 /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/
1584 /* Clear LEC bits */
1586 /* Clear CAN_MSR_ERRI (rc_w1) */
1587 CANx->MSR = CAN_MSR_ERRI;
1592 /* Clear CAN_MSR_ERRI (rc_w1) */
1593 CANx->MSR = CAN_MSR_ERRI;
1594 /* @note BOFF, EPVF and EWGF Flags are cleared by hardware depending on the CAN Bus status*/
1605 * @brief Checks whether the CAN interrupt has occurred or not.
1606 * @param CAN_Reg: specifies the CAN interrupt register to check.
1607 * @param It_Bit: specifies the interrupt source bit to check.
1608 * @retval The new state of the CAN Interrupt (SET or RESET).
1610 static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit)
1612 ITStatus pendingbitstatus = RESET;
1614 if ((CAN_Reg & It_Bit) != (uint32_t)RESET)
1617 pendingbitstatus = SET;
1621 /* CAN_IT is reset */
1622 pendingbitstatus = RESET;
1624 return pendingbitstatus;
1639 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/