2 ******************************************************************************
3 * @file stm32f30x_dac.c
4 * @author MCD Application Team
6 * @date 27-February-2014
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Digital-to-Analog Converter (DAC) peripheral:
9 * + DAC channels configuration: trigger, output buffer, data format
11 * + Interrupts and flags management
15 ===============================================================================
16 ##### DAC Peripheral features #####
17 ===============================================================================
18 [..] The device integrates two 12-bit Digital Analog Converters that can
19 be used independently or simultaneously (dual mode):
20 (#) DAC1 integrates two DAC channels:
21 (++) DAC1 channel 1 with DAC1_OUT1 as output
22 (++) DAC1 channel 2 with DAC1_OUT2 as output
23 (++) The two channels can be used independently or simultaneously (dual mode)
25 (#) DAC2 integrates only one channel DAC2 channel 1 with DAC2_OUT1 as output
27 [..] Digital to Analog conversion can be non-triggered using DAC_Trigger_None
28 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register using
29 DAC_SetChannel1Data()/DAC_SetChannel2Data.
31 [..] Digital to Analog conversion can be triggered by:
32 (#) External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_Trigger_Ext_IT9.
33 The used pin (GPIOx_Pin9) must be configured in input mode.
35 (#) Timers TRGO: TIM2, TIM8/TIM3, TIM4, TIM6, TIM7, and TIM15
36 (DAC_Trigger_T2_TRGO, DAC_Trigger_T4_TRGO...)
37 The timer TRGO event should be selected using TIM_SelectOutputTrigger()
38 (++) To trigger DAC conversions by TIM3 instead of TIM8 follow
40 (+++) Enable SYSCFG APB clock by calling
41 RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
42 (+++) Select DAC_Trigger_T3_TRGO when calling DAC_Init()
43 (+++) Remap the DAC trigger from TIM8 to TIM3 by calling
44 SYSCFG_TriggerRemapConfig(SYSCFG_TriggerRemap_DACTIM3, ENABLE)
45 (#) Software using DAC_Trigger_Software
47 [..] Each DAC channel integrates an output buffer that can be used to
48 reduce the output impedance, and to drive external loads directly
49 without having to add an external operational amplifier.
50 To enable, the output buffer use
51 DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
53 [..] Refer to the device datasheet for more details about output impedance
54 value with and without output buffer.
56 [..] Both DAC channels can be used to generate:
57 (+) Noise wave using DAC_WaveGeneration_Noise
58 (+) Triangle wave using DAC_WaveGeneration_Triangle
60 [..] Wave generation can be disabled using DAC_WaveGeneration_None
62 [..] The DAC data format can be:
63 (+) 8-bit right alignment using DAC_Align_8b_R
64 (+) 12-bit left alignment using DAC_Align_12b_L
65 (+) 12-bit right alignment using DAC_Align_12b_R
67 [..] The analog output voltage on each DAC channel pin is determined
68 by the following equation:
69 (+) DAC_OUTx = VREF+ * DOR / 4095 with DOR is the Data Output Register.
70 VREF+ is the input voltage reference (refer to the device datasheet)
71 e.g. To set DAC_OUT1 to 0.7V, use DAC_SetChannel1Data(DAC_Align_12b_R, 868);
72 Assuming that VREF+ = 3.3, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
74 [..] A DMA1 request can be generated when an external trigger (but not
75 a software trigger) occurs if DMA1 requests are enabled using
77 DMA1 requests are mapped as following:
78 (+) DAC channel1 is mapped on DMA1 channel3 which must be already
80 (+) DAC channel2 is mapped on DMA1 channel4 which must be already
83 ##### How to use this driver #####
84 ===============================================================================
86 (+) Enable DAC APB1 clock to get write access to DAC registers
87 using RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE)
89 (+) Configure DACx_OUTy (DAC1_OUT1: PA4, DAC1_OUT2: PA5, DAC2_OUT1: PA6)
92 (+) Configure the DAC channel using DAC_Init()
94 (+) Enable the DAC channel using DAC_Cmd()
98 ******************************************************************************
101 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
103 * Redistribution and use in source and binary forms, with or without modification,
104 * are permitted provided that the following conditions are met:
105 * 1. Redistributions of source code must retain the above copyright notice,
106 * this list of conditions and the following disclaimer.
107 * 2. Redistributions in binary form must reproduce the above copyright notice,
108 * this list of conditions and the following disclaimer in the documentation
109 * and/or other materials provided with the distribution.
110 * 3. Neither the name of STMicroelectronics nor the names of its contributors
111 * may be used to endorse or promote products derived from this software
112 * without specific prior written permission.
114 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
115 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
116 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
117 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
118 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
119 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
121 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
122 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
123 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
125 ******************************************************************************
129 /* Includes ------------------------------------------------------------------*/
130 #include "stm32f30x_dac.h"
131 #include "stm32f30x_rcc.h"
133 /** @addtogroup STM32F30x_StdPeriph_Driver
138 * @brief DAC driver modules
142 /* Private typedef -----------------------------------------------------------*/
143 /* Private define ------------------------------------------------------------*/
145 /* CR register Mask */
146 #define CR_CLEAR_MASK ((uint32_t)0x00000FFE)
148 /* DAC Dual Channels SWTRIG masks */
149 #define DUAL_SWTRIG_SET ((uint32_t)0x00000003)
150 #define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC)
152 /* DHR registers offsets */
153 #define DHR12R1_OFFSET ((uint32_t)0x00000008)
154 #define DHR12R2_OFFSET ((uint32_t)0x00000014)
155 #define DHR12RD_OFFSET ((uint32_t)0x00000020)
157 /* DOR register offset */
158 #define DOR_OFFSET ((uint32_t)0x0000002C)
160 /* Private macro -------------------------------------------------------------*/
161 /* Private variables ---------------------------------------------------------*/
162 /* Private function prototypes -----------------------------------------------*/
163 /* Private functions ---------------------------------------------------------*/
165 /** @defgroup DAC_Private_Functions
169 /** @defgroup DAC_Group1 DAC channels configuration
170 * @brief DAC channels configuration: trigger, output buffer, data format
173 ===============================================================================
174 ##### DAC channels configuration: trigger, output buffer, data format #####
175 ===============================================================================
182 * @brief Deinitializes the DAC peripheral registers to their default reset values.
183 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
186 void DAC_DeInit(DAC_TypeDef* DACx)
188 /* Check the parameters */
189 assert_param(IS_DAC_ALL_PERIPH(DACx));
193 /* Enable DAC1 reset state */
194 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC1, ENABLE);
195 /* Release DAC1 from reset state */
196 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC1, DISABLE);
200 /* Enable DAC2 reset state */
201 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC2, ENABLE);
202 /* Release DAC2 from reset state */
203 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC2, DISABLE);
208 * @brief Initializes the DAC peripheral according to the specified
209 * parameters in the DAC_InitStruct.
210 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
211 * @param DAC_Channel: the selected DAC channel.
212 * This parameter can be one of the following values:
213 * @arg DAC_Channel_1: DAC Channel1 selected
214 * @arg DAC_Channel_2: DAC Channel2 selected
215 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
216 * contains the configuration information for the specified DAC channel.
219 void DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
221 uint32_t tmpreg1 = 0, tmpreg2 = 0;
223 /* Check the DAC parameters */
224 assert_param(IS_DAC_ALL_PERIPH(DACx));
225 assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
226 assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
227 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
228 assert_param(IS_DAC_BUFFER_SWITCH_STATE(DAC_InitStruct->DAC_Buffer_Switch));
230 /*---------------------------- DAC CR Configuration --------------------------*/
231 /* Get the DAC CR value */
233 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
234 tmpreg1 &= ~(CR_CLEAR_MASK << DAC_Channel);
235 /* Configure for the selected DAC channel: buffer output, trigger, wave generation,
236 mask/amplitude for wave generation */
238 /* Set TSELx and TENx bits according to DAC_Trigger value */
239 /* Set WAVEx bits according to DAC_WaveGeneration value */
240 /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
241 /* Set BOFFx OUTENx bit according to DAC_Buffer_Switch value */
242 tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
243 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_Buffer_Switch);
245 /* Calculate CR register value depending on DAC_Channel */
246 tmpreg1 |= tmpreg2 << DAC_Channel;
247 /* Write to DAC CR */
252 * @brief Fills each DAC_InitStruct member with its default value.
253 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure which will
257 void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
259 /*--------------- Reset DAC init structure parameters values -----------------*/
260 /* Initialize the DAC_Trigger member */
261 DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
262 /* Initialize the DAC_WaveGeneration member */
263 DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
264 /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
265 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
266 /* Initialize the DAC_Buffer_Switch member */
267 DAC_InitStruct->DAC_Buffer_Switch = DAC_BufferSwitch_Enable;
271 * @brief Enables or disables the specified DAC channel.
272 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
273 * @param DAC_Channel: The selected DAC channel.
274 * This parameter can be one of the following values:
275 * @arg DAC_Channel_1: DAC Channel1 selected
276 * @arg DAC_Channel_2: DAC Channel2 selected
277 * @param NewState: new state of the DAC channel.
278 * This parameter can be: ENABLE or DISABLE.
279 * @note When the DAC channel is enabled the trigger source can no more
283 void DAC_Cmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, FunctionalState NewState)
285 /* Check the parameters */
286 assert_param(IS_DAC_ALL_PERIPH(DACx));
287 assert_param(IS_DAC_CHANNEL(DAC_Channel));
288 assert_param(IS_FUNCTIONAL_STATE(NewState));
290 if (NewState != DISABLE)
292 /* Enable the selected DAC channel */
293 DACx->CR |= (DAC_CR_EN1 << DAC_Channel);
297 /* Disable the selected DAC channel */
298 DACx->CR &= (~(DAC_CR_EN1 << DAC_Channel));
303 * @brief Enables or disables the selected DAC channel software trigger.
304 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
305 * @param DAC_Channel: the selected DAC channel.
306 * This parameter can be one of the following values:
307 * @arg DAC_Channel_1: DAC Channel1 selected
308 * @arg DAC_Channel_2: DAC Channel2 selected
309 * @param NewState: new state of the selected DAC channel software trigger.
310 * This parameter can be: ENABLE or DISABLE.
313 void DAC_SoftwareTriggerCmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, FunctionalState NewState)
315 /* Check the parameters */
316 assert_param(IS_DAC_ALL_PERIPH(DACx));
317 assert_param(IS_DAC_CHANNEL(DAC_Channel));
318 assert_param(IS_FUNCTIONAL_STATE(NewState));
320 if (NewState != DISABLE)
322 /* Enable software trigger for the selected DAC channel */
323 DACx->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4);
327 /* Disable software trigger for the selected DAC channel */
328 DACx->SWTRIGR &= ~((uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4));
333 * @brief Enables or disables simultaneously the two DAC channels software
335 * @param DACx: where x can be 1 to select the DAC1 peripheral.
336 * @note Dual trigger is not applicable for DAC2 (DAC2 integrates one channel).
337 * @param NewState: new state of the DAC channels software triggers.
338 * This parameter can be: ENABLE or DISABLE.
341 void DAC_DualSoftwareTriggerCmd(DAC_TypeDef* DACx, FunctionalState NewState)
343 /* Check the parameters */
344 assert_param(IS_DAC_LIST1_PERIPH(DACx));
345 assert_param(IS_FUNCTIONAL_STATE(NewState));
347 if (NewState != DISABLE)
349 /* Enable software trigger for both DAC channels */
350 DACx->SWTRIGR |= DUAL_SWTRIG_SET;
354 /* Disable software trigger for both DAC channels */
355 DACx->SWTRIGR &= DUAL_SWTRIG_RESET;
360 * @brief Enables or disables the selected DAC channel wave generation.
361 * @param DACx: where x can be 1 to select the DAC1 peripheral.
362 * @note Wave generation is not available in DAC2.
363 * @param DAC_Channel: the selected DAC channel.
364 * This parameter can be one of the following values:
365 * @arg DAC_Channel_1: DAC Channel1 selected
366 * @arg DAC_Channel_2: DAC Channel2 selected
367 * @param DAC_Wave: Specifies the wave type to enable or disable.
368 * This parameter can be one of the following values:
369 * @arg DAC_Wave_Noise: noise wave generation
370 * @arg DAC_Wave_Triangle: triangle wave generation
371 * @param NewState: new state of the selected DAC channel wave generation.
372 * This parameter can be: ENABLE or DISABLE.
376 void DAC_WaveGenerationCmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
378 /* Check the parameters */
379 assert_param(IS_DAC_LIST1_PERIPH(DACx));
380 assert_param(IS_DAC_CHANNEL(DAC_Channel));
381 assert_param(IS_DAC_WAVE(DAC_Wave));
382 assert_param(IS_FUNCTIONAL_STATE(NewState));
384 if (NewState != DISABLE)
386 /* Enable the selected wave generation for the selected DAC channel */
387 DACx->CR |= DAC_Wave << DAC_Channel;
391 /* Disable the selected wave generation for the selected DAC channel */
392 DACx->CR &= ~(DAC_Wave << DAC_Channel);
397 * @brief Set the specified data holding register value for DAC channel1.
398 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
399 * @param DAC_Align: Specifies the data alignment for DAC channel1.
400 * This parameter can be one of the following values:
401 * @arg DAC_Align_8b_R: 8bit right data alignment selected
402 * @arg DAC_Align_12b_L: 12bit left data alignment selected
403 * @arg DAC_Align_12b_R: 12bit right data alignment selected
404 * @param Data: Data to be loaded in the selected data holding register.
407 void DAC_SetChannel1Data(DAC_TypeDef* DACx, uint32_t DAC_Align, uint16_t Data)
409 __IO uint32_t tmp = 0;
411 /* Check the parameters */
412 assert_param(IS_DAC_ALL_PERIPH(DACx));
413 assert_param(IS_DAC_ALIGN(DAC_Align));
414 assert_param(IS_DAC_DATA(Data));
416 tmp = (uint32_t)DACx;
417 tmp += DHR12R1_OFFSET + DAC_Align;
419 /* Set the DAC channel1 selected data holding register */
420 *(__IO uint32_t *) tmp = Data;
424 * @brief Set the specified data holding register value for DAC channel2.
425 * @param DACx: where x can be 1 to select the DAC peripheral.
426 * @note This function is available only for DAC1.
427 * @param DAC_Align: Specifies the data alignment for DAC channel2.
428 * This parameter can be one of the following values:
429 * @arg DAC_Align_8b_R: 8bit right data alignment selected
430 * @arg DAC_Align_12b_L: 12bit left data alignment selected
431 * @arg DAC_Align_12b_R: 12bit right data alignment selected
432 * @param Data : Data to be loaded in the selected data holding register.
435 void DAC_SetChannel2Data(DAC_TypeDef* DACx, uint32_t DAC_Align, uint16_t Data)
437 __IO uint32_t tmp = 0;
439 /* Check the parameters */
440 assert_param(IS_DAC_LIST1_PERIPH(DACx));
441 assert_param(IS_DAC_ALIGN(DAC_Align));
442 assert_param(IS_DAC_DATA(Data));
444 tmp = (uint32_t)DACx;
445 tmp += DHR12R2_OFFSET + DAC_Align;
447 /* Set the DAC channel2 selected data holding register */
448 *(__IO uint32_t *)tmp = Data;
452 * @brief Set the specified data holding register value for dual channel DAC.
453 * @param DACx: where x can be 1 to select the DAC peripheral.
454 * @note This function isn't applicable for DAC2.
455 * @param DAC_Align: Specifies the data alignment for dual channel DAC.
456 * This parameter can be one of the following values:
457 * @arg DAC_Align_8b_R: 8bit right data alignment selected
458 * @arg DAC_Align_12b_L: 12bit left data alignment selected
459 * @arg DAC_Align_12b_R: 12bit right data alignment selected
460 * @param Data2: Data for DAC Channel2 to be loaded in the selected data
462 * @param Data1: Data for DAC Channel1 to be loaded in the selected data
464 * @note In dual mode, a unique register access is required to write in both
465 * DAC channels at the same time.
468 void DAC_SetDualChannelData(DAC_TypeDef* DACx, uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
470 uint32_t data = 0, tmp = 0;
472 /* Check the parameters */
473 assert_param(IS_DAC_LIST1_PERIPH(DACx));
474 assert_param(IS_DAC_ALIGN(DAC_Align));
475 assert_param(IS_DAC_DATA(Data1));
476 assert_param(IS_DAC_DATA(Data2));
478 /* Calculate and set dual DAC data holding register value */
479 if (DAC_Align == DAC_Align_8b_R)
481 data = ((uint32_t)Data2 << 8) | Data1;
485 data = ((uint32_t)Data2 << 16) | Data1;
488 tmp = (uint32_t)DACx;
489 tmp += DHR12RD_OFFSET + DAC_Align;
491 /* Set the dual DAC selected data holding register */
492 *(__IO uint32_t *)tmp = data;
496 * @brief Returns the last data output value of the selected DAC channel.
497 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
498 * @param DAC_Channel: the selected DAC channel.
499 * This parameter can be one of the following values:
500 * @arg DAC_Channel_1: DAC Channel1 selected
501 * @arg DAC_Channel_2: DAC Channel2 selected
502 * @retval The selected DAC channel data output value.
504 uint16_t DAC_GetDataOutputValue(DAC_TypeDef* DACx, uint32_t DAC_Channel)
506 __IO uint32_t tmp = 0;
508 /* Check the parameters */
509 assert_param(IS_DAC_ALL_PERIPH(DACx));
510 assert_param(IS_DAC_CHANNEL(DAC_Channel));
512 tmp = (uint32_t) DACx;
513 tmp += DOR_OFFSET + ((uint32_t)DAC_Channel >> 2);
515 /* Returns the DAC channel data output register value */
516 return (uint16_t) (*(__IO uint32_t*) tmp);
523 /** @defgroup DAC_Group2 DMA management functions
524 * @brief DMA management functions
527 ===============================================================================
528 ##### DMA management functions #####
529 ===============================================================================
536 * @brief Enables or disables the specified DAC channel DMA request.
537 * When enabled DMA1 is generated when an external trigger (EXTI Line9,
538 * TIM2, TIM4, TIM6, TIM7 or TIM9 but not a software trigger) occurs
539 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
540 * @param DAC_Channel: the selected DAC channel.
541 * This parameter can be one of the following values:
542 * @arg DAC_Channel_1: DAC Channel1 selected
543 * @arg DAC_Channel_2: DAC Channel2 selected
544 * @param NewState: new state of the selected DAC channel DMA request.
545 * This parameter can be: ENABLE or DISABLE.
546 * @note The DAC channel1 (channel2) is mapped on DMA1 channel3 (channel4) which
547 * must be already configured.
550 void DAC_DMACmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, FunctionalState NewState)
552 /* Check the parameters */
553 assert_param(IS_DAC_ALL_PERIPH(DACx));
554 assert_param(IS_DAC_CHANNEL(DAC_Channel));
555 assert_param(IS_FUNCTIONAL_STATE(NewState));
557 if (NewState != DISABLE)
559 /* Enable the selected DAC channel DMA request */
560 DACx->CR |= (DAC_CR_DMAEN1 << DAC_Channel);
564 /* Disable the selected DAC channel DMA request */
565 DACx->CR &= (~(DAC_CR_DMAEN1 << DAC_Channel));
573 /** @defgroup DAC_Group3 Interrupts and flags management functions
574 * @brief Interrupts and flags management functions
577 ===============================================================================
578 ##### Interrupts and flags management functions #####
579 ===============================================================================
586 * @brief Enables or disables the specified DAC interrupts.
587 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
588 * @param DAC_Channel: the selected DAC channel.
589 * This parameter can be one of the following values:
590 * @arg DAC_Channel_1: DAC Channel1 selected
591 * @arg DAC_Channel_2: DAC Channel2 selected
592 * @param DAC_IT: specifies the DAC interrupt sources to be enabled or disabled.
593 * This parameter can be:
594 * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
595 * @note The DMA underrun occurs when a second external trigger arrives before
596 * the acknowledgement for the first external trigger is received (first request).
597 * @param NewState: new state of the specified DAC interrupts.
598 * This parameter can be: ENABLE or DISABLE.
601 void DAC_ITConfig(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState)
603 /* Check the parameters */
604 assert_param(IS_DAC_ALL_PERIPH(DACx));
605 assert_param(IS_DAC_CHANNEL(DAC_Channel));
606 assert_param(IS_FUNCTIONAL_STATE(NewState));
607 assert_param(IS_DAC_IT(DAC_IT));
609 if (NewState != DISABLE)
611 /* Enable the selected DAC interrupts */
612 DACx->CR |= (DAC_IT << DAC_Channel);
616 /* Disable the selected DAC interrupts */
617 DACx->CR &= (~(uint32_t)(DAC_IT << DAC_Channel));
622 * @brief Checks whether the specified DAC flag is set or not.
623 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
624 * @param DAC_Channel: thee selected DAC channel.
625 * This parameter can be one of the following values:
626 * @arg DAC_Channel_1: DAC Channel1 selected
627 * @arg DAC_Channel_2: DAC Channel2 selected
628 * @param DAC_FLAG: specifies the flag to check.
629 * This parameter can be:
630 * @arg DAC_FLAG_DMAUDR: DMA underrun flag
631 * @note The DMA underrun occurs when a second external trigger arrives before
632 * the acknowledgement for the first external trigger is received (first request).
633 * @retval The new state of DAC_FLAG (SET or RESET).
635 FlagStatus DAC_GetFlagStatus(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_FLAG)
637 FlagStatus bitstatus = RESET;
639 /* Check the parameters */
640 assert_param(IS_DAC_ALL_PERIPH(DACx));
641 assert_param(IS_DAC_CHANNEL(DAC_Channel));
642 assert_param(IS_DAC_FLAG(DAC_FLAG));
644 /* Check the status of the specified DAC flag */
645 if ((DACx->SR & (DAC_FLAG << DAC_Channel)) != (uint8_t)RESET)
647 /* DAC_FLAG is set */
652 /* DAC_FLAG is reset */
655 /* Return the DAC_FLAG status */
660 * @brief Clears the DAC channel's pending flags.
661 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
662 * @param DAC_Channel: the selected DAC channel.
663 * This parameter can be one of the following values:
664 * @arg DAC_Channel_1: DAC Channel1 selected
665 * @arg DAC_Channel_2: DAC Channel2 selected
666 * @param DAC_FLAG: specifies the flag to clear.
667 * This parameter can be:
668 * @arg DAC_FLAG_DMAUDR: DMA underrun flag
671 void DAC_ClearFlag(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_FLAG)
673 /* Check the parameters */
674 assert_param(IS_DAC_ALL_PERIPH(DACx));
675 assert_param(IS_DAC_CHANNEL(DAC_Channel));
676 assert_param(IS_DAC_FLAG(DAC_FLAG));
678 /* Clear the selected DAC flags */
679 DACx->SR = (DAC_FLAG << DAC_Channel);
683 * @brief Checks whether the specified DAC interrupt has occurred or not.
684 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
685 * @param DAC_Channel: the selected DAC channel.
686 * This parameter can be one of the following values:
687 * @arg DAC_Channel_1: DAC Channel1 selected
688 * @arg DAC_Channel_2: DAC Channel2 selected
689 * @param DAC_IT: specifies the DAC interrupt source to check.
690 * This parameter can be:
691 * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
692 * @note The DMA underrun occurs when a second external trigger arrives before
693 * the acknowledgement for the first external trigger is received (first request).
694 * @retval The new state of DAC_IT (SET or RESET).
696 ITStatus DAC_GetITStatus(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_IT)
698 ITStatus bitstatus = RESET;
699 uint32_t enablestatus = 0;
701 /* Check the parameters */
702 assert_param(IS_DAC_ALL_PERIPH(DACx));
703 assert_param(IS_DAC_CHANNEL(DAC_Channel));
704 assert_param(IS_DAC_IT(DAC_IT));
706 /* Get the DAC_IT enable bit status */
707 enablestatus = (DACx->CR & (DAC_IT << DAC_Channel)) ;
709 /* Check the status of the specified DAC interrupt */
710 if (((DACx->SR & (DAC_IT << DAC_Channel)) != (uint32_t)RESET) && enablestatus)
717 /* DAC_IT is reset */
720 /* Return the DAC_IT status */
725 * @brief Clears the DAC channel's interrupt pending bits.
726 * @param DACx: where x can be 1 or 2 to select the DAC peripheral.
727 * @param DAC_Channel: the selected DAC channel.
728 * This parameter can be one of the following values:
729 * @arg DAC_Channel_1: DAC Channel1 selected
730 * @arg DAC_Channel_2: DAC Channel2 selected
731 * @param DAC_IT: specifies the DAC interrupt pending bit to clear.
732 * This parameter can be the following values:
733 * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
736 void DAC_ClearITPendingBit(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_IT)
738 /* Check the parameters */
739 assert_param(IS_DAC_ALL_PERIPH(DACx));
740 assert_param(IS_DAC_CHANNEL(DAC_Channel));
741 assert_param(IS_DAC_IT(DAC_IT));
743 /* Clear the selected DAC interrupt pending bits */
744 DACx->SR = (DAC_IT << DAC_Channel);
763 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/