2 ******************************************************************************
3 * @file stm32f4xx_hal_dma2d.c
4 * @author MCD Application Team
7 * @brief DMA2D HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the DMA2D peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State and Errors functions
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
20 (#) Program the required configuration through following parameters:
21 the Transfer Mode, the output color mode and the output offset using
22 HAL_DMA2D_Init() function.
24 (#) Program the required configuration through following parameters:
25 the input color mode, the input color, input alpha value, alpha mode
26 and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
27 or/and background layer.
29 *** Polling mode IO operation ***
30 =================================
32 (+) Configure the pdata, Destination and data length and Enable
33 the transfer using HAL_DMA2D_Start()
34 (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
35 user can specify the value of timeout according to his end application.
37 *** Interrupt mode IO operation ***
38 ===================================
40 (#) Configure the pdata, Destination and data length and Enable
41 the transfer using HAL_DMA2D_Start_IT()
42 (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
43 (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
44 add his own function by customization of function pointer XferCpltCallback and
45 XferErrorCallback (i.e a member of DMA2D handle structure).
47 -@- In Register-to-Memory transfer mode, the pdata parameter is the register
48 color, in Memory-to-memory or memory-to-memory with pixel format
49 conversion the pdata is the source address.
51 -@- Configure the foreground source address, the background source address,
52 the Destination and data length and Enable the transfer using
53 HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
56 -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
57 are used if the memory to memory with blending transfer mode is selected.
59 (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
60 HAL_DMA2D_EnableCLUT() functions.
62 (#) Optionally, configure and enable LineInterrupt using the following function:
63 HAL_DMA2D_ProgramLineEvent().
65 (#) The transfer can be suspended, continued and aborted using the following
66 functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
68 (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
70 *** DMA2D HAL driver macros list ***
71 =============================================
73 Below the list of most used macros in DMA2D HAL driver :
75 (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
76 (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
77 (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
78 (+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
79 (+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
80 (+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
81 (+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
84 (@) You can refer to the DMA2D HAL driver header file for more useful macros
87 ******************************************************************************
90 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
92 * Redistribution and use in source and binary forms, with or without modification,
93 * are permitted provided that the following conditions are met:
94 * 1. Redistributions of source code must retain the above copyright notice,
95 * this list of conditions and the following disclaimer.
96 * 2. Redistributions in binary form must reproduce the above copyright notice,
97 * this list of conditions and the following disclaimer in the documentation
98 * and/or other materials provided with the distribution.
99 * 3. Neither the name of STMicroelectronics nor the names of its contributors
100 * may be used to endorse or promote products derived from this software
101 * without specific prior written permission.
103 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
104 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
105 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
106 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
107 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
108 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
109 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
110 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
111 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
112 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
114 ******************************************************************************
117 /* Includes ------------------------------------------------------------------*/
118 #include "stm32f4xx_hal.h"
120 /** @addtogroup STM32F4xx_HAL_Driver
124 * @brief DMA2D HAL module driver
128 #ifdef HAL_DMA2D_MODULE_ENABLED
130 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
132 /* Private typedef -----------------------------------------------------------*/
133 /* Private define ------------------------------------------------------------*/
134 #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
135 #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
136 /* Private macro -------------------------------------------------------------*/
137 /* Private variables ---------------------------------------------------------*/
138 /* Private function prototypes -----------------------------------------------*/
139 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
141 /* Private functions ---------------------------------------------------------*/
143 /** @defgroup DMA2D_Private_Functions
147 /** @defgroup DMA2D_Group1 Initialization and Configuration functions
148 * @brief Initialization and Configuration functions
151 ===============================================================================
152 ##### Initialization and Configuration functions #####
153 ===============================================================================
154 [..] This section provides functions allowing to:
155 (+) Initialize and configure the DMA2D
156 (+) De-initialize the DMA2D
163 * @brief Initializes the DMA2D according to the specified
164 * parameters in the DMA2D_InitTypeDef and create the associated handle.
165 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
166 * the configuration information for the DMA2D.
169 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
173 /* Check the DMA2D peripheral state */
174 if(hdma2d == HAL_NULL)
179 /* Check the parameters */
180 assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
181 assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
182 assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
183 assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
185 if(hdma2d->State == HAL_DMA2D_STATE_RESET)
187 /* Init the low level hardware */
188 HAL_DMA2D_MspInit(hdma2d);
191 /* Change DMA2D peripheral state */
192 hdma2d->State = HAL_DMA2D_STATE_BUSY;
194 /* DMA2D CR register configuration -------------------------------------------*/
195 /* Get the CR register value */
196 tmp = hdma2d->Instance->CR;
198 /* Clear Mode bits */
199 tmp &= (uint32_t)~DMA2D_CR_MODE;
201 /* Prepare the value to be wrote to the CR register */
202 tmp |= hdma2d->Init.Mode;
204 /* Write to DMA2D CR register */
205 hdma2d->Instance->CR = tmp;
207 /* DMA2D OPFCCR register configuration ---------------------------------------*/
208 /* Get the OPFCCR register value */
209 tmp = hdma2d->Instance->OPFCCR;
211 /* Clear Color Mode bits */
212 tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
214 /* Prepare the value to be wrote to the OPFCCR register */
215 tmp |= hdma2d->Init.ColorMode;
217 /* Write to DMA2D OPFCCR register */
218 hdma2d->Instance->OPFCCR = tmp;
220 /* DMA2D OOR register configuration ------------------------------------------*/
221 /* Get the OOR register value */
222 tmp = hdma2d->Instance->OOR;
224 /* Clear Offset bits */
225 tmp &= (uint32_t)~DMA2D_OOR_LO;
227 /* Prepare the value to be wrote to the OOR register */
228 tmp |= hdma2d->Init.OutputOffset;
230 /* Write to DMA2D OOR register */
231 hdma2d->Instance->OOR = tmp;
233 /* Update error code */
234 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
236 /* Initialize the DMA2D state*/
237 hdma2d->State = HAL_DMA2D_STATE_READY;
243 * @brief Deinitializes the DMA2D peripheral registers to their default reset
245 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
246 * the configuration information for the DMA2D.
250 HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
252 /* Check the DMA2D peripheral state */
253 if(hdma2d == HAL_NULL)
258 /* DeInit the low level hardware */
259 HAL_DMA2D_MspDeInit(hdma2d);
261 /* Update error code */
262 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
264 /* Initialize the DMA2D state*/
265 hdma2d->State = HAL_DMA2D_STATE_RESET;
268 __HAL_UNLOCK(hdma2d);
274 * @brief Initializes the DMA2D MSP.
275 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
276 * the configuration information for the DMA2D.
279 __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
281 /* NOTE : This function Should not be modified, when the callback is needed,
282 the HAL_DMA2D_MspInit could be implemented in the user file
287 * @brief DeInitializes the DMA2D MSP.
288 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
289 * the configuration information for the DMA2D.
292 __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
294 /* NOTE : This function Should not be modified, when the callback is needed,
295 the HAL_DMA2D_MspDeInit could be implemented in the user file
303 /** @defgroup DMA2D_Group2 IO operation functions
304 * @brief IO operation functions
307 ===============================================================================
308 ##### IO operation functions #####
309 ===============================================================================
310 [..] This section provides functions allowing to:
311 (+) Configure the pdata, destination address and data size and
312 Start DMA2D transfer.
313 (+) Configure the source for foreground and background, destination address
314 and data size and Start MultiBuffer DMA2D transfer.
315 (+) Configure the pdata, destination address and data size and
316 Start DMA2D transfer with interrupt.
317 (+) Configure the source for foreground and background, destination address
318 and data size and Start MultiBuffer DMA2D transfer with interrupt.
319 (+) Abort DMA2D transfer.
320 (+) Suspend DMA2D transfer.
321 (+) Continue DMA2D transfer.
322 (+) Poll for transfer complete.
323 (+) handle DMA2D interrupt request.
330 * @brief Start the DMA2D Transfer.
331 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
332 * the configuration information for the DMA2D.
333 * @param pdata: Configure the source memory Buffer address if
334 * the memory to memory or memory to memory with pixel format
335 * conversion DMA2D mode is selected, and configure
336 * the color value if register to memory DMA2D mode is selected.
337 * @param DstAddress: The destination memory Buffer address.
338 * @param Width: The width of data to be transferred from source to destination.
339 * @param Heigh: The heigh of data to be transferred from source to destination.
342 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
347 /* Change DMA2D peripheral state */
348 hdma2d->State = HAL_DMA2D_STATE_BUSY;
350 /* Check the parameters */
351 assert_param(IS_DMA2D_LINE(Heigh));
352 assert_param(IS_DMA2D_PIXEL(Width));
354 /* Disable the Peripheral */
355 __HAL_DMA2D_DISABLE(hdma2d);
357 /* Configure the source, destination address and the data size */
358 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Heigh);
360 /* Enable the Peripheral */
361 __HAL_DMA2D_ENABLE(hdma2d);
367 * @brief Start the DMA2D Transfer with interrupt enabled.
368 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
369 * the configuration information for the DMA2D.
370 * @param pdata: Configure the source memory Buffer address if
371 * the memory to memory or memory to memory with pixel format
372 * conversion DMA2D mode is selected, and configure
373 * the color value if register to memory DMA2D mode is selected.
374 * @param DstAddress: The destination memory Buffer address.
375 * @param Width: The width of data to be transferred from source to destination.
376 * @param Heigh: The heigh of data to be transferred from source to destination.
379 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
384 /* Change DMA2D peripheral state */
385 hdma2d->State = HAL_DMA2D_STATE_BUSY;
387 /* Check the parameters */
388 assert_param(IS_DMA2D_LINE(Heigh));
389 assert_param(IS_DMA2D_PIXEL(Width));
391 /* Disable the Peripheral */
392 __HAL_DMA2D_DISABLE(hdma2d);
394 /* Configure the source, destination address and the data size */
395 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Heigh);
397 /* Enable the transfer complete interrupt */
398 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
400 /* Enable the transfer Error interrupt */
401 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
403 /* Enable the Peripheral */
404 __HAL_DMA2D_ENABLE(hdma2d);
406 /* Enable the configuration error interrupt */
407 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
413 * @brief Start the multi-source DMA2D Transfer.
414 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
415 * the configuration information for the DMA2D.
416 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
417 * @param SrcAddress2: The source memory Buffer address of the background layer.
418 * @param DstAddress: The destination memory Buffer address
419 * @param Width: The width of data to be transferred from source to destination.
420 * @param Heigh: The heigh of data to be transferred from source to destination.
423 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
428 /* Change DMA2D peripheral state */
429 hdma2d->State = HAL_DMA2D_STATE_BUSY;
431 /* Check the parameters */
432 assert_param(IS_DMA2D_LINE(Heigh));
433 assert_param(IS_DMA2D_PIXEL(Width));
435 /* Disable the Peripheral */
436 __HAL_DMA2D_DISABLE(hdma2d);
438 /* Configure DMA2D Stream source2 address */
439 hdma2d->Instance->BGMAR = SrcAddress2;
441 /* Configure the source, destination address and the data size */
442 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Heigh);
444 /* Enable the Peripheral */
445 __HAL_DMA2D_ENABLE(hdma2d);
451 * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
452 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
453 * the configuration information for the DMA2D.
454 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
455 * @param SrcAddress2: The source memory Buffer address of the background layer.
456 * @param DstAddress: The destination memory Buffer address.
457 * @param Width: The width of data to be transferred from source to destination.
458 * @param Heigh: The heigh of data to be transferred from source to destination.
461 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
466 /* Change DMA2D peripheral state */
467 hdma2d->State = HAL_DMA2D_STATE_BUSY;
469 /* Check the parameters */
470 assert_param(IS_DMA2D_LINE(Heigh));
471 assert_param(IS_DMA2D_PIXEL(Width));
473 /* Disable the Peripheral */
474 __HAL_DMA2D_DISABLE(hdma2d);
476 /* Configure DMA2D Stream source2 address */
477 hdma2d->Instance->BGMAR = SrcAddress2;
479 /* Configure the source, destination address and the data size */
480 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Heigh);
482 /* Enable the configuration error interrupt */
483 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
485 /* Enable the transfer complete interrupt */
486 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
488 /* Enable the transfer Error interrupt */
489 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
491 /* Enable the Peripheral */
492 __HAL_DMA2D_ENABLE(hdma2d);
498 * @brief Abort the DMA2D Transfer.
499 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
500 * the configuration information for the DMA2D.
503 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
505 uint32_t tickstart = 0;
507 /* Disable the DMA2D */
508 __HAL_DMA2D_DISABLE(hdma2d);
511 tickstart = HAL_GetTick();
513 /* Check if the DMA2D is effectively disabled */
514 while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
516 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
518 /* Update error code */
519 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
521 /* Change the DMA2D state */
522 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
524 /* Process Unlocked */
525 __HAL_UNLOCK(hdma2d);
530 /* Process Unlocked */
531 __HAL_UNLOCK(hdma2d);
533 /* Change the DMA2D state*/
534 hdma2d->State = HAL_DMA2D_STATE_READY;
540 * @brief Suspend the DMA2D Transfer.
541 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
542 * the configuration information for the DMA2D.
545 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
547 uint32_t tickstart = 0;
549 /* Suspend the DMA2D transfer */
550 hdma2d->Instance->CR |= DMA2D_CR_SUSP;
553 tickstart = HAL_GetTick();
555 /* Check if the DMA2D is effectively suspended */
556 while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
558 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
560 /* Update error code */
561 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
563 /* Change the DMA2D state */
564 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
569 /* Change the DMA2D state*/
570 hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
576 * @brief Resume the DMA2D Transfer.
577 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
578 * the configuration information for the DMA2D.
581 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
583 /* Resume the DMA2D transfer */
584 hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
586 /* Change the DMA2D state*/
587 hdma2d->State = HAL_DMA2D_STATE_BUSY;
593 * @brief Polling for transfer complete or CLUT loading.
594 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
595 * the configuration information for the DMA2D.
596 * @param Timeout: Timeout duration
599 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
602 uint32_t tickstart = 0;
604 /* Polling for DMA2D transfer */
605 if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
608 tickstart = HAL_GetTick();
610 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
612 tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
613 tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
615 if((tmp != RESET) || (tmp1 != RESET))
617 /* Clear the transfer and configuration error flags */
618 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
619 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
621 /* Change DMA2D state */
622 hdma2d->State= HAL_DMA2D_STATE_ERROR;
624 /* Process unlocked */
625 __HAL_UNLOCK(hdma2d);
629 /* Check for the Timeout */
630 if(Timeout != HAL_MAX_DELAY)
632 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
634 /* Process unlocked */
635 __HAL_UNLOCK(hdma2d);
637 /* Update error code */
638 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
640 /* Change the DMA2D state */
641 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
648 /* Polling for CLUT loading */
649 if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
652 tickstart = HAL_GetTick();
654 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
656 if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
658 /* Clear the transfer and configuration error flags */
659 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
661 /* Change DMA2D state */
662 hdma2d->State= HAL_DMA2D_STATE_ERROR;
666 /* Check for the Timeout */
667 if(Timeout != HAL_MAX_DELAY)
669 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
671 /* Update error code */
672 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
674 /* Change the DMA2D state */
675 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
682 /* Clear the transfer complete flag */
683 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
685 /* Clear the CLUT loading flag */
686 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
688 /* Change DMA2D state */
689 hdma2d->State = HAL_DMA2D_STATE_READY;
691 /* Process unlocked */
692 __HAL_UNLOCK(hdma2d);
697 * @brief Handles DMA2D interrupt request.
698 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
699 * the configuration information for the DMA2D.
702 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
704 /* Transfer Error Interrupt management ***************************************/
705 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
707 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
709 /* Disable the transfer Error interrupt */
710 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
712 /* Update error code */
713 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
715 /* Clear the transfer error flag */
716 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
718 /* Change DMA2D state */
719 hdma2d->State = HAL_DMA2D_STATE_ERROR;
721 /* Process Unlocked */
722 __HAL_UNLOCK(hdma2d);
724 if(hdma2d->XferErrorCallback != HAL_NULL)
726 /* Transfer error Callback */
727 hdma2d->XferErrorCallback(hdma2d);
731 /* Configuration Error Interrupt management **********************************/
732 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
734 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
736 /* Disable the Configuration Error interrupt */
737 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
739 /* Clear the Configuration error flag */
740 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
742 /* Update error code */
743 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
745 /* Change DMA2D state */
746 hdma2d->State = HAL_DMA2D_STATE_ERROR;
748 /* Process Unlocked */
749 __HAL_UNLOCK(hdma2d);
751 if(hdma2d->XferErrorCallback != HAL_NULL)
753 /* Transfer error Callback */
754 hdma2d->XferErrorCallback(hdma2d);
758 /* Transfer Complete Interrupt management ************************************/
759 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
761 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
763 /* Disable the transfer complete interrupt */
764 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
766 /* Clear the transfer complete flag */
767 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
769 /* Update error code */
770 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
772 /* Change DMA2D state */
773 hdma2d->State = HAL_DMA2D_STATE_READY;
775 /* Process Unlocked */
776 __HAL_UNLOCK(hdma2d);
778 if(hdma2d->XferCpltCallback != HAL_NULL)
780 /* Transfer complete Callback */
781 hdma2d->XferCpltCallback(hdma2d);
791 /** @defgroup DMA2D_Group3 Peripheral Control functions
792 * @brief Peripheral Control functions
795 ===============================================================================
796 ##### Peripheral Control functions #####
797 ===============================================================================
798 [..] This section provides functions allowing to:
799 (+) Configure the DMA2D foreground or/and background parameters.
800 (+) Configure the DMA2D CLUT transfer.
801 (+) Enable DMA2D CLUT.
802 (+) Disable DMA2D CLUT.
803 (+) Configure the line watermark
809 * @brief Configure the DMA2D Layer according to the specified
810 * parameters in the DMA2D_InitTypeDef and create the associated handle.
811 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
812 * the configuration information for the DMA2D.
813 * @param LayerIdx: DMA2D Layer index.
814 * This parameter can be one of the following values:
815 * 0(background) / 1(foreground)
818 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
820 DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
827 /* Change DMA2D peripheral state */
828 hdma2d->State = HAL_DMA2D_STATE_BUSY;
830 /* Check the parameters */
831 assert_param(IS_DMA2D_LAYER(LayerIdx));
832 assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
833 if(hdma2d->Init.Mode != DMA2D_R2M)
835 assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
836 if(hdma2d->Init.Mode != DMA2D_M2M)
838 assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
842 /* Configure the background DMA2D layer */
845 /* DMA2D BGPFCR register configuration -----------------------------------*/
846 /* Get the BGPFCCR register value */
847 tmp = hdma2d->Instance->BGPFCCR;
849 /* Clear Input color mode, alpha value and alpha mode bits */
850 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
852 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
854 /* Prepare the value to be wrote to the BGPFCCR register */
855 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
859 /* Prepare the value to be wrote to the BGPFCCR register */
860 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
863 /* Write to DMA2D BGPFCCR register */
864 hdma2d->Instance->BGPFCCR = tmp;
866 /* DMA2D BGOR register configuration -------------------------------------*/
867 /* Get the BGOR register value */
868 tmp = hdma2d->Instance->BGOR;
870 /* Clear colors bits */
871 tmp &= (uint32_t)~DMA2D_BGOR_LO;
873 /* Prepare the value to be wrote to the BGOR register */
874 tmp |= pLayerCfg->InputOffset;
876 /* Write to DMA2D BGOR register */
877 hdma2d->Instance->BGOR = tmp;
879 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
881 /* Prepare the value to be wrote to the BGCOLR register */
882 tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
884 /* Write to DMA2D BGCOLR register */
885 hdma2d->Instance->BGCOLR = tmp;
888 /* Configure the foreground DMA2D layer */
891 /* DMA2D FGPFCR register configuration -----------------------------------*/
892 /* Get the FGPFCCR register value */
893 tmp = hdma2d->Instance->FGPFCCR;
895 /* Clear Input color mode, alpha value and alpha mode bits */
896 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
898 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
900 /* Prepare the value to be wrote to the FGPFCCR register */
901 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
905 /* Prepare the value to be wrote to the FGPFCCR register */
906 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
909 /* Write to DMA2D FGPFCCR register */
910 hdma2d->Instance->FGPFCCR = tmp;
912 /* DMA2D FGOR register configuration -------------------------------------*/
913 /* Get the FGOR register value */
914 tmp = hdma2d->Instance->FGOR;
916 /* Clear colors bits */
917 tmp &= (uint32_t)~DMA2D_FGOR_LO;
919 /* Prepare the value to be wrote to the FGOR register */
920 tmp |= pLayerCfg->InputOffset;
922 /* Write to DMA2D FGOR register */
923 hdma2d->Instance->FGOR = tmp;
925 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
927 /* Prepare the value to be wrote to the FGCOLR register */
928 tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
930 /* Write to DMA2D FGCOLR register */
931 hdma2d->Instance->FGCOLR = tmp;
934 /* Initialize the DMA2D state*/
935 hdma2d->State = HAL_DMA2D_STATE_READY;
937 /* Process unlocked */
938 __HAL_UNLOCK(hdma2d);
944 * @brief Configure the DMA2D CLUT Transfer.
945 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
946 * the configuration information for the DMA2D.
947 * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
948 * the configuration information for the color look up table.
949 * @param LayerIdx: DMA2D Layer index.
950 * This parameter can be one of the following values:
951 * 0(background) / 1(foreground)
954 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
956 uint32_t tmp = 0, tmp1 = 0;
958 /* Check the parameters */
959 assert_param(IS_DMA2D_LAYER(LayerIdx));
960 assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
961 assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
963 /* Configure the CLUT of the background DMA2D layer */
966 /* Get the BGCMAR register value */
967 tmp = hdma2d->Instance->BGCMAR;
969 /* Clear CLUT address bits */
970 tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
972 /* Prepare the value to be wrote to the BGCMAR register */
973 tmp |= (uint32_t)CLUTCfg.pCLUT;
975 /* Write to DMA2D BGCMAR register */
976 hdma2d->Instance->BGCMAR = tmp;
978 /* Get the BGPFCCR register value */
979 tmp = hdma2d->Instance->BGPFCCR;
981 /* Clear CLUT size and CLUT address bits */
982 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
984 /* Get the CLUT size */
985 tmp1 = CLUTCfg.Size << 16;
987 /* Prepare the value to be wrote to the BGPFCCR register */
988 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
990 /* Write to DMA2D BGPFCCR register */
991 hdma2d->Instance->BGPFCCR = tmp;
993 /* Configure the CLUT of the foreground DMA2D layer */
996 /* Get the FGCMAR register value */
997 tmp = hdma2d->Instance->FGCMAR;
999 /* Clear CLUT address bits */
1000 tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
1002 /* Prepare the value to be wrote to the FGCMAR register */
1003 tmp |= (uint32_t)CLUTCfg.pCLUT;
1005 /* Write to DMA2D FGCMAR register */
1006 hdma2d->Instance->FGCMAR = tmp;
1008 /* Get the FGPFCCR register value */
1009 tmp = hdma2d->Instance->FGPFCCR;
1011 /* Clear CLUT size and CLUT address bits */
1012 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
1014 /* Get the CLUT size */
1015 tmp1 = CLUTCfg.Size << 8;
1017 /* Prepare the value to be wrote to the FGPFCCR register */
1018 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
1020 /* Write to DMA2D FGPFCCR register */
1021 hdma2d->Instance->FGPFCCR = tmp;
1028 * @brief Enable the DMA2D CLUT Transfer.
1029 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1030 * the configuration information for the DMA2D.
1031 * @param LayerIdx: DMA2D Layer index.
1032 * This parameter can be one of the following values:
1033 * 0(background) / 1(foreground)
1034 * @retval HAL status
1036 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
1038 /* Check the parameters */
1039 assert_param(IS_DMA2D_LAYER(LayerIdx));
1043 /* Enable the CLUT loading for the background */
1044 hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
1048 /* Enable the CLUT loading for the foreground */
1049 hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
1056 * @brief Disable the DMA2D CLUT Transfer.
1057 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1058 * the configuration information for the DMA2D.
1059 * @param LayerIdx: DMA2D Layer index.
1060 * This parameter can be one of the following values:
1061 * 0(background) / 1(foreground)
1062 * @retval HAL status
1064 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
1066 /* Check the parameters */
1067 assert_param(IS_DMA2D_LAYER(LayerIdx));
1071 /* Disable the CLUT loading for the background */
1072 hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
1076 /* Disable the CLUT loading for the foreground */
1077 hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
1084 * @brief Define the configuration of the line watermark .
1085 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1086 * the configuration information for the DMA2D.
1087 * @param Line: Line Watermark configuration.
1088 * @retval HAL status
1091 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
1093 /* Process locked */
1096 /* Change DMA2D peripheral state */
1097 hdma2d->State = HAL_DMA2D_STATE_BUSY;
1099 /* Check the parameters */
1100 assert_param(IS_DMA2D_LineWatermark(Line));
1102 /* Sets the Line watermark configuration */
1103 DMA2D->LWR = (uint32_t)Line;
1105 /* Initialize the DMA2D state*/
1106 hdma2d->State = HAL_DMA2D_STATE_READY;
1108 /* Process unlocked */
1109 __HAL_UNLOCK(hdma2d);
1118 /** @defgroup DMA2D_Group4 Peripheral State functions
1119 * @brief Peripheral State functions
1122 ===============================================================================
1123 ##### Peripheral State and Errors functions #####
1124 ===============================================================================
1126 This subsection provides functions allowing to :
1127 (+) Check the DMA2D state
1135 * @brief Return the DMA2D state
1136 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1137 * the configuration information for the DMA2D.
1140 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
1142 return hdma2d->State;
1146 * @brief Return the DMA2D error code
1147 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
1148 * the configuration information for DMA2D.
1149 * @retval DMA2D Error Code
1151 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
1153 return hdma2d->ErrorCode;
1162 * @brief Set the DMA2D Transfer parameter.
1163 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1164 * the configuration information for the specified DMA2D.
1165 * @param pdata: The source memory Buffer address
1166 * @param DstAddress: The destination memory Buffer address
1167 * @param Width: The width of data to be transferred from source to destination.
1168 * @param Heigh: The heigh of data to be transferred from source to destination.
1169 * @retval HAL status
1171 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
1181 /* Configure DMA2D data size */
1182 hdma2d->Instance->NLR = (Heigh | tmp);
1184 /* Configure DMA2D destination address */
1185 hdma2d->Instance->OMAR = DstAddress;
1187 /* Register to memory DMA2D mode selected */
1188 if (hdma2d->Init.Mode == DMA2D_R2M)
1190 tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
1191 tmp2 = pdata & DMA2D_OCOLR_RED_1;
1192 tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
1193 tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
1195 /* Prepare the value to be wrote to the OCOLR register according to the color mode */
1196 if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
1198 tmp = (tmp3 | tmp2 | tmp1| tmp4);
1200 else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
1202 tmp = (tmp3 | tmp2 | tmp4);
1204 else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
1206 tmp2 = (tmp2 >> 19);
1207 tmp3 = (tmp3 >> 10);
1208 tmp4 = (tmp4 >> 3 );
1209 tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
1211 else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
1213 tmp1 = (tmp1 >> 31);
1214 tmp2 = (tmp2 >> 19);
1215 tmp3 = (tmp3 >> 11);
1216 tmp4 = (tmp4 >> 3 );
1217 tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
1219 else /* DMA2D_CMode = DMA2D_ARGB4444 */
1221 tmp1 = (tmp1 >> 28);
1222 tmp2 = (tmp2 >> 20);
1223 tmp3 = (tmp3 >> 12);
1224 tmp4 = (tmp4 >> 4 );
1225 tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
1227 /* Write to DMA2D OCOLR register */
1228 hdma2d->Instance->OCOLR = tmp;
1230 else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
1232 /* Configure DMA2D source address */
1233 hdma2d->Instance->FGMAR = pdata;
1240 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
1241 #endif /* HAL_DMA2D_MODULE_ENABLED */
1250 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/