2 ******************************************************************************
3 * @file stm32f4xx_hal_dma2d.h
4 * @author MCD Application Team
7 * @brief Header file of DMA2D HAL module.
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
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18 * this list of conditions and the following disclaimer in the documentation
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_DMA2D_H
40 #define __STM32F4xx_HAL_DMA2D_H
46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
47 /* Includes ------------------------------------------------------------------*/
48 #include "stm32f4xx_hal_def.h"
50 /** @addtogroup STM32F4xx_HAL_Driver
58 /* Exported types ------------------------------------------------------------*/
60 #define MAX_DMA2D_LAYER 2
63 * @brief DMA2D color Structure definition
67 uint32_t Blue; /*!< Configures the blue value.
68 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
70 uint32_t Green; /*!< Configures the green value.
71 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
73 uint32_t Red; /*!< Configures the red value.
74 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
78 * @brief DMA2D CLUT Structure definition
82 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
84 uint32_t CLUTColorMode; /*!< configures the DMA2D CLUT color mode.
85 This parameter can be one value of @ref DMA2D_CLUT_CM */
87 uint32_t Size; /*!< configures the DMA2D CLUT size.
88 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
89 } DMA2D_CLUTCfgTypeDef;
92 * @brief DMA2D Init structure definition
96 uint32_t Mode; /*!< configures the DMA2D transfer mode.
97 This parameter can be one value of @ref DMA2D_Mode */
99 uint32_t ColorMode; /*!< configures the color format of the output image.
100 This parameter can be one value of @ref DMA2D_Color_Mode */
102 uint32_t OutputOffset; /*!< Specifies the Offset value.
103 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
107 * @brief DMA2D Layer structure definition
111 uint32_t InputOffset; /*!< configures the DMA2D foreground offset.
112 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
114 uint32_t InputColorMode; /*!< configures the DMA2D foreground color mode .
115 This parameter can be one value of @ref DMA2D_Input_Color_Mode */
117 uint32_t AlphaMode; /*!< configures the DMA2D foreground alpha mode.
118 This parameter can be one value of @ref DMA2D_ALPHA_MODE */
120 uint32_t InputAlpha; /*!< Specifies the DMA2D foreground alpha value and color value in case of A8 or A4 color mode.
121 This parameter must be a number between Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF
122 in case of A8 or A4 color mode (ARGB).
123 Otherwise, This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
125 } DMA2D_LayerCfgTypeDef;
128 * @brief HAL DMA2D State structures definition
132 HAL_DMA2D_STATE_RESET = 0x00, /*!< DMA2D not yet initialized or disabled */
133 HAL_DMA2D_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
134 HAL_DMA2D_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
135 HAL_DMA2D_STATE_TIMEOUT = 0x03, /*!< Timeout state */
136 HAL_DMA2D_STATE_ERROR = 0x04, /*!< DMA2D state error */
137 HAL_DMA2D_STATE_SUSPEND = 0x05 /*!< DMA2D process is suspended */
138 }HAL_DMA2D_StateTypeDef;
141 * @brief DMA2D handle Structure definition
143 typedef struct __DMA2D_HandleTypeDef
145 DMA2D_TypeDef *Instance; /*!< DMA2D Register base address */
147 DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters */
149 void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback */
151 void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback */
153 DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
155 HAL_LockTypeDef Lock; /*!< DMA2D Lock */
157 __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state */
159 __IO uint32_t ErrorCode; /*!< DMA2D Error code */
160 } DMA2D_HandleTypeDef;
163 /* Exported constants --------------------------------------------------------*/
165 /** @defgroup DMA2D_Exported_Constants
169 /** @defgroup DMA2D_Layer
172 #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
177 /** @defgroup DMA2D_Error_Code
180 #define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
181 #define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
182 #define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002) /*!< Configuration error */
183 #define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
188 /** @defgroup DMA2D_Mode
191 #define DMA2D_M2M ((uint32_t)0x00000000) /*!< DMA2D memory to memory transfer mode */
192 #define DMA2D_M2M_PFC ((uint32_t)0x00010000) /*!< DMA2D memory to memory with pixel format conversion transfer mode */
193 #define DMA2D_M2M_BLEND ((uint32_t)0x00020000) /*!< DMA2D memory to memory with blending transfer mode */
194 #define DMA2D_R2M ((uint32_t)0x00030000) /*!< DMA2D register to memory transfer mode */
196 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
197 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
202 /** @defgroup DMA2D_Color_Mode
205 #define DMA2D_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D color mode */
206 #define DMA2D_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D color mode */
207 #define DMA2D_RGB565 ((uint32_t)0x00000002) /*!< RGB565 DMA2D color mode */
208 #define DMA2D_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 DMA2D color mode */
209 #define DMA2D_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 DMA2D color mode */
211 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
212 ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
213 ((MODE_ARGB) == DMA2D_ARGB4444))
218 /** @defgroup DMA2D_COLOR_VALUE
222 #define COLOR_VALUE ((uint32_t)0x000000FF) /*!< color value mask */
224 #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= COLOR_VALUE)
229 /** @defgroup DMA2D_SIZE
232 #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16) /*!< DMA2D pixel per line */
233 #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of line */
235 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
236 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
241 /** @defgroup DMA2D_Offset
244 #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
246 #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
251 /** @defgroup DMA2D_Input_Color_Mode
254 #define CM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 color mode */
255 #define CM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 color mode */
256 #define CM_RGB565 ((uint32_t)0x00000002) /*!< RGB565 color mode */
257 #define CM_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 color mode */
258 #define CM_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 color mode */
259 #define CM_L8 ((uint32_t)0x00000005) /*!< L8 color mode */
260 #define CM_AL44 ((uint32_t)0x00000006) /*!< AL44 color mode */
261 #define CM_AL88 ((uint32_t)0x00000007) /*!< AL88 color mode */
262 #define CM_L4 ((uint32_t)0x00000008) /*!< L4 color mode */
263 #define CM_A8 ((uint32_t)0x00000009) /*!< A8 color mode */
264 #define CM_A4 ((uint32_t)0x0000000A) /*!< A4 color mode */
266 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == CM_ARGB8888) || ((INPUT_CM) == CM_RGB888) || \
267 ((INPUT_CM) == CM_RGB565) || ((INPUT_CM) == CM_ARGB1555) || \
268 ((INPUT_CM) == CM_ARGB4444) || ((INPUT_CM) == CM_L8) || \
269 ((INPUT_CM) == CM_AL44) || ((INPUT_CM) == CM_AL88) || \
270 ((INPUT_CM) == CM_L4) || ((INPUT_CM) == CM_A8) || \
271 ((INPUT_CM) == CM_A4))
276 /** @defgroup DMA2D_ALPHA_MODE
279 #define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000) /*!< No modification of the alpha channel value */
280 #define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001) /*!< Replace original alpha channel value by programmed alpha value */
281 #define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002) /*!< Replace original alpha channel value by programmed alpha value
282 with original alpha channel value */
284 #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
285 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
286 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
291 /** @defgroup DMA2D_CLUT_CM
294 #define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D C-LUT color mode */
295 #define DMA2D_CCM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D C-LUT color mode */
297 #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
302 /** @defgroup DMA2D_Size_Clut
305 #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /*!< DMA2D C-LUT size */
307 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
312 /** @defgroup DMA2D_DeadTime
315 #define LINE_WATERMARK DMA2D_LWR_LW
317 #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
322 /** @defgroup DMA2D_Interrupts
325 #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
326 #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< C-LUT Transfer Complete Interrupt */
327 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< C-LUT Access Error Interrupt */
328 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
329 #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
330 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
332 #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
333 ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
334 ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
339 /** @defgroup DMA2D_Flag
342 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
343 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< C-LUT Transfer Complete Interrupt Flag */
344 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< C-LUT Access Error Interrupt Flag */
345 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
346 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
347 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
349 #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
350 ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
351 ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
359 /* Exported macro ------------------------------------------------------------*/
361 /** @brief Reset DMA2D handle state
362 * @param __HANDLE__: specifies the DMA2D handle.
365 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
368 * @brief Enable the DMA2D.
369 * @param __HANDLE__: DMA2D handle
372 #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
375 * @brief Disable the DMA2D.
376 * @param __HANDLE__: DMA2D handle
379 #define __HAL_DMA2D_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA2D_CR_START)
381 /* Interrupt & Flag management */
383 * @brief Get the DMA2D pending flags.
384 * @param __HANDLE__: DMA2D handle
385 * @param __FLAG__: Get the specified flag.
386 * This parameter can be any combination of the following values:
387 * @arg DMA2D_FLAG_CE: Configuration error flag
388 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
389 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
390 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
391 * @arg DMA2D_FLAG_TC: Transfer complete flag
392 * @arg DMA2D_FLAG_TE: Transfer error flag
393 * @retval The state of FLAG.
395 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
398 * @brief Clears the DMA2D pending flags.
399 * @param __HANDLE__: DMA2D handle
400 * @param __FLAG__: specifies the flag to clear.
401 * This parameter can be any combination of the following values:
402 * @arg DMA2D_FLAG_CE: Configuration error flag
403 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
404 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
405 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
406 * @arg DMA2D_FLAG_TC: Transfer complete flag
407 * @arg DMA2D_FLAG_TE: Transfer error flag
410 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
413 * @brief Enables the specified DMA2D interrupts.
414 * @param __HANDLE__: DMA2D handle
415 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
416 * This parameter can be any combination of the following values:
417 * @arg DMA2D_IT_CE: Configuration error interrupt mask
418 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
419 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
420 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
421 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
422 * @arg DMA2D_IT_TE: Transfer error interrupt mask
425 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
428 * @brief Disables the specified DMA2D interrupts.
429 * @param __HANDLE__: DMA2D handle
430 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
431 * This parameter can be any combination of the following values:
432 * @arg DMA2D_IT_CE: Configuration error interrupt mask
433 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
434 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
435 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
436 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
437 * @arg DMA2D_IT_TE: Transfer error interrupt mask
440 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
443 * @brief Checks whether the specified DMA2D interrupt has occurred or not.
444 * @param __HANDLE__: DMA2D handle
445 * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
446 * This parameter can be one of the following values:
447 * @arg DMA2D_IT_CE: Configuration error interrupt mask
448 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
449 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
450 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
451 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
452 * @arg DMA2D_IT_TE: Transfer error interrupt mask
453 * @retval The state of INTERRUPT.
455 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
457 /* Exported functions --------------------------------------------------------*/
459 /* Initialization and de-initialization functions *******************************/
460 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
461 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
462 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
463 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
465 /* IO operation functions *******************************************************/
466 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
467 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
468 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
469 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
470 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
471 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
472 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
473 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
474 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
476 /* Peripheral Control functions *************************************************/
477 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
478 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
479 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
480 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
481 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
483 /* Peripheral State functions ***************************************************/
484 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
485 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
487 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
501 #endif /* __STM32F4xx_HAL_DMA2D_H */
504 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/