2 ******************************************************************************
3 * @file stm32f4xx_ll_sdmmc.c
4 * @author MCD Application Team
7 * @brief SDMMC Low Layer HAL module driver.
9 * This file provides firmware functions to manage the following
10 * functionalities of the SDMMC peripheral:
11 * + Initialization/de-initialization functions
12 * + I/O operation functions
13 * + Peripheral Control functions
14 * + Peripheral State functions
17 ==============================================================================
18 ##### SDMMC peripheral features #####
19 ==============================================================================
20 [..] The SD/SDIO MMC card host interface (SDIO) provides an interface between the APB2
21 peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDIO cards and CE-ATA
24 [..] The MultiMedia Card system specifications are available through the MultiMedia Card
25 Association website at www.mmca.org, published by the MMCA technical committee.
26 SD memory card and SD I/O card system specifications are available through the SD card
27 Association website at www.sdcard.org.
28 CE-ATA system specifications are available through the CE-ATA work group web site at
31 [..] The SDIO features include the following:
32 (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
33 for three different databus modes: 1-bit (default), 4-bit and 8-bit
34 (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
35 (+) Full compliance with SD Memory Card Specifications Version 2.0
36 (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
37 different data bus modes: 1-bit (default) and 4-bit
38 (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
40 (+) Data transfer up to 48 MHz for the 8 bit mode
41 (+) Data and command output enable signals to control external bidirectional drivers.
44 ##### How to use this driver #####
45 ==============================================================================
47 This driver is a considered as a driver of service for external devices drivers
48 that interfaces with the SDIO peripheral.
49 According to the device used (SD card/ MMC card / SDIO card ...), a set of APIs
50 is used in the device's driver to perform SDIO operations and functionalities.
52 This driver is almost transparent for the final user, it is only used to implement other
53 functionalities of the external device.
56 (+) The SDIO clock (SDIOCLK = 48 MHz) is coming from a specific output of PLL
57 (PLL48CLK). Before start working with SDIO peripheral make sure that the
58 PLL is well configured.
59 The SDIO peripheral uses two clock signals:
60 (++) SDIO adapter clock (SDIOCLK = 48 MHz)
61 (++) APB2 bus clock (PCLK2)
63 -@@- PCLK2 and SDIO_CK clock frequencies must respect the following condition:
64 Frequency(PCLK2) >= (3 / 8 x Frequency(SDIO_CK))
66 (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDIO
69 (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx)
70 function and disable it using the function HAL_SDIO_PowerState_OFF(SDIOx).
72 (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
74 (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hsdio, IT)
75 and __SDIO_DISABLE_IT(hsdio, IT) if you need to use interrupt mode.
77 (+) When using the DMA mode
78 (++) Configure the DMA in the MSP layer of the external device
79 (++) Active the needed channel Request
80 (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
83 (+) To control the CPSM (Command Path State Machine) and send
84 commands to the card use the SDIO_SendCommand(SDIOx),
85 SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
86 to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
87 to the selected command to be sent.
88 The parameters that should be filled are:
91 (++) Command Response type
93 (++) CPSM Status (Enable or Disable).
95 -@@- To check if the command is well received, read the SDIO_CMDRESP
96 register using the SDIO_GetCommandResponse().
97 The SDIO responses registers (SDIO_RESP1 to SDIO_RESP2), use the
98 SDIO_GetResponse() function.
100 (+) To control the DPSM (Data Path State Machine) and send/receive
101 data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(),
102 SDIO_ReadFIFO(), DIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
104 *** Read Operations ***
105 =======================
107 (#) First, user has to fill the data structure (pointer to
108 SDIO_DataInitTypeDef) according to the selected data type to be received.
109 The parameters that should be filled are:
113 (++) Data Transfer direction: should be from card (To SDIO)
114 (++) Data Transfer mode
115 (++) DPSM Status (Enable or Disable)
117 (#) Configure the SDIO resources to receive the data from the card
118 according to selected transfer mode (Refer to Step 8, 9 and 10).
120 (#) Send the selected Read command (refer to step 11).
122 (#) Use the SDIO flags/interrupts to check the transfer status.
124 *** Write Operations ***
125 ========================
127 (#) First, user has to fill the data structure (pointer to
128 SDIO_DataInitTypeDef) according to the selected data type to be received.
129 The parameters that should be filled are:
133 (++) Data Transfer direction: should be to card (To CARD)
134 (++) Data Transfer mode
135 (++) DPSM Status (Enable or Disable)
137 (#) Configure the SDIO resources to send the data to the card according to
138 selected transfer mode.
140 (#) Send the selected Write command.
142 (#) Use the SDIO flags/interrupts to check the transfer status.
145 ******************************************************************************
148 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
150 * Redistribution and use in source and binary forms, with or without modification,
151 * are permitted provided that the following conditions are met:
152 * 1. Redistributions of source code must retain the above copyright notice,
153 * this list of conditions and the following disclaimer.
154 * 2. Redistributions in binary form must reproduce the above copyright notice,
155 * this list of conditions and the following disclaimer in the documentation
156 * and/or other materials provided with the distribution.
157 * 3. Neither the name of STMicroelectronics nor the names of its contributors
158 * may be used to endorse or promote products derived from this software
159 * without specific prior written permission.
161 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
162 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
163 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
164 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
165 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
166 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
167 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
168 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
169 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
170 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
172 ******************************************************************************
175 /* Includes ------------------------------------------------------------------*/
176 #include "stm32f4xx_hal.h"
178 /** @addtogroup STM32F4xx_HAL_Driver
183 * @brief SDMMC HAL module driver
187 #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
189 /* Private typedef -----------------------------------------------------------*/
190 /* Private define ------------------------------------------------------------*/
191 /* Private macro -------------------------------------------------------------*/
192 /* Private variables ---------------------------------------------------------*/
193 /* Private function prototypes -----------------------------------------------*/
194 /* Private functions ---------------------------------------------------------*/
196 /** @defgroup SDIO_Private_Functions
200 /** @defgroup HAL_SDIO_Group1 Initialization/de-initialization functions
201 * @brief Initialization and Configuration functions
204 ===============================================================================
205 ##### Initialization/de-initialization functions #####
206 ===============================================================================
207 [..] This section provides functions allowing to:
214 * @brief Initializes the SDIO according to the specified
215 * parameters in the SDIO_InitTypeDef and create the associated handle.
216 * @param SDIOx: Pointer to SDIO register base
217 * @param Init: SDIO initialization structure
220 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
224 /* Check the parameters */
225 assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
226 assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
227 assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
228 assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
229 assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
230 assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
231 assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
233 /* Set SDIO configuration parameters */
234 tmpreg |= (Init.ClockEdge |\
236 Init.ClockPowerSave |\
238 Init.HardwareFlowControl |\
242 /* Write to SDIO CLKCR */
243 MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
254 /** @defgroup HAL_SDIO_Group2 I/O operation functions
255 * @brief Data transfers functions
258 ===============================================================================
259 ##### I/O operation functions #####
260 ===============================================================================
262 This subsection provides a set of functions allowing to manage the SDIO data
270 * @brief Read data (word) from Rx FIFO in blocking mode (polling)
271 * @param SDIOx: Pointer to SDIO register base
274 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
276 /* Read data from Rx FIFO */
277 return (SDIOx->FIFO);
281 * @brief Write data (word) to Tx FIFO in blocking mode (polling)
282 * @param SDIOx: Pointer to SDIO register base
283 * @param pWriteData: pointer to data to write
286 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
288 /* Write data to FIFO */
289 SDIOx->FIFO = *pWriteData;
298 /** @defgroup HAL_SDIO_Group3 Peripheral Control functions
299 * @brief management functions
302 ===============================================================================
303 ##### Peripheral Control functions #####
304 ===============================================================================
306 This subsection provides a set of functions allowing to control the SDIO data
314 * @brief Set SDIO Power state to ON.
315 * @param SDIOx: Pointer to SDIO register base
318 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
320 /* Set power state to ON */
321 SDIOx->POWER = SDIO_POWER_PWRCTRL;
327 * @brief Set SDIO Power state to OFF.
328 * @param SDIOx: Pointer to SDIO register base
331 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
333 /* Set power state to OFF */
334 SDIOx->POWER = (uint32_t)0x00000000;
340 * @brief Get SDIO Power state.
341 * @param SDIOx: Pointer to SDIO register base
342 * @retval Power status of the controller. The returned value can be one of the
348 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
350 return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
354 * @brief Configure the SDIO command path according to the specified parameters in
355 * SDIO_CmdInitTypeDef structure and send the command
356 * @param SDIOx: Pointer to SDIO register base
357 * @param SDIO_CmdInitStruct: pointer to a SDIO_CmdInitTypeDef structure that contains
358 * the configuration information for the SDIO command
361 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
365 /* Check the parameters */
366 assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->CmdIndex));
367 assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->Response));
368 assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->WaitForInterrupt));
369 assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->CPSM));
371 /* Set the SDIO Argument value */
372 SDIOx->ARG = SDIO_CmdInitStruct->Argument;
374 /* Set SDIO command parameters */
375 tmpreg |= (uint32_t)(SDIO_CmdInitStruct->CmdIndex |\
376 SDIO_CmdInitStruct->Response |\
377 SDIO_CmdInitStruct->WaitForInterrupt |\
378 SDIO_CmdInitStruct->CPSM);
380 /* Write to SDIO CMD register */
381 MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
387 * @brief Return the command index of last command for which response received
388 * @param SDIOx: Pointer to SDIO register base
389 * @retval Command index of the last command response received
391 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
393 return (uint8_t)(SDIOx->RESPCMD);
398 * @brief Return the response received from the card for the last command
399 * @param SDIO_RESP: Specifies the SDIO response register.
400 * This parameter can be one of the following values:
401 * @arg SDIO_RESP1: Response Register 1
402 * @arg SDIO_RESP2: Response Register 2
403 * @arg SDIO_RESP3: Response Register 3
404 * @arg SDIO_RESP4: Response Register 4
405 * @retval The Corresponding response register value
407 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
409 __IO uint32_t tmp = 0;
411 /* Check the parameters */
412 assert_param(IS_SDIO_RESP(SDIO_RESP));
414 /* Get the response */
415 tmp = SDIO_RESP_ADDR + SDIO_RESP;
417 return (*(__IO uint32_t *) tmp);
421 * @brief Configure the SDIO data path according to the specified
422 * parameters in the SDIO_DataInitTypeDef.
423 * @param SDIOx: Pointer to SDIO register base
424 * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure
425 * that contains the configuration information for the SDIO command.
428 HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct)
432 /* Check the parameters */
433 assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->DataLength));
434 assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->DataBlockSize));
435 assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->TransferDir));
436 assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->TransferMode));
437 assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->DPSM));
439 /* Set the SDIO Data TimeOut value */
440 SDIOx->DTIMER = SDIO_DataInitStruct->DataTimeOut;
442 /* Set the SDIO DataLength value */
443 SDIOx->DLEN = SDIO_DataInitStruct->DataLength;
445 /* Set the SDIO data configuration parameters */
446 tmpreg |= (uint32_t)(SDIO_DataInitStruct->DataBlockSize |\
447 SDIO_DataInitStruct->TransferDir |\
448 SDIO_DataInitStruct->TransferMode |\
449 SDIO_DataInitStruct->DPSM);
451 /* Write to SDIO DCTRL */
452 MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
459 * @brief Returns number of remaining data bytes to be transferred.
460 * @param SDIOx: Pointer to SDIO register base
461 * @retval Number of remaining data bytes to be transferred
463 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
465 return (SDIOx->DCOUNT);
469 * @brief Get the FIFO data
470 * @param SDIOx: Pointer to SDIO register base
471 * @retval Data received
473 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
475 return (SDIOx->FIFO);
480 * @brief Sets one of the two options of inserting read wait interval.
481 * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode.
482 * This parameter can be:
483 * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDIOCLK
484 * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDIO_DATA2
487 HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
489 /* Check the parameters */
490 assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
492 *(__IO uint32_t *)DCTRL_RWMOD_BB = SDIO_ReadWaitMode;
505 #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
514 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/