2 ******************************************************************************
3 * @file stm32l0xx_hal_cryp.c
4 * @author MCD Application Team
6 * @date 06-February-2015
7 * @brief CRYP HAL module driver.
9 * This file provides firmware functions to manage the following
10 * functionalities of the Cryptography (CRYP) peripheral:
11 * + Initialization and de-initialization functions
12 * + Processing functions by algorithm using polling mode
13 * + Processing functions by algorithm using interrupt mode
14 * + Processing functions by algorithm using DMA mode
15 * + Peripheral State functions
18 ==============================================================================
19 ##### How to use this driver #####
20 ==============================================================================
22 The CRYP HAL driver can be used as follows:
24 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
25 (##) Enable the CRYP interface clock using __HAL_RCC_AES_CLK_ENABLE()
26 (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
27 (+) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
28 (+) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
29 (+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
30 (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
31 (+) Enable the DMA1 interface clock using
32 (++) __HAL_RCC_DMA1_CLK_ENABLE()
33 (+) Configure and enable two DMA Channels one for managing data transfer from
34 memory to peripheral (input channel) and another channel for managing data
35 transfer from peripheral to memory (output channel)
36 (+) Associate the initialized DMA handle to the CRYP DMA handle
38 (+) Configure the priority and enable the NVIC for the transfer complete
39 interrupt on the two DMA Streams. The output stream should have higher
40 priority than the input stream.
41 (++) HAL_NVIC_SetPriority()
42 (++) HAL_NVIC_EnableIRQ()
44 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
45 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
46 (##) The encryption/decryption key.
47 (##) The initialization vector (counter). It is not used ECB mode.
49 (#)Three processing (encryption/decryption) functions are available:
50 (##) Polling mode: encryption and decryption APIs are blocking functions
51 i.e. they process the data and wait till the processing is finished
52 e.g. HAL_CRYP_AESCBC_Encrypt()
53 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
54 i.e. they process the data under interrupt
55 e.g. HAL_CRYP_AESCBC_Encrypt_IT()
56 (##) DMA mode: encryption and decryption APIs are not blocking functions
57 i.e. the data transfer is ensured by DMA
58 e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
60 (#)When the processing function is called for the first time after HAL_CRYP_Init()
61 the CRYP peripheral is initialized and processes the buffer in input.
62 At second call, the processing function performs an append of the already
64 When a new data block is to be processed, call HAL_CRYP_Init() then the
67 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
70 ******************************************************************************
73 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
75 * Redistribution and use in source and binary forms, with or without modification,
76 * are permitted provided that the following conditions are met:
77 * 1. Redistributions of source code must retain the above copyright notice,
78 * this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce the above copyright notice,
80 * this list of conditions and the following disclaimer in the documentation
81 * and/or other materials provided with the distribution.
82 * 3. Neither the name of STMicroelectronics nor the names of its contributors
83 * may be used to endorse or promote products derived from this software
84 * without specific prior written permission.
86 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
87 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
88 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
90 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
91 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
93 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
94 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
95 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
97 ******************************************************************************
100 #if defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
101 /* Includes ------------------------------------------------------------------*/
102 #include "stm32l0xx_hal.h"
104 #ifdef HAL_CRYP_MODULE_ENABLED
105 /** @addtogroup STM32L0xx_HAL_Driver
109 /** @defgroup CRYP CRYP
110 * @brief CRYP HAL module driver.
115 /* Private typedef -----------------------------------------------------------*/
116 /* Private define ------------------------------------------------------------*/
118 /** @defgroup CRYP_Private_Defines CRYP Private Defines
122 #define CRYP_ALGO_CHAIN_MASK (AES_CR_MODE | AES_CR_CHMOD)
128 /* Private macro -------------------------------------------------------------*/
129 /* Private variables ---------------------------------------------------------*/
130 /* Private function prototypes -----------------------------------------------*/
132 /** @defgroup CRYP_Private_Functions CRYP Private Functions
136 static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp);
137 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector);
138 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key);
139 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
140 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
141 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
142 static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
143 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
149 /* Private functions ---------------------------------------------------------*/
151 /** @defgroup CRYP_Exported_Functions CRYP Exported Functions
155 /** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
156 * @brief Initialization and Configuration functions.
159 ==============================================================================
160 ##### Initialization and de-initialization functions #####
161 ==============================================================================
162 [..] This section provides functions allowing to:
163 (+) Initialize the CRYP according to the specified parameters
164 in the CRYP_InitTypeDef and creates the associated handle
165 (+) DeInitialize the CRYP peripheral
166 (+) Initialize the CRYP MSP
167 (+) DeInitialize CRYP MSP
174 * @brief Initializes the CRYP according to the specified
175 * parameters in the CRYP_InitTypeDef and creates the associated handle.
176 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
177 * the configuration information for CRYP module
180 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
182 /* Check the CRYP handle allocation */
188 /* Check the parameters */
189 assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance));
190 assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
192 if(hcryp->State == HAL_CRYP_STATE_RESET)
194 /* Allocate lock resource and initialize it */
195 hcryp->Lock = HAL_UNLOCKED;
197 /* Init the low level hardware */
198 HAL_CRYP_MspInit(hcryp);
201 /* Check if AES already enabled */
202 if (HAL_IS_BIT_CLR(hcryp->Instance->CR, AES_CR_EN))
204 /* Change the CRYP state */
205 hcryp->State = HAL_CRYP_STATE_BUSY;
207 /* Set the data type*/
208 MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE, hcryp->Init.DataType);
210 /* Reset CrypInCount and CrypOutCount */
211 hcryp->CrypInCount = 0;
212 hcryp->CrypOutCount = 0;
214 /* Change the CRYP state */
215 hcryp->State = HAL_CRYP_STATE_READY;
217 /* Set the default CRYP phase */
218 hcryp->Phase = HAL_CRYP_PHASE_READY;
220 /* Return function status */
225 /* The Datatype selection must be changed if the AES is disabled. Writing these bits while the AES is */
226 /* enabled is forbidden to avoid unpredictable AES behavior.*/
228 /* Return function status */
235 * @brief DeInitializes the CRYP peripheral.
236 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
237 * the configuration information for CRYP module
240 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
242 /* Check the CRYP handle allocation */
248 /* Change the CRYP state */
249 hcryp->State = HAL_CRYP_STATE_BUSY;
251 /* Set the default CRYP phase */
252 hcryp->Phase = HAL_CRYP_PHASE_READY;
254 /* Reset CrypInCount and CrypOutCount */
255 hcryp->CrypInCount = 0;
256 hcryp->CrypOutCount = 0;
258 /* Disable the CRYP Peripheral Clock */
259 __HAL_CRYP_DISABLE(hcryp);
261 /* DeInit the low level hardware: CLOCK, NVIC.*/
262 HAL_CRYP_MspDeInit(hcryp);
264 /* Change the CRYP state */
265 hcryp->State = HAL_CRYP_STATE_RESET;
270 /* Return function status */
275 * @brief Initializes the CRYP MSP.
276 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
277 * the configuration information for CRYP module
280 __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
282 /* NOTE : This function should not be modified; when the callback is needed,
283 the HAL_CRYP_MspInit can be implemented in the user file */
287 * @brief DeInitializes CRYP MSP.
288 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
289 * the configuration information for CRYP module
292 __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
294 /* NOTE : This function should not be modified; when the callback is needed,
295 the HAL_CRYP_MspDeInit can be implemented in the user file */
302 /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
303 * @brief processing functions.
306 ==============================================================================
307 ##### AES processing functions #####
308 ==============================================================================
309 [..] This section provides functions allowing to:
310 (+) Encrypt plaintext using AES algorithm in different chaining modes
311 (+) Decrypt cyphertext using AES algorithm in different chaining modes
312 [..] Three processing functions are available:
322 * @brief Initializes the CRYP peripheral in AES ECB encryption mode
323 * then encrypt pPlainData. The cypher data are available in pCypherData
324 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
325 * the configuration information for CRYP module
326 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
327 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
328 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
329 * @param Timeout: Specify Timeout value
332 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
337 /* Check that data aligned on u32 and Size multiple of 16*/
338 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
343 /* Return function status */
347 /* Check if HAL_CRYP_Init has been called */
348 if(hcryp->State != HAL_CRYP_STATE_RESET)
350 /* Change the CRYP state */
351 hcryp->State = HAL_CRYP_STATE_BUSY;
353 /* Check if initialization phase has already been performed */
354 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
357 CRYP_SetKey(hcryp, hcryp->Init.pKey);
359 /* Reset the CHMOD & MODE bits */
360 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
362 /* Set the CRYP peripheral in AES ECB mode */
363 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
366 __HAL_CRYP_ENABLE(hcryp);
369 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
372 /* Write Plain Data and Get Cypher Data */
373 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
378 /* Change the CRYP state */
379 hcryp->State = HAL_CRYP_STATE_READY;
381 /* Process Unlocked */
384 /* Return function status */
392 /* Return function status */
398 * @brief Initializes the CRYP peripheral in AES CBC encryption mode
399 * then encrypt pPlainData. The cypher data are available in pCypherData
400 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
401 * the configuration information for CRYP module
402 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
403 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
404 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
405 * @param Timeout: Specify Timeout value
408 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
413 /* Check that data aligned on u32 */
414 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
419 /* Return function status */
423 /* Check if HAL_CRYP_Init has been called */
424 if(hcryp->State != HAL_CRYP_STATE_RESET)
426 /* Change the CRYP state */
427 hcryp->State = HAL_CRYP_STATE_BUSY;
429 /* Check if initialization phase has already been performed */
430 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
433 CRYP_SetKey(hcryp, hcryp->Init.pKey);
435 /* Reset the CHMOD & MODE bits */
436 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
438 /* Set the CRYP peripheral in AES CBC mode */
439 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
441 /* Set the Initialization Vector */
442 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
445 __HAL_CRYP_ENABLE(hcryp);
448 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
451 /* Write Plain Data and Get Cypher Data */
452 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
457 /* Change the CRYP state */
458 hcryp->State = HAL_CRYP_STATE_READY;
460 /* Process Unlocked */
463 /* Return function status */
471 /* Return function status */
477 * @brief Initializes the CRYP peripheral in AES CTR encryption mode
478 * then encrypt pPlainData. The cypher data are available in pCypherData
479 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
480 * the configuration information for CRYP module
481 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
482 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
483 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
484 * @param Timeout: Specify Timeout value
487 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
492 /* Check that data aligned on u32 */
493 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
498 /* Return function status */
502 /* Check if HAL_CRYP_Init has been called */
503 if(hcryp->State != HAL_CRYP_STATE_RESET)
505 /* Change the CRYP state */
506 hcryp->State = HAL_CRYP_STATE_BUSY;
508 /* Check if initialization phase has already been performed */
509 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
512 CRYP_SetKey(hcryp, hcryp->Init.pKey);
514 /* Reset the CHMOD & MODE bits */
515 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
517 /* Set the CRYP peripheral in AES CTR mode */
518 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
520 /* Set the Initialization Vector */
521 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
524 __HAL_CRYP_ENABLE(hcryp);
527 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
530 /* Write Plain Data and Get Cypher Data */
531 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
536 /* Change the CRYP state */
537 hcryp->State = HAL_CRYP_STATE_READY;
539 /* Process Unlocked */
542 /* Return function status */
550 /* Return function status */
556 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
557 * then decrypted pCypherData. The cypher data are available in pPlainData
558 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
559 * the configuration information for CRYP module
560 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
561 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
562 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
563 * @param Timeout: Specify Timeout value
566 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
571 /* Check that data aligned on u32 */
572 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
577 /* Return function status */
581 /* Check if HAL_CRYP_Init has been called */
582 if(hcryp->State != HAL_CRYP_STATE_RESET)
584 /* Change the CRYP state */
585 hcryp->State = HAL_CRYP_STATE_BUSY;
587 /* Check if initialization phase has already been performed */
588 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
591 CRYP_SetKey(hcryp, hcryp->Init.pKey);
593 /* Reset the CHMOD & MODE bits */
594 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
596 /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
597 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
600 __HAL_CRYP_ENABLE(hcryp);
603 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
606 /* Write Cypher Data and Get Plain Data */
607 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
612 /* Change the CRYP state */
613 hcryp->State = HAL_CRYP_STATE_READY;
615 /* Process Unlocked */
618 /* Return function status */
626 /* Return function status */
632 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
633 * then decrypted pCypherData. The cypher data are available in pPlainData
634 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
635 * the configuration information for CRYP module
636 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
637 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
638 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
639 * @param Timeout: Specify Timeout value
642 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
647 /* Check that data aligned on u32 */
648 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
653 /* Return function status */
657 /* Check if HAL_CRYP_Init has been called */
658 if(hcryp->State != HAL_CRYP_STATE_RESET)
660 /* Change the CRYP state */
661 hcryp->State = HAL_CRYP_STATE_BUSY;
663 /* Check if initialization phase has already been performed */
664 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
667 CRYP_SetKey(hcryp, hcryp->Init.pKey);
669 /* Reset the CHMOD & MODE bits */
670 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
672 /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
673 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
675 /* Set the Initialization Vector */
676 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
679 __HAL_CRYP_ENABLE(hcryp);
682 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
685 /* Write Cypher Data and Get Plain Data */
686 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
691 /* Change the CRYP state */
692 hcryp->State = HAL_CRYP_STATE_READY;
694 /* Process Unlocked */
697 /* Return function status */
705 /* Return function status */
711 * @brief Initializes the CRYP peripheral in AES CTR decryption mode
712 * then decrypted pCypherData. The cypher data are available in pPlainData
713 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
714 * the configuration information for CRYP module
715 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
716 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
717 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
718 * @param Timeout: Specify Timeout value
721 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
726 /* Check that data aligned on u32 */
727 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
732 /* Return function status */
736 /* Check if initialization phase has already been performed */
737 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->Phase == HAL_CRYP_PHASE_READY))
739 /* Change the CRYP state */
740 hcryp->State = HAL_CRYP_STATE_BUSY;
743 CRYP_SetKey(hcryp, hcryp->Init.pKey);
745 /* Reset the CHMOD & MODE bits */
746 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
748 /* Set the CRYP peripheral in AES CTR decryption mode */
749 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
751 /* Set the Initialization Vector */
752 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
755 __HAL_CRYP_ENABLE(hcryp);
758 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
761 /* Write Cypher Data and Get Plain Data */
762 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
767 /* Change the CRYP state */
768 hcryp->State = HAL_CRYP_STATE_READY;
770 /* Process Unlocked */
773 /* Return function status */
778 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
779 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
780 * the configuration information for CRYP module
781 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
782 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
783 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
786 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
788 uint32_t inputaddr = 0;
790 /* Check that data aligned on u32 */
791 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
796 /* Return function status */
800 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
805 /* Get the buffer addresses and sizes */
806 hcryp->CrypInCount = Size;
807 hcryp->pCrypInBuffPtr = pPlainData;
808 hcryp->pCrypOutBuffPtr = pCypherData;
809 hcryp->CrypOutCount = Size;
811 /* Change the CRYP state */
812 hcryp->State = HAL_CRYP_STATE_BUSY;
814 /* Check if initialization phase has already been performed */
815 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
818 CRYP_SetKey(hcryp, hcryp->Init.pKey);
820 /* Reset the CHMOD & MODE bits */
821 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
823 /* Set the CRYP peripheral in AES ECB mode */
824 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
827 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
830 /* Enable Interrupts */
831 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
834 __HAL_CRYP_ENABLE(hcryp);
836 /* Get the last input data adress */
837 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
839 /* Write the Input block in the Data Input register */
840 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
842 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
844 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
846 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
847 hcryp->pCrypInBuffPtr += 16;
848 hcryp->CrypInCount -= 16;
850 /* Return function status */
858 /* Return function status */
864 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
865 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
866 * the configuration information for CRYP module
867 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
868 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
869 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
872 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
874 uint32_t inputaddr = 0;
876 /* Check that data aligned on u32 */
877 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
882 /* Return function status */
886 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
891 /* Get the buffer addresses and sizes */
892 hcryp->CrypInCount = Size;
893 hcryp->pCrypInBuffPtr = pPlainData;
894 hcryp->pCrypOutBuffPtr = pCypherData;
895 hcryp->CrypOutCount = Size;
897 /* Change the CRYP state */
898 hcryp->State = HAL_CRYP_STATE_BUSY;
900 /* Check if initialization phase has already been performed */
901 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
904 CRYP_SetKey(hcryp, hcryp->Init.pKey);
906 /* Reset the CHMOD & MODE bits */
907 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
909 /* Set the CRYP peripheral in AES CBC mode */
910 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
912 /* Set the Initialization Vector */
913 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
916 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
919 /* Enable Interrupts */
920 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
923 __HAL_CRYP_ENABLE(hcryp);
925 /* Get the last input data adress */
926 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
928 /* Write the Input block in the Data Input register */
929 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
931 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
933 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
935 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
936 hcryp->pCrypInBuffPtr += 16;
937 hcryp->CrypInCount -= 16;
939 /* Return function status */
947 /* Return function status */
953 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
954 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
955 * the configuration information for CRYP module
956 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
957 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
958 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
961 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
963 uint32_t inputaddr = 0;
965 /* Check that data aligned on u32 */
966 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
971 /* Return function status */
975 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
980 /* Get the buffer addresses and sizes */
981 hcryp->CrypInCount = Size;
982 hcryp->pCrypInBuffPtr = pPlainData;
983 hcryp->pCrypOutBuffPtr = pCypherData;
984 hcryp->CrypOutCount = Size;
986 /* Change the CRYP state */
987 hcryp->State = HAL_CRYP_STATE_BUSY;
989 /* Check if initialization phase has already been performed */
990 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
993 CRYP_SetKey(hcryp, hcryp->Init.pKey);
995 /* Reset the CHMOD & MODE bits */
996 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
998 /* Set the CRYP peripheral in AES CTR mode */
999 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
1001 /* Set the Initialization Vector */
1002 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1005 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1008 /* Enable Interrupts */
1009 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
1012 __HAL_CRYP_ENABLE(hcryp);
1014 /* Get the last input data adress */
1015 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1017 /* Write the Input block in the Data Input register */
1018 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1020 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1022 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1024 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1025 hcryp->pCrypInBuffPtr += 16;
1026 hcryp->CrypInCount -= 16;
1028 /* Return function status */
1034 __HAL_UNLOCK(hcryp);
1036 /* Return function status */
1042 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
1043 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1044 * the configuration information for CRYP module
1045 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1046 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1047 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1048 * @retval HAL status
1050 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1052 uint32_t inputaddr = 0;
1054 /* Check that data aligned on u32 */
1055 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1057 /* Process Locked */
1058 __HAL_UNLOCK(hcryp);
1060 /* Return function status */
1064 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1066 /* Process Locked */
1069 /* Get the buffer addresses and sizes */
1070 hcryp->CrypInCount = Size;
1071 hcryp->pCrypInBuffPtr = pCypherData;
1072 hcryp->pCrypOutBuffPtr = pPlainData;
1073 hcryp->CrypOutCount = Size;
1075 /* Change the CRYP state */
1076 hcryp->State = HAL_CRYP_STATE_BUSY;
1078 /* Check if initialization phase has already been performed */
1079 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1082 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1084 /* Reset the CHMOD & MODE bits */
1085 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
1087 /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
1088 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
1091 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1094 /* Enable Interrupts */
1095 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
1098 __HAL_CRYP_ENABLE(hcryp);
1100 /* Get the last input data adress */
1101 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1103 /* Write the Input block in the Data Input register */
1104 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1106 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1108 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1110 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1111 hcryp->pCrypInBuffPtr += 16;
1112 hcryp->CrypInCount -= 16;
1114 /* Return function status */
1120 __HAL_UNLOCK(hcryp);
1122 /* Return function status */
1128 * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
1129 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1130 * the configuration information for CRYP module
1131 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1132 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1133 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1134 * @retval HAL status
1136 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1138 uint32_t inputaddr = 0;
1140 /* Check that data aligned on u32 */
1141 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1143 /* Process Locked */
1144 __HAL_UNLOCK(hcryp);
1146 /* Return function status */
1150 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1152 /* Process Locked */
1155 /* Get the buffer addresses and sizes */
1156 hcryp->CrypInCount = Size;
1157 hcryp->pCrypInBuffPtr = pCypherData;
1158 hcryp->pCrypOutBuffPtr = pPlainData;
1159 hcryp->CrypOutCount = Size;
1161 /* Change the CRYP state */
1162 hcryp->State = HAL_CRYP_STATE_BUSY;
1164 /* Check if initialization phase has already been performed */
1165 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1168 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1170 /* Reset the CHMOD & MODE bits */
1171 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
1173 /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
1174 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
1176 /* Set the Initialization Vector */
1177 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1180 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1183 /* Enable Interrupts */
1184 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
1187 __HAL_CRYP_ENABLE(hcryp);
1189 /* Get the last input data adress */
1190 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1192 /* Write the Input block in the Data Input register */
1193 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1195 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1197 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1199 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1200 hcryp->pCrypInBuffPtr += 16;
1201 hcryp->CrypInCount -= 16;
1203 /* Return function status */
1209 __HAL_UNLOCK(hcryp);
1211 /* Return function status */
1217 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
1218 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1219 * the configuration information for CRYP module
1220 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1221 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1222 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1223 * @retval HAL status
1225 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1227 uint32_t inputaddr = 0;
1229 /* Check that data aligned on u32 */
1230 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1232 /* Process Locked */
1233 __HAL_UNLOCK(hcryp);
1235 /* Return function status */
1239 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1241 /* Process Locked */
1244 /* Get the buffer addresses and sizes */
1245 hcryp->CrypInCount = Size;
1246 hcryp->pCrypInBuffPtr = pCypherData;
1247 hcryp->pCrypOutBuffPtr = pPlainData;
1248 hcryp->CrypOutCount = Size;
1250 /* Change the CRYP state */
1251 hcryp->State = HAL_CRYP_STATE_BUSY;
1253 /* Check if initialization phase has already been performed */
1254 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1257 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1259 /* Reset the CHMOD & MODE bits */
1260 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
1262 /* Set the CRYP peripheral in AES CTR decryption mode */
1263 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
1265 /* Set the Initialization Vector */
1266 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1269 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1272 /* Enable Interrupts */
1273 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
1276 __HAL_CRYP_ENABLE(hcryp);
1278 /* Get the last input data adress */
1279 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1281 /* Write the Input block in the Data Input register */
1282 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1284 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1286 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1288 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1289 hcryp->pCrypInBuffPtr += 16;
1290 hcryp->CrypInCount -= 16;
1292 /* Return function status */
1298 __HAL_UNLOCK(hcryp);
1300 /* Return function status */
1306 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
1307 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1308 * the configuration information for CRYP module
1309 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1310 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1311 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1312 * @retval HAL status
1314 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1316 uint32_t inputaddr = 0, outputaddr = 0;
1318 /* Check that data aligned on u32 */
1319 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1321 /* Process Locked */
1322 __HAL_UNLOCK(hcryp);
1324 /* Return function status */
1328 /* Check if HAL_CRYP_Init has been called */
1329 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1331 /* Process Locked */
1334 inputaddr = (uint32_t)pPlainData;
1335 outputaddr = (uint32_t)pCypherData;
1337 /* Change the CRYP state */
1338 hcryp->State = HAL_CRYP_STATE_BUSY;
1340 /* Check if initialization phase has already been performed */
1341 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1344 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1346 /* Set the CRYP peripheral in AES ECB mode */
1347 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
1350 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1352 /* Set the input and output addresses and start DMA transfer */
1353 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1355 /* Process Unlocked */
1356 __HAL_UNLOCK(hcryp);
1358 /* Return function status */
1364 __HAL_UNLOCK(hcryp);
1371 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1372 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1373 * the configuration information for CRYP module
1374 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1375 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1376 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1377 * @retval HAL status
1379 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1381 uint32_t inputaddr = 0, outputaddr = 0;
1383 /* Check that data aligned on u32 */
1384 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1386 /* Process Locked */
1387 __HAL_UNLOCK(hcryp);
1389 /* Return function status */
1393 /* Check if HAL_CRYP_Init has been called */
1394 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1396 /* Process Locked */
1399 inputaddr = (uint32_t)pPlainData;
1400 outputaddr = (uint32_t)pCypherData;
1402 /* Change the CRYP state */
1403 hcryp->State = HAL_CRYP_STATE_BUSY;
1405 /* Check if initialization phase has already been performed */
1406 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1409 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1411 /* Set the CRYP peripheral in AES CBC mode */
1412 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
1414 /* Set the Initialization Vector */
1415 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1418 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1420 /* Set the input and output addresses and start DMA transfer */
1421 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1423 /* Process Unlocked */
1424 __HAL_UNLOCK(hcryp);
1426 /* Return function status */
1432 __HAL_UNLOCK(hcryp);
1439 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
1440 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1441 * the configuration information for CRYP module
1442 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1443 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1444 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1445 * @retval HAL status
1447 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1449 uint32_t inputaddr = 0, outputaddr = 0;
1451 /* Check that data aligned on u32 */
1452 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1454 /* Process Locked */
1455 __HAL_UNLOCK(hcryp);
1457 /* Return function status */
1461 /* Check if HAL_CRYP_Init has been called */
1462 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1464 /* Process Locked */
1467 inputaddr = (uint32_t)pPlainData;
1468 outputaddr = (uint32_t)pCypherData;
1470 /* Change the CRYP state */
1471 hcryp->State = HAL_CRYP_STATE_BUSY;
1473 /* Check if initialization phase has already been performed */
1474 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1477 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1479 /* Set the CRYP peripheral in AES CTR mode */
1480 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
1482 /* Set the Initialization Vector */
1483 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1486 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1489 /* Set the input and output addresses and start DMA transfer */
1490 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1492 /* Process Unlocked */
1493 __HAL_UNLOCK(hcryp);
1495 /* Return function status */
1501 __HAL_UNLOCK(hcryp);
1508 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
1509 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1510 * the configuration information for CRYP module
1511 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1512 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1513 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1514 * @retval HAL status
1516 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1518 uint32_t inputaddr = 0, outputaddr = 0;
1520 /* Check that data aligned on u32 */
1521 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1523 /* Process Locked */
1524 __HAL_UNLOCK(hcryp);
1526 /* Return function status */
1530 /* Check if HAL_CRYP_Init has been called */
1531 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1533 /* Process Locked */
1536 inputaddr = (uint32_t)pCypherData;
1537 outputaddr = (uint32_t)pPlainData;
1539 /* Change the CRYP state */
1540 hcryp->State = HAL_CRYP_STATE_BUSY;
1542 /* Check if initialization phase has already been performed */
1543 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1546 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1548 /* Reset the CHMOD & MODE bits */
1549 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
1551 /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
1552 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
1555 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1558 /* Set the input and output addresses and start DMA transfer */
1559 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1561 /* Process Unlocked */
1562 __HAL_UNLOCK(hcryp);
1564 /* Return function status */
1570 __HAL_UNLOCK(hcryp);
1577 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1578 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1579 * the configuration information for CRYP module
1580 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1581 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1582 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1583 * @retval HAL status
1585 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1587 uint32_t inputaddr = 0, outputaddr = 0;
1589 /* Check that data aligned on u32 */
1590 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1592 /* Process Locked */
1593 __HAL_UNLOCK(hcryp);
1595 /* Return function status */
1599 /* Check if HAL_CRYP_Init has been called */
1600 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1602 /* Process Locked */
1605 inputaddr = (uint32_t)pCypherData;
1606 outputaddr = (uint32_t)pPlainData;
1608 /* Change the CRYP state */
1609 hcryp->State = HAL_CRYP_STATE_BUSY;
1611 /* Check if initialization phase has already been performed */
1612 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1615 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1617 /* Reset the CHMOD & MODE bits */
1618 CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
1620 /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
1621 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
1623 /* Set the Initialization Vector */
1624 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1627 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1630 /* Set the input and output addresses and start DMA transfer */
1631 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1633 /* Process Unlocked */
1634 __HAL_UNLOCK(hcryp);
1636 /* Return function status */
1642 __HAL_UNLOCK(hcryp);
1649 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
1650 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1651 * the configuration information for CRYP module
1652 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1653 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1654 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1655 * @retval HAL status
1657 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1659 uint32_t inputaddr = 0, outputaddr = 0;
1661 /* Check that data aligned on u32 */
1662 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1664 /* Process Locked */
1665 __HAL_UNLOCK(hcryp);
1667 /* Return function status */
1671 /* Check if HAL_CRYP_Init has been called */
1672 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1674 /* Process Locked */
1677 inputaddr = (uint32_t)pCypherData;
1678 outputaddr = (uint32_t)pPlainData;
1680 /* Change the CRYP state */
1681 hcryp->State = HAL_CRYP_STATE_BUSY;
1683 /* Check if initialization phase has already been performed */
1684 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1687 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1689 /* Set the CRYP peripheral in AES CTR mode */
1690 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
1692 /* Set the Initialization Vector */
1693 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1696 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1699 /* Set the input and output addresses and start DMA transfer */
1700 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1702 /* Process Unlocked */
1703 __HAL_UNLOCK(hcryp);
1705 /* Return function status */
1711 __HAL_UNLOCK(hcryp);
1721 /** @defgroup CRYP_Exported_Functions_Group3 DMA callback functions
1722 * @brief DMA callback functions.
1725 ==============================================================================
1726 ##### DMA callback functions #####
1727 ==============================================================================
1728 [..] This section provides DMA callback functions:
1729 (+) DMA Input data transfer complete
1730 (+) DMA Output data transfer complete
1738 * @brief CRYP error callback.
1739 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1740 * the configuration information for CRYP module
1743 __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
1745 /* NOTE : This function should not be modified; when the callback is needed,
1746 the HAL_CRYP_ErrorCallback can be implemented in the user file
1751 * @brief Input transfer completed callback.
1752 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1753 * the configuration information for CRYP module
1756 __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
1758 /* NOTE : This function should not be modified; when the callback is needed,
1759 the HAL_CRYP_InCpltCallback can be implemented in the user file
1764 * @brief Output transfer completed callback.
1765 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1766 * the configuration information for CRYP module
1769 __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
1771 /* NOTE : This function should not be modified; when the callback is needed,
1772 the HAL_CRYP_OutCpltCallback can be implemented in the user file
1780 /** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
1781 * @brief CRYP IRQ handler.
1784 ==============================================================================
1785 ##### CRYP IRQ handler management #####
1786 ==============================================================================
1787 [..] This section provides CRYP IRQ handler function.
1794 * @brief This function handles CRYP interrupt request.
1795 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1796 * the configuration information for CRYP module
1799 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
1801 /* Check if error occurred*/
1802 if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_ERR) != RESET)
1804 if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_RDERR) != RESET)
1806 __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_RDERR);
1809 if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_WRERR) != RESET)
1811 __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_WRERR);
1814 if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_CCF) != RESET)
1816 __HAL_CRYP_CLEAR_FLAG(hcryp,CRYP_CLEARFLAG_CCF);
1819 hcryp->State= HAL_CRYP_STATE_ERROR;
1820 /* Disable Computation Complete Interrupt */
1821 __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
1822 __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
1824 HAL_CRYP_ErrorCallback(hcryp);
1826 /* Process Unlocked */
1827 __HAL_UNLOCK(hcryp);
1832 /* Check if computation complete interrupt was enabled*/
1833 if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_CC) != RESET)
1835 /* Clear CCF Flag */
1836 __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
1838 CRYP_EncryptDecrypt_IT(hcryp);
1846 /** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
1847 * @brief Peripheral State functions.
1850 ==============================================================================
1851 ##### Peripheral State functions #####
1852 ==============================================================================
1854 This subsection permits to get in run-time the status of the peripheral.
1861 * @brief Returns the CRYP state.
1862 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1863 * the configuration information for CRYP module
1866 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
1868 return hcryp->State;
1879 /** @addtogroup CRYP_Private_Functions
1884 * @brief IT function called under interruption context to continue encryption or decryption
1885 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1886 * the configuration information for CRYP module
1887 * @retval HAL status
1889 static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp)
1891 uint32_t inputaddr = 0, outputaddr = 0;
1893 /* Get the last Output data adress */
1894 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1896 /* Read the Output block from the Output Register */
1897 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
1899 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
1901 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
1903 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
1905 hcryp->pCrypOutBuffPtr += 16;
1906 hcryp->CrypOutCount -= 16;
1908 /* Check if all input text is encrypted or decrypted */
1909 if(hcryp->CrypOutCount == 0)
1911 /* Disable Computation Complete Interrupt */
1912 __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
1913 __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
1915 /* Process Unlocked */
1916 __HAL_UNLOCK(hcryp);
1918 /* Change the CRYP state */
1919 hcryp->State = HAL_CRYP_STATE_READY;
1921 /* Call computation complete callback */
1922 HAL_CRYPEx_ComputationCpltCallback(hcryp);
1924 else /* Process the rest of input text */
1926 /* Get the last Intput data adress */
1927 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1929 /* Write the Input block in the Data Input register */
1930 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1932 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1934 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1936 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
1937 hcryp->pCrypInBuffPtr += 16;
1938 hcryp->CrypInCount -= 16;
1943 * @brief DMA CRYP Input Data process complete callback.
1944 * @param hdma: DMA handle
1947 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
1949 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1951 /* Disable the DMA transfer for input request */
1952 CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
1954 /* Call input data transfer complete callback */
1955 HAL_CRYP_InCpltCallback(hcryp);
1959 * @brief DMA CRYP Output Data process complete callback.
1960 * @param hdma: DMA handle
1963 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
1965 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1967 /* Disable the DMA transfer for output request by resetting the DMAOUTEN bit
1968 in the DMACR register */
1969 CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
1971 /* Clear CCF Flag */
1972 __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
1975 __HAL_CRYP_DISABLE(hcryp);
1977 /* Change the CRYP state to ready */
1978 hcryp->State = HAL_CRYP_STATE_READY;
1980 /* Call output data transfer complete callback */
1981 HAL_CRYP_OutCpltCallback(hcryp);
1985 * @brief DMA CRYP communication error callback.
1986 * @param hdma: DMA handle
1989 static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
1991 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1992 hcryp->State= HAL_CRYP_STATE_ERROR;
1993 HAL_CRYP_ErrorCallback(hcryp);
1997 * @brief Writes the Key in Key registers.
1998 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1999 * the configuration information for CRYP module
2000 * @param Key: Pointer to Key buffer
2001 * @note Key must be written as little endian.
2002 * If Key pointer points at address n,
2003 * n[15:0] contains key[96:127],
2004 * (n+4)[15:0] contains key[64:95],
2005 * (n+8)[15:0] contains key[32:63] and
2006 * (n+12)[15:0] contains key[0:31]
2009 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key)
2011 uint32_t keyaddr = (uint32_t)Key;
2013 hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr));
2015 hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr));
2017 hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr));
2019 hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr));
2023 * @brief Writes the InitVector/InitCounter in IV registers.
2024 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2025 * the configuration information for CRYP module
2026 * @param InitVector: Pointer to InitVector/InitCounter buffer
2027 * @note Init Vector must be written as little endian.
2028 * If Init Vector pointer points at address n,
2029 * n[15:0] contains Vector[96:127],
2030 * (n+4)[15:0] contains Vector[64:95],
2031 * (n+8)[15:0] contains Vector[32:63] and
2032 * (n+12)[15:0] contains Vector[0:31]
2035 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector)
2037 uint32_t ivaddr = (uint32_t)InitVector;
2039 hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr));
2041 hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr));
2043 hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr));
2045 hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr));
2049 * @brief Process Data: Writes Input data in polling mode and reads the output data
2050 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2051 * the configuration information for CRYP module
2052 * @param Input: Pointer to the Input buffer
2053 * @param Ilength: Length of the Input buffer, must be a multiple of 16.
2054 * @param Output: Pointer to the returned buffer
2055 * @param Timeout: Specify Timeout value
2058 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
2060 uint32_t tickstart = 0;
2063 uint32_t inputaddr = (uint32_t)Input;
2064 uint32_t outputaddr = (uint32_t)Output;
2066 for(index=0; (index < Ilength); index += 16)
2068 /* Write the Input block in the Data Input register */
2069 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
2071 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
2073 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
2075 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
2079 tickstart = HAL_GetTick();
2081 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
2083 /* Check for the Timeout */
2084 if(Timeout != HAL_MAX_DELAY)
2086 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
2089 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2091 /* Process Unlocked */
2092 __HAL_UNLOCK(hcryp);
2098 /* Clear CCF Flag */
2099 __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
2101 /* Read the Output block from the Data Output Register */
2102 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
2104 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
2106 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
2108 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
2111 /* Return function status */
2116 * @brief Set the DMA configuration and start the DMA transfer
2117 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2118 * the configuration information for CRYP module
2119 * @param inputaddr: address of the Input buffer
2120 * @param Size: Size of the Input buffer, must be a multiple of 16.
2121 * @param outputaddr: address of the Output buffer
2124 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
2126 /* Set the CRYP DMA transfer complete callback */
2127 hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
2128 /* Set the DMA error callback */
2129 hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
2131 /* Set the CRYP DMA transfer complete callback */
2132 hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
2133 /* Set the DMA error callback */
2134 hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
2136 /* Enable the DMA In DMA Stream */
2137 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4);
2139 /* Enable the DMA Out DMA Stream */
2140 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4);
2142 /* Enable In and Out DMA requests */
2143 SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN | AES_CR_DMAOUTEN));
2146 __HAL_CRYP_ENABLE(hcryp);
2161 #endif /* HAL_CRYP_MODULE_ENABLED */
2162 #endif /* STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */
2163 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/