2 ******************************************************************************
3 * @file stm32l0xx_hal_dac_ex.c
4 * @author MCD Application Team
6 * @date 06-February-2015
7 * @brief Extended DAC HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of DAC extension peripheral:
10 * + Extended features functions
14 ==============================================================================
15 ##### How to use this driver #####
16 ==============================================================================
18 (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
19 Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
20 HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.
21 (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
22 (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
25 ******************************************************************************
28 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
30 * Redistribution and use in source and binary forms, with or without modification,
31 * are permitted provided that the following conditions are met:
32 * 1. Redistributions of source code must retain the above copyright notice,
33 * this list of conditions and the following disclaimer.
34 * 2. Redistributions in binary form must reproduce the above copyright notice,
35 * this list of conditions and the following disclaimer in the documentation
36 * and/or other materials provided with the distribution.
37 * 3. Neither the name of STMicroelectronics nor the names of its contributors
38 * may be used to endorse or promote products derived from this software
39 * without specific prior written permission.
41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
42 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
44 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
48 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
52 ******************************************************************************
56 #if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
57 /* Includes ------------------------------------------------------------------*/
58 #include "stm32l0xx_hal.h"
60 #ifdef HAL_DAC_MODULE_ENABLED
61 /** @addtogroup STM32L0xx_HAL_Driver
65 /** @defgroup DACEx DACEx
66 * @brief DAC driver modules
71 /* Private typedef -----------------------------------------------------------*/
72 /* Private define ------------------------------------------------------------*/
73 /* Private macro -------------------------------------------------------------*/
74 /* Private variables ---------------------------------------------------------*/
75 /* Private function prototypes -----------------------------------------------*/
76 /* Private functions ---------------------------------------------------------*/
77 /** @addtogroup DACEx_Private_Functions
80 #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
81 static void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
82 static void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
83 static void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
85 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
86 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
87 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
93 /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
97 /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
98 * @brief Extended features functions
104 #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
106 * @brief Returns the last data output value of the selected DAC channel.
107 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
108 * the configuration information for the specified DAC.
109 * @retval The selected DAC channel data output value.
111 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
115 tmp |= hdac->Instance->DOR1;
117 tmp |= hdac->Instance->DOR2 << 16;
119 /* Returns the DAC channel data output register value */
125 * @brief Enables or disables the selected DAC channel wave generation.
126 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
127 * the configuration information for the specified DAC.
128 * @param Channel: The selected DAC channel.
129 * This parameter can be one of the following values:
130 * @arg DAC_CHANNEL_1: DAC Channel1 selected
131 * @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
132 * @param Amplitude: Select max triangle amplitude.
133 * This parameter can be one of the following values:
134 * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
135 * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
136 * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
137 * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
138 * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
139 * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
140 * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
141 * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
142 * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
143 * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
144 * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
145 * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
148 HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
150 /* Check the parameters */
151 assert_param(IS_DAC_CHANNEL(Channel));
152 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
157 /* Change DAC state */
158 hdac->State = HAL_DAC_STATE_BUSY;
160 /* Enable the triangle wave generation for the selected DAC channel */
161 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
164 /* Change DAC state */
165 hdac->State = HAL_DAC_STATE_READY;
167 /* Process unlocked */
170 /* Return function status */
175 * @brief Enables or disables the selected DAC channel wave generation.
176 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
177 * the configuration information for the specified DAC.
178 * @param Channel: The selected DAC channel.
179 * This parameter can be one of the following values:
180 * @arg DAC_CHANNEL_1: DAC Channel1 selected
181 * @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
182 * @param Amplitude: Unmask DAC channel LFSR for noise wave generation.
183 * This parameter can be one of the following values:
184 * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
185 * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
186 * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
187 * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
188 * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
189 * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
190 * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
191 * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
192 * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
193 * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
194 * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
195 * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
198 HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
200 /* Check the parameters */
201 assert_param(IS_DAC_CHANNEL(Channel));
202 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
207 /* Change DAC state */
208 hdac->State = HAL_DAC_STATE_BUSY;
210 /* Enable the noise wave generation for the selected DAC channel */
211 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
213 /* Change DAC state */
214 hdac->State = HAL_DAC_STATE_READY;
216 /* Process unlocked */
219 /* Return function status */
223 #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
225 * @brief Set the specified data holding register value for dual DAC channel.
226 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
227 * the configuration information for the specified DAC.
228 * @param Alignment: Specifies the data alignment for dual channel DAC.
229 * This parameter can be one of the following values:
230 * DAC_ALIGN_8B_R: 8bit right data alignment selected
231 * DAC_ALIGN_12B_L: 12bit left data alignment selected
232 * DAC_ALIGN_12B_R: 12bit right data alignment selected
233 * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
234 * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register.
235 * @note In dual mode, a unique register access is required to write in both
236 * DAC channels at the same time.
239 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
241 uint32_t data = 0, tmp = 0;
243 /* Check the parameters */
244 assert_param(IS_DAC_ALIGN(Alignment));
245 assert_param(IS_DAC_DATA(Data1));
246 assert_param(IS_DAC_DATA(Data2));
248 /* Calculate and set dual DAC data holding register value */
249 if (Alignment == DAC_ALIGN_8B_R)
251 data = ((uint32_t)Data2 << 8) | Data1;
255 data = ((uint32_t)Data2 << 16) | Data1;
258 tmp = (uint32_t)hdac->Instance;
259 tmp += __DAC_DHR12RD_ALIGNEMENT(Alignment);
261 /* Set the dual DAC selected data holding register */
262 *(__IO uint32_t *)tmp = data;
264 /* Return function status */
270 * @brief Conversion complete callback in non blocking mode for Channel2
271 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
272 * the configuration information for the specified DAC.
275 __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
277 /* NOTE : This function Should not be modified, when the callback is needed,
278 the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
283 * @brief Conversion half DMA transfer callback in non blocking mode for Channel2
284 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
285 * the configuration information for the specified DAC.
288 __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
290 /* NOTE : This function Should not be modified, when the callback is needed,
291 the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
296 * @brief Error DAC callback for Channel2.
297 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
298 * the configuration information for the specified DAC.
301 __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
303 /* NOTE : This function Should not be modified, when the callback is needed,
304 the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
309 * @brief DMA underrun DAC callback for channel2.
310 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
311 * the configuration information for the specified DAC.
314 __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
316 /* NOTE : This function Should not be modified, when the callback is needed,
317 the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
322 * @brief Enables DAC and starts conversion of channel.
323 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
324 * the configuration information for the specified DAC.
325 * @param Channel: The selected DAC channel.
326 * This parameter can be one of the following values:
327 * @arg DAC_CHANNEL_1: DAC Channel1 selected
328 * @arg DAC_CHANNEL_2: DAC Channel2 selected
331 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
333 uint32_t tmp1 = 0, tmp2 = 0;
335 /* Check the parameters */
336 assert_param(IS_DAC_CHANNEL(Channel));
341 /* Change DAC state */
342 hdac->State = HAL_DAC_STATE_BUSY;
344 /* Enable the Peripharal */
345 __HAL_DAC_ENABLE(hdac, Channel);
347 if(Channel == DAC_CHANNEL_1)
349 tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
350 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
351 /* Check if software trigger enabled */
352 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
354 /* Enable the selected DAC software conversion */
355 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
360 tmp1 = hdac->Instance->CR & DAC_CR_TEN2;
361 tmp2 = hdac->Instance->CR & DAC_CR_TSEL2;
362 /* Check if software trigger enabled */
363 if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2))
365 /* Enable the selected DAC software conversion*/
366 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
370 /* Change DAC state */
371 hdac->State = HAL_DAC_STATE_READY;
373 /* Process unlocked */
376 /* Return function status */
381 * @brief Enables DAC and starts conversion of channel using DMA.
382 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
383 * the configuration information for the specified DAC.
384 * @param Channel: The selected DAC channel.
385 * This parameter can be one of the following values:
386 * @arg DAC_CHANNEL_1: DAC Channel1 selected
387 * @arg DAC_CHANNEL_2: DAC Channel2 selected
388 * @param pData: The destination peripheral Buffer address.
389 * @param Length: The length of data to be transferred from memory to DAC peripheral
390 * @param Alignment: Specifies the data alignment for DAC channel.
391 * This parameter can be one of the following values:
392 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
393 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
394 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
397 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
401 /* Check the parameters */
402 assert_param(IS_DAC_CHANNEL(Channel));
403 assert_param(IS_DAC_ALIGN(Alignment));
408 /* Change DAC state */
409 hdac->State = HAL_DAC_STATE_BUSY;
411 if(Channel == DAC_CHANNEL_1)
413 /* Set the DMA transfer complete callback for channel1 */
414 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
416 /* Set the DMA half transfer complete callback for channel1 */
417 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
419 /* Set the DMA error callback for channel1 */
420 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
422 /* Enable the selected DAC channel1 DMA request */
423 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
425 /* Case of use of channel 1 */
428 case DAC_ALIGN_12B_R:
429 /* Get DHR12R1 address */
430 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
432 case DAC_ALIGN_12B_L:
433 /* Get DHR12L1 address */
434 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
437 /* Get DHR8R1 address */
438 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
443 UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
447 /* Set the DMA transfer complete callback for channel2 */
448 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
450 /* Set the DMA half transfer complete callback for channel2 */
451 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
453 /* Set the DMA error callback for channel2 */
454 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
456 /* Enable the selected DAC channel2 DMA request */
457 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
459 /* Case of use of channel 2 */
462 case DAC_ALIGN_12B_R:
463 /* Get DHR12R2 address */
464 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
466 case DAC_ALIGN_12B_L:
467 /* Get DHR12L2 address */
468 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
471 /* Get DHR8R2 address */
472 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
479 /* Enable the DMA Stream */
480 if(Channel == DAC_CHANNEL_1)
482 /* Enable the DAC DMA underrun interrupt */
483 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
485 /* Enable the DMA Stream */
486 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
490 /* Enable the DAC DMA underrun interrupt */
491 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
493 /* Enable the DMA Stream */
494 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
497 /* Enable the Peripharal */
498 __HAL_DAC_ENABLE(hdac, Channel);
500 /* Process Unlocked */
503 /* Return function status */
508 * @brief Disables DAC and stop conversion of channel.
509 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
510 * the configuration information for the specified DAC.
511 * @param Channel: The selected DAC channel.
512 * This parameter can be one of the following values:
513 * @arg DAC_CHANNEL_1: DAC Channel1 selected
514 * @arg DAC_CHANNEL_2: DAC Channel2 selected
517 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
519 HAL_StatusTypeDef status = HAL_OK;
521 /* Check the parameters */
522 assert_param(IS_DAC_CHANNEL(Channel));
524 /* Disable the selected DAC channel DMA request */
525 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_DMAEN1 << Channel));
527 /* Disable the Peripharal */
528 __HAL_DAC_DISABLE(hdac, Channel);
530 /* Disable the DMA Channel */
531 /* Channel1 is used */
532 if(Channel == DAC_CHANNEL_1)
534 status = HAL_DMA_Abort(hdac->DMA_Handle1);
536 else /* Channel2 is used for */
538 status = HAL_DMA_Abort(hdac->DMA_Handle2);
541 /* Check if DMA Channel effectively disabled */
544 /* Update DAC state machine to error */
545 hdac->State = HAL_DAC_STATE_ERROR;
549 /* Change DAC state */
550 hdac->State = HAL_DAC_STATE_READY;
553 /* Return function status */
558 * @brief Returns the last data output value of the selected DAC channel.
559 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
560 * the configuration information for the specified DAC.
561 * @param Channel: The selected DAC channel.
562 * This parameter can be one of the following values:
563 * @arg DAC_CHANNEL_1: DAC Channel1 selected
564 * @arg DAC_CHANNEL_2: DAC Channel2 selected
565 * @retval The selected DAC channel data output value.
567 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
569 /* Check the parameters */
570 assert_param(IS_DAC_CHANNEL(Channel));
572 /* Returns the DAC channel data output register value */
573 if(Channel == DAC_CHANNEL_1)
575 return hdac->Instance->DOR1;
579 return hdac->Instance->DOR2;
584 * @brief Handles DAC interrupt request
585 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
586 * the configuration information for the specified DAC.
589 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
591 /* Check underrun flag of DAC channel 1 */
592 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
594 /* Change DAC state to error state */
595 hdac->State = HAL_DAC_STATE_ERROR;
597 /* Set DAC error code to chanel1 DMA underrun error */
598 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
600 /* Clear the underrun flag */
601 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
603 /* Disable the selected DAC channel1 DMA request */
604 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
607 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
610 /* Check underrun flag of DAC channel 2 */
611 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
613 /* Change DAC state to error state */
614 hdac->State = HAL_DAC_STATE_ERROR;
616 /* Set DAC error code to channel2 DMA underrun error */
617 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
619 /* Clear the underrun flag */
620 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
622 /* Disable the selected DAC channel1 DMA request */
623 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
626 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
632 * @brief Set the specified data holding register value for DAC channel.
633 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
634 * the configuration information for the specified DAC.
635 * @param Channel: The selected DAC channel.
636 * This parameter can be one of the following values:
637 * @arg DAC_CHANNEL_1: DAC Channel1 selected
638 * @arg DAC_CHANNEL_2: DAC Channel2 selected
639 * @param Alignment: Specifies the data alignment.
640 * This parameter can be one of the following values:
641 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
642 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
643 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
644 * @param Data: Data to be loaded in the selected data holding register.
647 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
649 __IO uint32_t tmp = 0;
651 /* Check the parameters */
652 assert_param(IS_DAC_CHANNEL(Channel));
653 assert_param(IS_DAC_ALIGN(Alignment));
654 assert_param(IS_DAC_DATA(Data));
656 tmp = (uint32_t)hdac->Instance;
657 if(Channel == DAC_CHANNEL_1)
659 tmp += __DAC_DHR12R1_ALIGNEMENT(Alignment);
663 tmp += __DAC_DHR12R2_ALIGNEMENT(Alignment);
666 /* Set the DAC channel selected data holding register */
667 *(__IO uint32_t *) tmp = Data;
669 /* Return function status */
672 #else /* All products with only one channel */
675 * @brief Enables DAC and starts conversion of channel.
676 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
677 * the configuration information for the specified DAC.
678 * @param Channel: The selected DAC channel.
679 * This parameter can be one of the following values:
680 * @arg DAC_CHANNEL_1: DAC Channel1 selected
683 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
685 uint32_t tmp1 = 0, tmp2 = 0;
687 /* Check the parameters */
688 assert_param(IS_DAC_CHANNEL(Channel));
693 /* Change DAC state */
694 hdac->State = HAL_DAC_STATE_BUSY;
696 /* Enable the Peripharal */
697 __HAL_DAC_ENABLE(hdac, Channel);
699 tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
700 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
701 /* Check if software trigger enabled */
702 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
704 /* Enable the selected DAC software conversion */
705 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
708 /* Change DAC state */
709 hdac->State = HAL_DAC_STATE_READY;
711 /* Process unlocked */
714 /* Return function status */
719 * @brief Enables DAC and starts conversion of channel using DMA.
720 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
721 * the configuration information for the specified DAC.
722 * @param Channel: The selected DAC channel.
723 * This parameter can be one of the following values:
724 * @arg DAC_CHANNEL_1: DAC Channel1 selected
725 * @param pData: The destination peripheral Buffer address.
726 * @param Length: The length of data to be transferred from memory to DAC peripheral
727 * @param Alignment: Specifies the data alignment for DAC channel.
728 * This parameter can be one of the following values:
729 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
730 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
731 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
734 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
738 /* Check the parameters */
739 assert_param(IS_DAC_CHANNEL(Channel));
740 assert_param(IS_DAC_ALIGN(Alignment));
745 /* Change DAC state */
746 hdac->State = HAL_DAC_STATE_BUSY;
748 /* Set the DMA transfer complete callback for channel1 */
749 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
751 /* Set the DMA half transfer complete callback for channel1 */
752 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
754 /* Set the DMA error callback for channel1 */
755 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
757 /* Enable the selected DAC channel1 DMA request */
758 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
760 /* Case of use of channel 1 */
763 case DAC_ALIGN_12B_R:
764 /* Get DHR12R1 address */
765 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
767 case DAC_ALIGN_12B_L:
768 /* Get DHR12L1 address */
769 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
772 /* Get DHR8R1 address */
773 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
778 UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
780 /* Enable the DMA Stream */
781 /* Enable the DAC DMA underrun interrupt */
782 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
784 /* Enable the DMA Stream */
785 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
787 /* Enable the Peripharal */
788 __HAL_DAC_ENABLE(hdac, Channel);
790 /* Process Unlocked */
793 /* Return function status */
798 * @brief Disables DAC and stop conversion of channel.
799 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
800 * the configuration information for the specified DAC.
801 * @param Channel: The selected DAC channel.
802 * This parameter can be one of the following values:
803 * @arg DAC_CHANNEL_1: DAC Channel1 selected
806 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
808 HAL_StatusTypeDef status = HAL_OK;
810 /* Check the parameters */
811 assert_param(IS_DAC_CHANNEL(Channel));
813 /* Disable the selected DAC channel DMA request */
814 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_DMAEN1 << Channel));
816 /* Disable the Peripharal */
817 __HAL_DAC_DISABLE(hdac, Channel);
819 /* Disable the DMA Channel */
820 status = HAL_DMA_Abort(hdac->DMA_Handle1);
822 /* Check if DMA Channel effectively disabled */
825 /* Update DAC state machine to error */
826 hdac->State = HAL_DAC_STATE_ERROR;
830 /* Change DAC state */
831 hdac->State = HAL_DAC_STATE_READY;
834 /* Return function status */
839 * @brief Returns the last data output value of the selected DAC channel.
840 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
841 * the configuration information for the specified DAC.
842 * @param Channel: The selected DAC channel.
843 * This parameter can be one of the following values:
844 * @arg DAC_CHANNEL_1: DAC Channel1 selected
845 * @retval The selected DAC channel data output value.
847 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
849 /* Check the parameters */
850 assert_param(IS_DAC_CHANNEL(Channel));
852 /* Returns the DAC channel data output register value */
853 return hdac->Instance->DOR1;
857 * @brief Handles DAC interrupt request
858 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
859 * the configuration information for the specified DAC.
862 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
864 /* Check underrun flag of DAC channel 1 */
865 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
867 /* Change DAC state to error state */
868 hdac->State = HAL_DAC_STATE_ERROR;
870 /* Set DAC error code to chanel1 DMA underrun error */
871 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
873 /* Clear the underrun flag */
874 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
876 /* Disable the selected DAC channel1 DMA request */
877 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
880 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
885 * @brief Set the specified data holding register value for DAC channel.
886 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
887 * the configuration information for the specified DAC.
888 * @param Channel: The selected DAC channel.
889 * This parameter can be one of the following values:
890 * @arg DAC_CHANNEL_1: DAC Channel1 selected
891 * @param Alignment: Specifies the data alignment.
892 * This parameter can be one of the following values:
893 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
894 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
895 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
896 * @param Data: Data to be loaded in the selected data holding register.
899 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
901 __IO uint32_t tmp = 0;
903 /* Check the parameters */
904 assert_param(IS_DAC_CHANNEL(Channel));
905 assert_param(IS_DAC_ALIGN(Alignment));
906 assert_param(IS_DAC_DATA(Data));
908 tmp = (uint32_t)hdac->Instance;
909 tmp += __DAC_DHR12R1_ALIGNEMENT(Alignment);
911 /* Set the DAC channel selected data holding register */
912 *(__IO uint32_t *) tmp = Data;
914 /* Return function status */
918 #endif /* #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) */
928 /** @defgroup DACEx_Private_Functions DACEx Private Functions
931 #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
933 * @brief DMA conversion complete callback.
934 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
935 * the configuration information for the specified DMA module.
938 static void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
940 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
942 HAL_DACEx_ConvCpltCallbackCh2(hdac);
944 hdac->State= HAL_DAC_STATE_READY;
948 * @brief DMA half transfer complete callback.
949 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
950 * the configuration information for the specified DMA module.
953 static void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
955 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
956 /* Conversion complete callback */
957 HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
961 * @brief DMA error callback
962 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
963 * the configuration information for the specified DMA module.
966 static void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
968 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
970 /* Set DAC error code to DMA error */
971 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
973 HAL_DACEx_ErrorCallbackCh2(hdac);
975 hdac->State= HAL_DAC_STATE_READY;
977 #endif /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */
980 * @brief DMA conversion complete callback.
981 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
982 * the configuration information for the specified DMA module.
985 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
987 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
989 HAL_DAC_ConvCpltCallbackCh1(hdac);
991 hdac->State= HAL_DAC_STATE_READY;
995 * @brief DMA half transfer complete callback.
996 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
997 * the configuration information for the specified DMA module.
1000 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1002 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1003 /* Conversion complete callback */
1004 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1008 * @brief DMA error callback
1009 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1010 * the configuration information for the specified DMA module.
1013 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1015 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1017 /* Set DAC error code to DMA error */
1018 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1020 HAL_DAC_ErrorCallbackCh1(hdac);
1022 hdac->State= HAL_DAC_STATE_READY;
1038 #endif /* HAL_DAC_MODULE_ENABLED */
1039 #endif /* #if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
1040 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/