2 ******************************************************************************
3 * @file stm32l0xx_hal_iwdg.h
4 * @author MCD Application Team
6 * @date 06-February-2015
7 * @brief Header file of IWDG HAL module.
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L0xx_HAL_IWDG_H
40 #define __STM32L0xx_HAL_IWDG_H
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32l0xx_hal_def.h"
49 /** @addtogroup STM32L0xx_HAL_Driver
57 /* Exported types ------------------------------------------------------------*/
59 /** @defgroup IWDG_Exported_Types IWDG Exported Types
63 /** @defgroup IWDG_State IWDG state definition
67 * @brief IWDG HAL State Structure definition
71 HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */
72 HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */
73 HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */
74 HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */
75 HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */
77 }HAL_IWDG_StateTypeDef;
81 /** @defgroup IWDG_Init IWDG init configuration structure
85 * @brief IWDG Init structure definition
89 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
90 This parameter can be a value of @ref IWDG_Prescaler */
92 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
93 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
95 uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
96 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
103 /** @defgroup IWDG_handle IWDG handler
107 * @brief IWDG Handle Structure definition
111 IWDG_TypeDef *Instance; /*!< Register base address */
113 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
115 HAL_LockTypeDef Lock; /*!< IWDG Locking object */
117 __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */
129 /* Exported constants --------------------------------------------------------*/
131 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
135 /** @defgroup IWDG_Registers_Key IWDG key
136 * @brief IWDG registers bit mask
139 /* --- KR Register ---*/
140 /* KR register bit mask */
141 #define IWDG_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */
142 #define IWDG_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */
143 #define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */
144 #define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */
149 #define IS_IWDG_KR(__KR__) (((__KR__) == IWDG_KEY_RELOAD) || \
150 ((__KR__) == IWDG_KEY_ENABLE))|| \
151 ((__KR__) == IWDG_KEY_WRITE_ACCESS_ENABLE)) || \
152 ((__KR__) == IWDG_KEY_WRITE_ACCESS_DISABLE))
155 /** @defgroup IWDG_Flag_definition IWDG Flag definition
158 #define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update flag */
159 #define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update flag */
160 #define IWDG_FLAG_WVU ((uint32_t)IWDG_SR_WVU) /*!< Watchdog counter window value update Flag */
164 #define IS_IWDG_FLAG(__FLAG__) (((__FLAG__) == IWDG_FLAG_PVU) || \
165 ((__FLAG__) == IWDG_FLAG_RVU) || \
166 ((__FLAG__) == IWDG_FLAG_WVU))
169 /** @defgroup IWDG_Prescaler IWDG Prescaler
172 #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */
173 #define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */
174 #define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */
175 #define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */
176 #define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */
177 #define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */
178 #define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */
182 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
183 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
184 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
185 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
186 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
187 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
188 ((__PRESCALER__) == IWDG_PRESCALER_256))
190 /* Check for reload value */
191 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF)
193 /* Check for window value */
194 #define IS_IWDG_WINDOW(__VALUE__) ((__VALUE__) <= 0xFFF)
197 /** @defgroup IWDG_Disable IWDG Disable
200 #define IWDG_WINDOW_DISABLE 0xFFF
208 /* Exported macro ------------------------------------------------------------*/
209 /** @defgroup IWDG_Exported_Macro IWDG Exported Macro
213 /** @brief Reset IWDG handle state
214 * @param __HANDLE__ : IWDG handle
217 #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
220 * @brief Enables the IWDG peripheral.
221 * @param __HANDLE__ : IWDG handle
224 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
227 * @brief Reloads IWDG counter with value defined in the reload register
228 * (write access to IWDG_PR and IWDG_RLR registers disabled).
229 * @param __HANDLE__ : IWDG handle
232 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
235 * @brief Enables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
236 * @param __HANDLE__ : IWDG handle
239 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
242 * @brief Disables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
243 * @param __HANDLE__ : IWDG handle
246 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
249 * @brief Gets the selected IWDG's flag status.
250 * @param __HANDLE__ : IWDG handle
251 * @param __FLAG__ : specifies the flag to check.
252 * This parameter can be one of the following values:
253 * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
254 * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
255 * @arg IWDG_FLAG_WVU: Watchdog counter window value flag
256 * @retval The new state of __FLAG__ (TRUE or FALSE) .
258 #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
264 /* Exported functions --------------------------------------------------------*/
265 /** @defgroup IWDG_Exported_Functions
269 /** @defgroup IWDG_Exported_Functions_Group1 Initialization/de-initialization functions
272 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
273 void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
278 /** @defgroup IWDG_Exported_Functions_Group2 I/O operation functions
281 HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
282 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
287 /** @defgroup IWDG_Exported_Functions_Group3 Peripheral State functions
290 HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
311 #endif /* __STM32L0xx_HAL_IWDG_H */
313 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/