2 ******************************************************************************
3 * @file stm32l0xx_hal_spi.c
4 * @author MCD Application Team
6 * @date 06-February-2015
7 * @brief SPI HAL module driver.
9 * This file provides firmware functions to manage the following
10 * functionalities of the Serial Peripheral Interface (SPI) peripheral:
11 * + Initialization and de-initialization functions
12 * + IO operation functions
13 * + Peripheral Control functions
14 * + Peripheral State functions
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
20 The SPI HAL driver can be used as follows:
22 (#) Declare a SPI_HandleTypeDef handle structure, for example:
23 SPI_HandleTypeDef hspi;
25 (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
26 (##) Enable the SPIx interface clock
27 (##) SPI pins configuration
28 (+++) Enable the clock for the SPI GPIOs
29 (+++) Configure these SPI pins as alternate function push-pull
30 (##) NVIC configuration if you need to use interrupt process
31 (+++) Configure the SPIx interrupt priority
32 (+++) Enable the NVIC SPI IRQ handle
33 (##) DMA Configuration if you need to use DMA process
34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
35 (+++) Enable the DMAx clock
36 (+++) Configure the DMA handle parameters
37 (+++) Configure the DMA Tx or Rx Channel
38 (+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
41 (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
42 management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
44 (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
45 (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
46 by calling the customed HAL_SPI_MspInit() API.
48 Circular mode restriction:
49 (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
50 (##) Master 2Lines RxOnly
52 (#) The CRC feature is not managed when the DMA circular mode is enabled
53 (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
54 the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
57 Using the HAL it is not possible to reach all supported SPI frequency with the differents SPI Modes,
58 the following table resume the max SPI frequency reached with data size 8bits/16bits,
59 according to frequency used on APBx Peripheral Clock (fPCLK) used by the SPI instance :
61 DataSize = SPI_DATASIZE_8BIT:
62 +----------------------------------------------------------------------------------------------+
63 | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line |
64 | Process | Tranfert mode |---------------------|----------------------|----------------------|
65 | | | Master | Slave | Master | Slave | Master | Slave |
66 |==============================================================================================|
67 | T | Polling | Fpclk/4 | Fpclk/8 | NA | NA | NA | NA |
68 | X |----------------|----------|----------|-----------|----------|-----------|----------|
69 | / | Interrupt | Fpclk/64 | Fpclk/64 | NA | NA | NA | NA |
70 | R |----------------|----------|----------|-----------|----------|-----------|----------|
71 | X | DMA | Fpclk/2 | Fpclk/4 | NA | NA | NA | NA |
72 |=========|================|==========|==========|===========|==========|===========|==========|
73 | | Polling | Fpclk/2 | Fpclk/8 | Fpclk/8 | Fpclk/8 | Fpclk/8 | Fpclk/8 |
74 | |----------------|----------|----------|-----------|----------|-----------|----------|
75 | R | Interrupt | Fpclk/64 | Fpclk/32 | Fpclk/32 | Fpclk/16 | Fpclk/32 | Fpclk/32 |
76 | X |----------------|----------|----------|-----------|----------|-----------|----------|
77 | | DMA | Fpclk/2 | Fpclk/2 | Fpclk/16 | Fpclk/2 | Fpclk/16 | Fpclk/2 |
78 |=========|================|==========|==========|===========|==========|===========|==========|
79 | | Polling | Fpclk/8 | Fpclk/8 | NA | NA | Fpclk/4 | Fpclk/16 |
80 | |----------------|----------|----------|-----------|----------|-----------|----------|
81 | T | Interrupt | Fpclk/8 | Fpclk/32 | NA | NA | Fpclk/8 | Fpclk/16 |
82 | X |----------------|----------|----------|-----------|----------|-----------|----------|
83 | | DMA | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/2 | Fpclk/2 |
84 +----------------------------------------------------------------------------------------------+
86 DataSize = SPI_DATASIZE_16BIT:
87 +----------------------------------------------------------------------------------------------+
88 | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line |
89 | Process | Tranfert mode |---------------------|----------------------|----------------------|
90 | | | Master | Slave | Master | Slave | Master | Slave |
91 |==============================================================================================|
92 | T | Polling | Fpclk/4 | Fpclk/8 | NA | NA | NA | NA |
93 | X |----------------|----------|----------|-----------|----------|-----------|----------|
94 | / | Interrupt | Fpclk/32 | Fpclk/16 | NA | NA | NA | NA |
95 | R |----------------|----------|----------|-----------|----------|-----------|----------|
96 | X | DMA | Fpclk/2 | Fpclk/4 | NA | NA | NA | NA |
97 |=========|================|==========|==========|===========|==========|===========|==========|
98 | | Polling | Fpclk/2 | Fpclk/4 | Fpclk/8 | Fpclk/4 | Fpclk/2 | Fpclk/8 |
99 | |----------------|----------|----------|-----------|----------|-----------|----------|
100 | R | Interrupt | Fpclk/32 | Fpclk/8 | Fpclk/16 | Fpclk/16 | Fpclk/16 | Fpclk/8 |
101 | X |----------------|----------|----------|-----------|----------|-----------|----------|
102 | | DMA | Fpclk/2 | Fpclk/2 | Fpclk/8 | Fpclk/2 | Fpclk/8 | Fpclk/2 |
103 |=========|================|==========|==========|===========|==========|===========|==========|
104 | | Polling | Fpclk/4 | Fpclk/4 | NA | NA | Fpclk/4 | Fpclk/8 |
105 | |----------------|----------|----------|-----------|----------|-----------|----------|
106 | T | Interrupt | Fpclk/4 | Fpclk/16 | NA | NA | Fpclk/8 | Fpclk/8 |
107 | X |----------------|----------|----------|-----------|----------|-----------|----------|
108 | | DMA | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/2 | Fpclk/2 |
109 +----------------------------------------------------------------------------------------------+
110 @note The max SPI frequency depend on SPI data size (8bits, 16bits),
111 SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
113 (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
114 (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
115 (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
118 ******************************************************************************
121 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
123 * Redistribution and use in source and binary forms, with or without modification,
124 * are permitted provided that the following conditions are met:
125 * 1. Redistributions of source code must retain the above copyright notice,
126 * this list of conditions and the following disclaimer.
127 * 2. Redistributions in binary form must reproduce the above copyright notice,
128 * this list of conditions and the following disclaimer in the documentation
129 * and/or other materials provided with the distribution.
130 * 3. Neither the name of STMicroelectronics nor the names of its contributors
131 * may be used to endorse or promote products derived from this software
132 * without specific prior written permission.
134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
135 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
136 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
137 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
138 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
139 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
140 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
141 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
142 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
143 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
145 ******************************************************************************
148 /* Includes ------------------------------------------------------------------*/
149 #include "stm32l0xx_hal.h"
151 /** @addtogroup STM32L0xx_HAL_Driver
155 /** @defgroup SPI SPI
156 * @brief SPI HAL module driver
160 #ifdef HAL_SPI_MODULE_ENABLED
162 /* Private typedef -----------------------------------------------------------*/
163 /* Private define ------------------------------------------------------------*/
164 /** @defgroup SPI_Private_Constants SPI Private Constants
167 #define SPI_TIMEOUT_VALUE 10
172 /* Private macro -------------------------------------------------------------*/
173 /* Private variables ---------------------------------------------------------*/
174 /* Private function prototypes -----------------------------------------------*/
175 /** @defgroup SPI_Private_Functions SPI Private Functions
178 static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi);
179 static void SPI_TxISR(SPI_HandleTypeDef *hspi);
180 static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi);
181 static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi);
182 static void SPI_RxISR(SPI_HandleTypeDef *hspi);
183 static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
184 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
185 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
186 static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
187 static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
188 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
189 static void SPI_DMAError(DMA_HandleTypeDef *hdma);
190 static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
195 /* Exported functions ---------------------------------------------------------*/
197 /** @defgroup SPI_Exported_Functions SPI Exported Functions
201 /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
202 * @brief Initialization and Configuration functions
205 ===============================================================================
206 ##### Initialization and de-initialization functions #####
207 ===============================================================================
208 [..] This subsection provides a set of functions allowing to initialize and
209 de-initialiaze the SPIx peripheral:
211 (+) User must implement HAL_SPI_MspInit() function in which he configures
212 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
214 (+) Call the function HAL_SPI_Init() to configure the selected device with
215 the selected configuration:
219 (++) Clock Polarity and Phase
221 (++) BaudRate Prescaler
225 (++) CRC Polynomial if CRC enabled
227 (+) Call the function HAL_SPI_DeInit() to restore the default configuration
228 of the selected SPIx periperal.
235 * @brief Initializes the SPI according to the specified parameters
236 * in the SPI_InitTypeDef and create the associated handle.
237 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
238 * the configuration information for SPI module.
241 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
243 /* Check the SPI handle allocation */
249 /* Check the parameters */
250 assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
251 assert_param(IS_SPI_MODE(hspi->Init.Mode));
252 assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
253 assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
254 assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
255 assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
256 assert_param(IS_SPI_NSS(hspi->Init.NSS));
257 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
258 assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
259 assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
260 assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
261 assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
263 if(hspi->State == HAL_SPI_STATE_RESET)
265 /* Init the low level hardware : GPIO, CLOCK, NVIC... */
266 HAL_SPI_MspInit(hspi);
269 hspi->State = HAL_SPI_STATE_BUSY;
271 /* Disble the selected SPI peripheral */
272 __HAL_SPI_DISABLE(hspi);
274 /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
275 /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
276 Communication speed, First bit and CRC calculation state */
277 WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
278 hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
279 hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation) );
281 /* Configure : NSS management */
282 WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode));
284 /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
285 /* Configure : CRC Polynomial */
286 WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
288 /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
289 CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
291 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
292 hspi->State = HAL_SPI_STATE_READY;
298 * @brief DeInitializes the SPI peripheral
299 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
300 * the configuration information for SPI module.
303 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
305 /* Check the SPI handle allocation */
311 hspi->State = HAL_SPI_STATE_BUSY;
313 /* Disable the SPI Peripheral Clock */
314 __HAL_SPI_DISABLE(hspi);
316 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
317 HAL_SPI_MspDeInit(hspi);
319 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
320 hspi->State = HAL_SPI_STATE_RESET;
329 * @brief SPI MSP Init
330 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
331 * the configuration information for SPI module.
334 __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
336 /* NOTE : This function Should not be modified, when the callback is needed,
337 the HAL_SPI_MspInit could be implenetd in the user file
342 * @brief SPI MSP DeInit
343 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
344 * the configuration information for SPI module.
347 __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
349 /* NOTE : This function Should not be modified, when the callback is needed,
350 the HAL_SPI_MspDeInit could be implenetd in the user file
358 /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
359 * @brief Data transfers functions
362 ==============================================================================
363 ##### IO operation functions #####
364 ===============================================================================
365 This subsection provides a set of functions allowing to manage the SPI
368 [..] The SPI supports master and slave mode :
370 (#) There are two modes of transfer:
371 (++) Blocking mode: The communication is performed in polling mode.
372 The HAL status of all data processing is returned by the same function
373 after finishing transfer.
374 (++) No-Blocking mode: The communication is performed using Interrupts
375 or DMA, These APIs return the HAL status.
376 The end of the data processing will be indicated through the
377 dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
379 The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
380 will be executed respectivelly at the end of the transmit or Receive process
381 The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
383 (#) Blocking mode APIs are :
384 (++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
385 (++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
386 (++) HAL_SPI_TransmitReceive() in full duplex mode
388 (#) Non Blocking mode API's with Interrupt are :
389 (++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
390 (++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
391 (++) HAL_SPI_TransmitReceive_IT()in full duplex mode
392 (++) HAL_SPI_IRQHandler()
394 (#) Non Blocking mode functions with DMA are :
395 (++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
396 (++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
397 (++) HAL_SPI_TransmitReceive_DMA() in full duplex mode
399 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
400 (++) HAL_SPI_TxCpltCallback()
401 (++) HAL_SPI_RxCpltCallback()
402 (++) HAL_SPI_TxRxCpltCallback()
403 (++) HAL_SPI_TxHalfCpltCallback()
404 (++) HAL_SPI_RxHalfCpltCallback()
405 (++) HAL_SPI_TxRxHalfCpltCallback()
406 (++) HAL_SPI_ErrorCallback()
413 * @brief Transmit an amount of data in blocking mode
414 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
415 * the configuration information for SPI module.
416 * @param pData: pointer to data buffer
417 * @param Size: amount of data to be sent
418 * @param Timeout: Timeout duration
421 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
424 if(hspi->State == HAL_SPI_STATE_READY)
426 if((pData == NULL ) || (Size == 0))
431 /* Check the parameters */
432 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
437 /* Configure communication */
438 hspi->State = HAL_SPI_STATE_BUSY_TX;
439 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
441 hspi->pTxBuffPtr = pData;
442 hspi->TxXferSize = Size;
443 hspi->TxXferCount = Size;
445 /*Init field not used in handle to zero */
448 hspi->pRxBuffPtr = NULL;
449 hspi->RxXferSize = 0;
450 hspi->RxXferCount = 0;
452 /* Reset CRC Calculation */
453 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
458 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
460 /* Configure communication direction : 1Line */
464 /* Check if the SPI is already enabled */
465 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
467 /* Enable SPI peripheral */
468 __HAL_SPI_ENABLE(hspi);
471 /* Transmit data in 8 Bit mode */
472 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
474 if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01))
476 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
480 while(hspi->TxXferCount > 0)
482 /* Wait until TXE flag is set to send data */
483 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
487 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
490 /* Enable CRC Transmission */
491 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
493 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
496 /* Transmit data in 16 Bit mode */
499 if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
501 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
506 while(hspi->TxXferCount > 0)
508 /* Wait until TXE flag is set to send data */
509 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
513 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
517 /* Enable CRC Transmission */
518 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
520 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
524 /* Wait until TXE flag is set to send data */
525 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
527 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
531 /* Wait until Busy flag is reset before disabling SPI */
532 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
534 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
538 /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
539 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
541 __HAL_SPI_CLEAR_OVRFLAG(hspi);
544 hspi->State = HAL_SPI_STATE_READY;
546 /* Process Unlocked */
558 * @brief Receive an amount of data in blocking mode
559 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
560 * the configuration information for SPI module.
561 * @param pData: pointer to data buffer
562 * @param Size: amount of data to be sent
563 * @param Timeout: Timeout duration
566 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
568 __IO uint16_t tmpreg = 0;
570 if(hspi->State == HAL_SPI_STATE_READY)
572 if((pData == NULL ) || (Size == 0))
580 /* Configure communication */
581 hspi->State = HAL_SPI_STATE_BUSY_RX;
582 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
584 hspi->pRxBuffPtr = pData;
585 hspi->RxXferSize = Size;
586 hspi->RxXferCount = Size;
588 /*Init field not used in handle to zero */
591 hspi->pTxBuffPtr = NULL;
592 hspi->TxXferSize = 0;
593 hspi->TxXferCount = 0;
595 /* Configure communication direction : 1Line */
596 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
601 /* Reset CRC Calculation */
602 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
607 if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
609 /* Process Unlocked */
612 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
613 return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
616 /* Check if the SPI is already enabled */
617 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
619 /* Enable SPI peripheral */
620 __HAL_SPI_ENABLE(hspi);
623 /* Receive data in 8 Bit mode */
624 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
626 while(hspi->RxXferCount > 1)
628 /* Wait until RXNE flag is set */
629 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
634 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
637 /* Enable CRC Reception */
638 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
640 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
643 /* Receive data in 16 Bit mode */
646 while(hspi->RxXferCount > 1)
648 /* Wait until RXNE flag is set to read data */
649 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
654 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
658 /* Enable CRC Reception */
659 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
661 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
665 /* Wait until RXNE flag is set */
666 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
671 /* Receive last data in 8 Bit mode */
672 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
674 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
676 /* Receive last data in 16 Bit mode */
679 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
684 /* If CRC computation is enabled */
685 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
687 /* Wait until RXNE flag is set: CRC Received */
688 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
690 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
694 /* Read CRC to clear RXNE flag */
695 tmpreg = hspi->Instance->DR;
696 UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
699 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
701 /* Disable SPI peripheral */
702 __HAL_SPI_DISABLE(hspi);
705 hspi->State = HAL_SPI_STATE_READY;
707 /* Check if CRC error occurred */
708 if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
710 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
712 /* Reset CRC Calculation */
715 /* Process Unlocked */
721 /* Process Unlocked */
733 * @brief Transmit and Receive an amount of data in blocking mode
734 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
735 * the configuration information for SPI module.
736 * @param pTxData: pointer to transmission data buffer
737 * @param pRxData: pointer to reception data buffer to be
738 * @param Size: amount of data to be sent
739 * @param Timeout: Timeout duration
742 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
744 __IO uint16_t tmpreg = 0;
746 if((hspi->State == HAL_SPI_STATE_READY) || (hspi->State == HAL_SPI_STATE_BUSY_RX))
748 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
753 /* Check the parameters */
754 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
759 /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
760 if(hspi->State == HAL_SPI_STATE_READY)
762 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
765 /* Configure communication */
766 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
768 hspi->pRxBuffPtr = pRxData;
769 hspi->RxXferSize = Size;
770 hspi->RxXferCount = Size;
772 hspi->pTxBuffPtr = pTxData;
773 hspi->TxXferSize = Size;
774 hspi->TxXferCount = Size;
776 /*Init field not used in handle to zero */
780 /* Reset CRC Calculation */
781 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
786 /* Check if the SPI is already enabled */
787 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
789 /* Enable SPI peripheral */
790 __HAL_SPI_ENABLE(hspi);
793 /* Transmit and Receive data in 16 Bit mode */
794 if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
796 if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
798 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
802 if(hspi->TxXferCount == 0)
804 /* Enable CRC Transmission */
805 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
807 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
810 /* Wait until RXNE flag is set */
811 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
816 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
822 while(hspi->TxXferCount > 0)
824 /* Wait until TXE flag is set to send data */
825 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
830 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
834 /* Enable CRC Transmission */
835 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
837 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
840 /* Wait until RXNE flag is set */
841 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
846 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
850 /* Receive the last byte */
851 if(hspi->Init.Mode == SPI_MODE_SLAVE)
853 /* Wait until RXNE flag is set */
854 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
859 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
865 /* Transmit and Receive data in 8 Bit mode */
868 if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
870 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
873 if(hspi->TxXferCount == 0)
875 /* Enable CRC Transmission */
876 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
878 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
881 /* Wait until RXNE flag is set */
882 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
887 (*hspi->pRxBuffPtr) = hspi->Instance->DR;
892 while(hspi->TxXferCount > 0)
894 /* Wait until TXE flag is set to send data */
895 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
900 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
903 /* Enable CRC Transmission */
904 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
906 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
909 /* Wait until RXNE flag is set */
910 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
915 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
918 if(hspi->Init.Mode == SPI_MODE_SLAVE)
920 /* Wait until RXNE flag is set */
921 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
926 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
932 /* Read CRC from DR to close CRC calculation process */
933 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
935 /* Wait until RXNE flag is set */
936 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
938 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
942 tmpreg = hspi->Instance->DR;
943 UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
946 /* Wait until Busy flag is reset before disabling SPI */
947 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
949 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
953 hspi->State = HAL_SPI_STATE_READY;
955 /* Check if CRC error occurred */
956 if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
958 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
962 /* Process Unlocked */
968 /* Process Unlocked */
980 * @brief Transmit an amount of data in no-blocking mode with Interrupt
981 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
982 * the configuration information for SPI module.
983 * @param pData: pointer to data buffer
984 * @param Size: amount of data to be sent
987 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
989 if(hspi->State == HAL_SPI_STATE_READY)
991 if((pData == NULL) || (Size == 0))
996 /* Check the parameters */
997 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
1002 /* Configure communication */
1003 hspi->State = HAL_SPI_STATE_BUSY_TX;
1004 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1006 hspi->TxISR = &SPI_TxISR;
1007 hspi->pTxBuffPtr = pData;
1008 hspi->TxXferSize = Size;
1009 hspi->TxXferCount = Size;
1011 /*Init field not used in handle to zero */
1013 hspi->pRxBuffPtr = NULL;
1014 hspi->RxXferSize = 0;
1015 hspi->RxXferCount = 0;
1017 /* Configure communication direction : 1Line */
1018 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1023 /* Reset CRC Calculation */
1024 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1026 SPI_RESET_CRC(hspi);
1029 if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
1031 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
1035 /* Enable TXE and ERR interrupt */
1036 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
1038 /* Process Unlocked */
1041 /* Check if the SPI is already enabled */
1042 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1044 /* Enable SPI peripheral */
1045 __HAL_SPI_ENABLE(hspi);
1057 * @brief Receive an amount of data in no-blocking mode with Interrupt
1058 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1059 * the configuration information for SPI module.
1060 * @param pData: pointer to data buffer
1061 * @param Size: amount of data to be sent
1062 * @retval HAL status
1064 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1066 if(hspi->State == HAL_SPI_STATE_READY)
1068 if((pData == NULL) || (Size == 0))
1073 /* Process Locked */
1076 /* Configure communication */
1077 hspi->State = HAL_SPI_STATE_BUSY_RX;
1078 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1080 hspi->RxISR = &SPI_RxISR;
1081 hspi->pRxBuffPtr = pData;
1082 hspi->RxXferSize = Size;
1083 hspi->RxXferCount = Size ;
1085 /*Init field not used in handle to zero */
1087 hspi->pTxBuffPtr = NULL;
1088 hspi->TxXferSize = 0;
1089 hspi->TxXferCount = 0;
1091 /* Configure communication direction : 1Line */
1092 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1096 else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
1098 /* Process Unlocked */
1101 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
1102 return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
1105 /* Reset CRC Calculation */
1106 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1108 SPI_RESET_CRC(hspi);
1111 /* Enable TXE and ERR interrupt */
1112 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
1114 /* Process Unlocked */
1117 /* Note : The SPI must be enabled after unlocking current process
1118 to avoid the risk of SPI interrupt handle execution before current
1121 /* Check if the SPI is already enabled */
1122 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1124 /* Enable SPI peripheral */
1125 __HAL_SPI_ENABLE(hspi);
1137 * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
1138 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1139 * the configuration information for SPI module.
1140 * @param pTxData: pointer to transmission data buffer
1141 * @param pRxData: pointer to reception data buffer to be
1142 * @param Size: amount of data to be sent
1143 * @retval HAL status
1145 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
1148 if((hspi->State == HAL_SPI_STATE_READY) || \
1149 ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
1151 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
1156 /* Check the parameters */
1157 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
1159 /* Process locked */
1162 /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
1163 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
1165 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
1168 /* Configure communication */
1169 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1171 hspi->TxISR = &SPI_TxISR;
1172 hspi->pTxBuffPtr = pTxData;
1173 hspi->TxXferSize = Size;
1174 hspi->TxXferCount = Size;
1176 hspi->RxISR = &SPI_2LinesRxISR;
1177 hspi->pRxBuffPtr = pRxData;
1178 hspi->RxXferSize = Size;
1179 hspi->RxXferCount = Size;
1181 /* Reset CRC Calculation */
1182 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1184 SPI_RESET_CRC(hspi);
1187 /* Enable TXE, RXNE and ERR interrupt */
1188 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
1190 /* Process Unlocked */
1193 /* Check if the SPI is already enabled */
1194 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1196 /* Enable SPI peripheral */
1197 __HAL_SPI_ENABLE(hspi);
1209 * @brief Transmit an amount of data in no-blocking mode with DMA
1210 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1211 * the configuration information for SPI module.
1212 * @param pData: pointer to data buffer
1213 * @param Size: amount of data to be sent
1214 * @retval HAL status
1216 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1218 if(hspi->State == HAL_SPI_STATE_READY)
1220 if((pData == NULL) || (Size == 0))
1222 /* Process Unlocked */
1227 /* Check the parameters */
1228 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
1230 /* Process Locked */
1233 /* Configure communication */
1234 hspi->State = HAL_SPI_STATE_BUSY_TX;
1235 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1237 hspi->pTxBuffPtr = (uint8_t*)pData;
1238 hspi->TxXferSize = Size;
1239 hspi->TxXferCount = Size;
1241 /*Init field not used in handle to zero */
1245 hspi->pRxBuffPtr = NULL;
1246 hspi->RxXferSize = 0;
1247 hspi->RxXferCount = 0;
1249 /* Configure communication direction : 1Line */
1250 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1255 /* Reset CRC Calculation */
1256 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1258 SPI_RESET_CRC(hspi);
1261 /* Set the SPI TxDMA Half transfer complete callback */
1262 hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
1264 /* Set the SPI TxDMA transfer complete callback */
1265 hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
1267 /* Set the DMA error callback */
1268 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
1270 /* Reset content of SPI RxDMA descriptor */
1271 hspi->hdmarx->XferHalfCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
1272 hspi->hdmarx->XferCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
1273 hspi->hdmarx->XferErrorCallback = (void (*)(DMA_HandleTypeDef *))NULL;
1275 /* Enable the Tx DMA Channel */
1276 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
1278 /* Enable Tx DMA Request */
1279 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1281 /* Process Unlocked */
1284 /* Check if the SPI is already enabled */
1285 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1287 /* Enable SPI peripheral */
1288 __HAL_SPI_ENABLE(hspi);
1295 /* Process Unlocked */
1302 * @brief Receive an amount of data in no-blocking mode with DMA
1303 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1304 * the configuration information for SPI module.
1305 * @param pData: pointer to data buffer
1306 * @note When the CRC feature is enabled the pData Length must be Size + 1.
1307 * @param Size: amount of data to be sent
1308 * @retval HAL status
1310 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1312 if(hspi->State == HAL_SPI_STATE_READY)
1314 if((pData == NULL) || (Size == 0))
1316 /* Process Unlocked */
1321 /* Process Locked */
1324 /* Configure communication */
1325 hspi->State = HAL_SPI_STATE_BUSY_RX;
1326 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1328 hspi->pRxBuffPtr = (uint8_t*)pData;
1329 hspi->RxXferSize = Size;
1330 hspi->RxXferCount = Size;
1332 /*Init field not used in handle to zero */
1336 hspi->pTxBuffPtr = NULL;
1337 hspi->TxXferSize = 0;
1338 hspi->TxXferCount = 0;
1340 /* Configure communication direction : 1Line */
1341 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1345 else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
1347 /* Process Unlocked */
1350 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
1351 return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
1354 /* Reset CRC Calculation */
1355 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1357 SPI_RESET_CRC(hspi);
1360 /* Set the SPI RxDMA Half transfer complete callback */
1361 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
1363 /* Set the SPI Rx DMA transfer complete callback */
1364 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
1366 /* Set the DMA error callback */
1367 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
1369 /* Reset content of SPI TxDMA descriptor */
1370 hspi->hdmatx->XferHalfCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
1371 hspi->hdmatx->XferCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
1372 hspi->hdmatx->XferErrorCallback = (void (*)(DMA_HandleTypeDef *))NULL;
1374 /* Enable the Rx DMA Channel */
1375 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
1377 /* Enable Rx DMA Request */
1378 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1380 /* Process Unlocked */
1383 /* Check if the SPI is already enabled */
1384 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1386 /* Enable SPI peripheral */
1387 __HAL_SPI_ENABLE(hspi);
1394 /* Process Unlocked */
1401 * @brief Transmit and Receive an amount of data in no-blocking mode with DMA
1402 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1403 * the configuration information for SPI module.
1404 * @param pTxData: pointer to transmission data buffer
1405 * @param pRxData: pointer to reception data buffer
1406 * @note When the CRC feature is enabled the pRxData Length must be Size + 1
1407 * @param Size: amount of data to be sent
1408 * @retval HAL status
1410 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
1412 if((hspi->State == HAL_SPI_STATE_READY) || \
1413 ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
1415 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
1420 /* Check the parameters */
1421 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
1423 /* Process locked */
1426 /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
1427 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
1429 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
1432 /* Configure communication */
1433 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1435 hspi->pTxBuffPtr = (uint8_t*)pTxData;
1436 hspi->TxXferSize = Size;
1437 hspi->TxXferCount = Size;
1439 hspi->pRxBuffPtr = (uint8_t*)pRxData;
1440 hspi->RxXferSize = Size;
1441 hspi->RxXferCount = Size;
1443 /*Init field not used in handle to zero */
1447 /* Reset CRC Calculation */
1448 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1450 SPI_RESET_CRC(hspi);
1453 /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
1454 if(hspi->State == HAL_SPI_STATE_BUSY_RX)
1456 /* Set the SPI Rx DMA Half transfer complete callback */
1457 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
1459 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
1463 /* Set the SPI Tx/Rx DMA Half transfer complete callback */
1464 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
1466 hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
1469 /* Set the DMA error callback */
1470 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
1472 /* Enable the Rx DMA Channel */
1473 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
1475 /* Enable Rx DMA Request */
1476 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1478 /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
1479 is performed in DMA reception complete callback */
1480 hspi->hdmatx->XferHalfCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
1481 hspi->hdmatx->XferCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
1483 /* Set the DMA error callback */
1484 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
1486 /* Enable the Tx DMA Channel */
1487 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
1489 /* Check if the SPI is already enabled */
1490 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
1492 /* Enable SPI peripheral */
1493 __HAL_SPI_ENABLE(hspi);
1496 /* Enable Tx DMA Request */
1497 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1499 /* Process Unlocked */
1512 * @brief Pauses the DMA Transfer.
1513 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1514 * the configuration information for the specified SPI module.
1515 * @retval HAL status
1517 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
1519 /* Process Locked */
1522 /* Disable the SPI DMA Tx & Rx requests */
1523 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1524 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1526 /* Process Unlocked */
1533 * @brief Resumes the DMA Transfer.
1534 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1535 * the configuration information for the specified SPI module.
1536 * @retval HAL status
1538 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
1540 /* Process Locked */
1543 /* Enable the SPI DMA Tx & Rx requests */
1544 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1545 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1547 /* Process Unlocked */
1554 * @brief Stops the DMA Transfer.
1555 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1556 * the configuration information for the specified SPI module.
1557 * @retval HAL status
1559 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
1561 /* The Lock is not implemented on this API to allow the user application
1562 to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
1563 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
1564 and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
1567 /* Abort the SPI DMA tx Channel */
1568 if(hspi->hdmatx != NULL)
1570 HAL_DMA_Abort(hspi->hdmatx);
1572 /* Abort the SPI DMA rx Channel */
1573 if(hspi->hdmarx != NULL)
1575 HAL_DMA_Abort(hspi->hdmarx);
1578 /* Disable the SPI DMA Tx & Rx requests */
1579 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1580 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1582 hspi->State = HAL_SPI_STATE_READY;
1588 * @brief This function handles SPI interrupt request.
1589 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1590 * the configuration information for SPI module.
1591 * @retval HAL status
1593 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
1595 /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
1596 if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
1602 /* SPI in mode Tramitter ---------------------------------------------------*/
1603 if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
1609 if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
1611 /* SPI CRC error interrupt occurred ---------------------------------------*/
1612 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
1614 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
1615 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
1617 /* SPI Mode Fault error interrupt occurred --------------------------------*/
1618 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
1620 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
1621 __HAL_SPI_CLEAR_MODFFLAG(hspi);
1624 /* SPI Overrun error interrupt occurred -----------------------------------*/
1625 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
1627 if(hspi->State != HAL_SPI_STATE_BUSY_TX)
1629 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
1630 __HAL_SPI_CLEAR_OVRFLAG(hspi);
1634 /* SPI Frame error interrupt occurred -------------------------------------*/
1635 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
1637 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
1638 __HAL_SPI_CLEAR_FREFLAG(hspi);
1641 /* Call the Error call Back in case of Errors */
1642 if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
1644 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
1645 hspi->State = HAL_SPI_STATE_READY;
1646 HAL_SPI_ErrorCallback(hspi);
1652 * @brief Tx Transfer completed callbacks
1653 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1654 * the configuration information for SPI module.
1657 __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
1659 /* NOTE : This function Should not be modified, when the callback is needed,
1660 the HAL_SPI_TxCpltCallback could be implenetd in the user file
1665 * @brief Rx Transfer completed callbacks
1666 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1667 * the configuration information for SPI module.
1670 __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
1672 /* NOTE : This function Should not be modified, when the callback is needed,
1673 the HAL_SPI_RxCpltCallback() could be implenetd in the user file
1678 * @brief Tx and Rx Transfer completed callbacks
1679 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1680 * the configuration information for SPI module.
1683 __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
1685 /* NOTE : This function Should not be modified, when the callback is needed,
1686 the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
1691 * @brief Tx Half Transfer completed callbacks
1692 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1693 * the configuration information for SPI module.
1696 __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
1698 /* NOTE : This function Should not be modified, when the callback is needed,
1699 the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
1704 * @brief Rx Half Transfer completed callbacks
1705 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1706 * the configuration information for SPI module.
1709 __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
1711 /* NOTE : This function Should not be modified, when the callback is needed,
1712 the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
1717 * @brief Tx and Rx Transfer completed callbacks
1718 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1719 * the configuration information for SPI module.
1722 __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
1724 /* NOTE : This function Should not be modified, when the callback is needed,
1725 the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
1730 * @brief SPI error callbacks
1731 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1732 * the configuration information for SPI module.
1735 __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
1737 /* NOTE : - This function Should not be modified, when the callback is needed,
1738 the HAL_SPI_ErrorCallback() could be implenetd in the user file.
1739 - The ErrorCode parameter in the hspi handle is updated by the SPI processes
1740 and user can use HAL_SPI_GetError() API to check the latest error occurred.
1748 /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
1749 * @brief SPI control functions
1752 ===============================================================================
1753 ##### Peripheral State and Errors functions #####
1754 ===============================================================================
1756 This subsection provides a set of functions allowing to control the SPI.
1757 (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
1758 (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
1764 * @brief Return the SPI state
1765 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1766 * the configuration information for SPI module.
1769 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
1775 * @brief Return the SPI error code
1776 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1777 * the configuration information for SPI module.
1778 * @retval SPI Error Code
1780 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
1782 return hspi->ErrorCode;
1795 /** @addtogroup SPI_Private_Functions
1801 * @brief Interrupt Handler to close Tx transfer
1802 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1803 * the configuration information for SPI module.
1806 static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
1808 /* Wait until TXE flag is set to send data */
1809 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
1811 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1814 /* Disable TXE interrupt */
1815 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE));
1817 /* Disable ERR interrupt if Receive process is finished */
1818 if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
1820 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
1822 /* Wait until Busy flag is reset before disabling SPI */
1823 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
1825 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1828 /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
1829 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
1831 __HAL_SPI_CLEAR_OVRFLAG(hspi);
1834 /* Check if Errors has been detected during transfer */
1835 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
1837 /* Check if we are in Tx or in Rx/Tx Mode */
1838 if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
1840 /* Set state to READY before run the Callback Complete */
1841 hspi->State = HAL_SPI_STATE_READY;
1842 HAL_SPI_TxRxCpltCallback(hspi);
1846 /* Set state to READY before run the Callback Complete */
1847 hspi->State = HAL_SPI_STATE_READY;
1848 HAL_SPI_TxCpltCallback(hspi);
1853 /* Set state to READY before run the Callback Complete */
1854 hspi->State = HAL_SPI_STATE_READY;
1855 /* Call Error call back in case of Error */
1856 HAL_SPI_ErrorCallback(hspi);
1862 * @brief Interrupt Handler to transmit amount of data in no-blocking mode
1863 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1864 * the configuration information for SPI module.
1867 static void SPI_TxISR(SPI_HandleTypeDef *hspi)
1869 /* Transmit data in 8 Bit mode */
1870 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
1872 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
1874 /* Transmit data in 16 Bit mode */
1877 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
1878 hspi->pTxBuffPtr+=2;
1880 hspi->TxXferCount--;
1882 if(hspi->TxXferCount == 0)
1884 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1886 /* calculate and transfer CRC on Tx line */
1887 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
1889 SPI_TxCloseIRQHandler(hspi);
1894 * @brief Interrupt Handler to close Rx transfer
1895 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1896 * the configuration information for SPI module.
1899 static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi)
1901 __IO uint16_t tmpreg = 0;
1903 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1905 /* Wait until RXNE flag is set to read CRC data */
1906 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
1908 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1911 /* Read CRC to reset RXNE flag */
1912 tmpreg = hspi->Instance->DR;
1913 UNUSED(tmpreg); /* avoid warning on tmpreg affectation with some compiler */
1915 /* Wait until RXNE flag is reset */
1916 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
1918 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1921 /* Check if CRC error occurred */
1922 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
1924 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
1926 /* Reset CRC Calculation */
1927 SPI_RESET_CRC(hspi);
1931 /* Disable RXNE interrupt */
1932 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
1934 /* if Transmit process is finished */
1935 if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
1937 /* Disable ERR interrupt */
1938 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
1940 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
1942 /* Disable SPI peripheral */
1943 __HAL_SPI_DISABLE(hspi);
1946 /* Check if Errors has been detected during transfer */
1947 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
1949 /* Check if we are in Rx or in Rx/Tx Mode */
1950 if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
1952 /* Set state to READY before run the Callback Complete */
1953 hspi->State = HAL_SPI_STATE_READY;
1954 HAL_SPI_TxRxCpltCallback(hspi);
1958 /* Set state to READY before run the Callback Complete */
1959 hspi->State = HAL_SPI_STATE_READY;
1960 HAL_SPI_RxCpltCallback(hspi);
1965 /* Set state to READY before run the Callback Complete */
1966 hspi->State = HAL_SPI_STATE_READY;
1967 /* Call Error call back in case of Error */
1968 HAL_SPI_ErrorCallback(hspi);
1974 * @brief Interrupt Handler to receive amount of data in 2Lines mode
1975 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1976 * the configuration information for SPI module.
1979 static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi)
1981 /* Receive data in 8 Bit mode */
1982 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
1984 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
1986 /* Receive data in 16 Bit mode */
1989 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
1990 hspi->pRxBuffPtr+=2;
1992 hspi->RxXferCount--;
1994 if(hspi->RxXferCount==0)
1996 SPI_RxCloseIRQHandler(hspi);
2001 * @brief Interrupt Handler to receive amount of data in no-blocking mode
2002 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2003 * the configuration information for SPI module.
2006 static void SPI_RxISR(SPI_HandleTypeDef *hspi)
2008 /* Receive data in 8 Bit mode */
2009 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
2011 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
2013 /* Receive data in 16 Bit mode */
2016 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
2017 hspi->pRxBuffPtr+=2;
2019 hspi->RxXferCount--;
2021 /* Enable CRC Transmission */
2022 if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
2024 /* Set CRC Next to calculate CRC on Rx side */
2025 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
2028 if(hspi->RxXferCount == 0)
2030 SPI_RxCloseIRQHandler(hspi);
2035 * @brief DMA SPI transmit process complete callback
2036 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2037 * the configuration information for the specified DMA module.
2040 static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
2042 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2045 /* DMA Normal Mode */
2046 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
2048 /* Wait until TXE flag is set to send data */
2049 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
2051 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2054 /* Disable Tx DMA Request */
2055 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
2057 /* Wait until Busy flag is reset before disabling SPI */
2058 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
2060 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2063 hspi->TxXferCount = 0;
2064 hspi->State = HAL_SPI_STATE_READY;
2067 /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
2068 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
2070 __HAL_SPI_CLEAR_OVRFLAG(hspi);
2073 /* Check if Errors has been detected during transfer */
2074 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
2076 HAL_SPI_ErrorCallback(hspi);
2080 HAL_SPI_TxCpltCallback(hspi);
2085 * @brief DMA SPI receive process complete callback
2086 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2087 * the configuration information for the specified DMA module.
2090 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
2092 __IO uint16_t tmpreg = 0;
2094 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2096 /* DMA Normal mode */
2097 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
2099 /* Disable Rx DMA Request */
2100 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
2102 /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
2103 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
2105 /* CRC Calculation handling */
2106 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
2108 /* Wait until RXNE flag is set (CRC ready) */
2109 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
2111 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2115 tmpreg = hspi->Instance->DR;
2116 UNUSED(tmpreg); /* avoid warning on tmpreg affectation with some compiler */
2118 /* Wait until RXNE flag is reset */
2119 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
2121 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2124 /* Check if CRC error occurred */
2125 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
2127 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
2128 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
2132 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
2134 /* Disable SPI peripheral */
2135 __HAL_SPI_DISABLE(hspi);
2138 hspi->RxXferCount = 0;
2139 hspi->State = HAL_SPI_STATE_READY;
2141 /* Check if Errors has been detected during transfer */
2142 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
2144 HAL_SPI_ErrorCallback(hspi);
2148 HAL_SPI_RxCpltCallback(hspi);
2153 HAL_SPI_RxCpltCallback(hspi);
2158 * @brief DMA SPI transmit receive process complete callback
2159 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2160 * the configuration information for the specified DMA module.
2163 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
2165 __IO uint16_t tmpreg = 0;
2167 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2168 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
2170 /* CRC Calculation handling */
2171 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
2173 /* Check if CRC is done on going (RXNE flag set) */
2174 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
2176 /* Wait until RXNE flag is set to send data */
2177 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
2179 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2183 tmpreg = hspi->Instance->DR;
2184 UNUSED(tmpreg); /* avoid warning on tmpreg affectation with some compiler */
2186 /* Check if CRC error occurred */
2187 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
2189 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
2190 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
2194 /* Wait until TXE flag is set to send data */
2195 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
2197 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2200 /* Disable Tx DMA Request */
2201 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
2203 /* Wait until Busy flag is reset before disabling SPI */
2204 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
2206 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2209 /* Disable Rx DMA Request */
2210 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
2212 hspi->TxXferCount = 0;
2213 hspi->RxXferCount = 0;
2215 hspi->State = HAL_SPI_STATE_READY;
2217 /* Check if Errors has been detected during transfer */
2218 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
2220 HAL_SPI_ErrorCallback(hspi);
2224 HAL_SPI_TxRxCpltCallback(hspi);
2229 HAL_SPI_TxRxCpltCallback(hspi);
2234 * @brief DMA SPI half transmit process complete callback
2235 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2236 * the configuration information for the specified DMA module.
2239 static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
2241 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2243 HAL_SPI_TxHalfCpltCallback(hspi);
2247 * @brief DMA SPI half receive process complete callback
2248 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2249 * the configuration information for the specified DMA module.
2252 static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
2254 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2256 HAL_SPI_RxHalfCpltCallback(hspi);
2260 * @brief DMA SPI Half transmit receive process complete callback
2261 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2262 * the configuration information for the specified DMA module.
2265 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
2267 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2269 HAL_SPI_TxRxHalfCpltCallback(hspi);
2273 * @brief DMA SPI communication error callback
2274 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2275 * the configuration information for the specified DMA module.
2278 static void SPI_DMAError(DMA_HandleTypeDef *hdma)
2280 SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2281 hspi->TxXferCount = 0;
2282 hspi->RxXferCount = 0;
2283 hspi->State= HAL_SPI_STATE_READY;
2284 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
2285 HAL_SPI_ErrorCallback(hspi);
2289 * @brief This function handles SPI Communication Timeout.
2290 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2291 * the configuration information for SPI module.
2292 * @param Flag: SPI flag to check
2293 * @param Status: Flag status to check: RESET or set
2294 * @param Timeout: Timeout duration
2295 * @retval HAL status
2297 static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
2299 uint32_t tickstart = 0;
2302 tickstart = HAL_GetTick();
2304 /* Wait until flag is set */
2307 while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
2309 if(Timeout != HAL_MAX_DELAY)
2311 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
2313 /* Disable the SPI and reset the CRC: the CRC value should be cleared
2314 on both master and slave sides in order to resynchronize the master
2315 and slave for their respective CRC calculation */
2317 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
2318 __HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
2320 /* Disable SPI peripheral */
2321 __HAL_SPI_DISABLE(hspi);
2323 /* Reset CRC Calculation */
2324 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
2326 SPI_RESET_CRC(hspi);
2329 hspi->State= HAL_SPI_STATE_READY;
2331 /* Process Unlocked */
2341 while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
2343 if(Timeout != HAL_MAX_DELAY)
2345 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
2347 /* Disable the SPI and reset the CRC: the CRC value should be cleared
2348 on both master and slave sides in order to resynchronize the master
2349 and slave for their respective CRC calculation */
2351 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
2352 __HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
2354 /* Disable SPI peripheral */
2355 __HAL_SPI_DISABLE(hspi);
2357 /* Reset CRC Calculation */
2358 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
2360 SPI_RESET_CRC(hspi);
2363 hspi->State= HAL_SPI_STATE_READY;
2365 /* Process Unlocked */
2379 #endif /* HAL_SPI_MODULE_ENABLED */
2388 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/