2 ******************************************************************************
3 * @file stm32l1xx_hal_adc.c
4 * @author MCD Application conversion
6 * @date 5-September-2014
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Analog to Digital Convertor (ADC)
10 * + Initialization and de-initialization functions
11 * ++ Initialization and Configuration of ADC
12 * + Operation functions
13 * ++ Start, stop, get result of conversions of regular
14 * group, using 3 possible modes: polling, interruption or DMA.
16 * ++ Analog Watchdog configuration
17 * ++ Channels configuration on regular group
19 * ++ ADC state machine management
20 * ++ Interrupts and flags management
21 * Other functions (extended functions) are available in file
22 * "stm32l1xx_hal_adc_ex.c".
25 ==============================================================================
26 ##### ADC specific features #####
27 ==============================================================================
29 (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
31 (#) Interrupt generation at the end of regular conversion, end of injected
32 conversion, and in case of analog watchdog or overrun events.
34 (#) Single and continuous conversion modes.
36 (#) Scan mode for automatic conversion of channel 0 to channel 'n'.
38 (#) Data alignment with in-built data coherency.
40 (#) Channel-wise programmable sampling time.
42 (#) ADC conversion Regular or Injected groups.
44 (#) External trigger (timer or EXTI) with configurable polarity for both
45 regular and injected groups.
47 (#) DMA request generation for transfer of conversions data of regular group.
51 (#) ADC offset on injected channels
53 (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
56 (#) ADC input range: from Vref
\96 (connected to Vssa) to Vref+ (connected to
57 Vdda or to an external voltage reference).
60 ##### How to use this driver #####
61 ==============================================================================
64 (#) Enable the ADC interface
65 As prerequisite, ADC clock must be configured at RCC top level.
66 Two clocks settings are mandatory:
67 - ADC clock (core clock):
69 Into HAL_ADC_MspInit() (recommended code location):
72 - ADC clock (conversions clock):
73 Only one possible clock source: derived from HSI RC 16MHz oscillator
76 Into HAL_ADC_MspInit() or with main setting of RCC:
77 RCC_OscInitTypeDef RCC_OscInitStructure;
78 HAL_RCC_GetOscConfig(&RCC_OscInitStructure);
79 RCC_OscInitStructure.OscillatorType = (... | RCC_OSCILLATORTYPE_HSI);
80 RCC_OscInitStructure.HSIState = RCC_HSI_ON;
81 RCC_OscInitStructure.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
82 RCC_OscInitStructure.PLL.PLLState = RCC_PLL_NONE;
83 RCC_OscInitStructure.PLL.PLLSource = ...
84 RCC_OscInitStructure.PLL...
85 HAL_RCC_OscConfig(&RCC_OscInitStructure);
87 Note: ADC is connected directly to HSI RC 16MHz oscillator.
88 Therefore, RCC PLL setting has no impact on ADC.
89 PLL can be disabled (".PLL.PLLState = RCC_PLL_NONE") or
90 enabled with HSI16 as clock source
91 (".PLL.PLLSource = RCC_PLLSOURCE_HSI") to be used as device
92 main clock source SYSCLK.
93 The only mandatory setting is ".HSIState = RCC_HSI_ON"
95 Note: ADC clock prescaler is configured at ADC level with
96 parameter "ClockPrescaler" using function HAL_ADC_Init().
98 (#) ADC pins configuration
99 (++) Enable the clock for the ADC GPIOs using the following function:
100 __GPIOx_CLK_ENABLE();
101 (++) Configure these ADC pins in analog mode using HAL_GPIO_Init();
103 (#) Configure the ADC parameters (conversion resolution, data alignment,
104 continuous mode, ...) using the HAL_ADC_Init() function.
106 (#) Activate the ADC peripheral using one of the start functions:
107 HAL_ADC_Start(), HAL_ADC_Start_IT(), HAL_ADC_Start_DMA().
109 *** Channels configuration to regular group ***
110 ================================================
112 (+) To configure the ADC regular group features, use
113 HAL_ADC_Init() and HAL_ADC_ConfigChannel() functions.
114 (+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
116 *** DMA for regular group configuration ***
117 ===========================================
119 (+) To enable the DMA mode for regular group, use the
120 HAL_ADC_Start_DMA() function.
121 (+) To enable the generation of DMA requests continuously at the end of
122 the last DMA transfer, use the HAL_ADC_Init() function.
125 ******************************************************************************
128 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
130 * Redistribution and use in source and binary forms, with or without modification,
131 * are permitted provided that the following conditions are met:
132 * 1. Redistributions of source code must retain the above copyright notice,
133 * this list of conditions and the following disclaimer.
134 * 2. Redistributions in binary form must reproduce the above copyright notice,
135 * this list of conditions and the following disclaimer in the documentation
136 * and/or other materials provided with the distribution.
137 * 3. Neither the name of STMicroelectronics nor the names of its contributors
138 * may be used to endorse or promote products derived from this software
139 * without specific prior written permission.
141 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
142 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
143 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
144 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
145 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
146 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
147 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
148 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
149 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
150 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
152 ******************************************************************************
155 /* Includes ------------------------------------------------------------------*/
156 #include "stm32l1xx_hal.h"
158 /** @addtogroup STM32L1xx_HAL_Driver
162 /** @defgroup ADC ADC
163 * @brief ADC HAL module driver
167 #ifdef HAL_ADC_MODULE_ENABLED
169 /* Private typedef -----------------------------------------------------------*/
170 /* Private define ------------------------------------------------------------*/
171 /** @defgroup ADC_Private_Constants ADC Private Constants
175 /* Fixed timeout values for ADC calibration, enable settling time. */
176 /* Values defined to be higher than worst cases: low clocks freq, */
177 /* maximum prescaler. */
178 /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */
179 /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */
181 #define ADC_ENABLE_TIMEOUT ((uint32_t) 2)
182 #define ADC_DISABLE_TIMEOUT ((uint32_t) 2)
184 /* Delay for ADC stabilization time. */
185 /* Maximum delay is 3.5us (refer to device datasheet, parameter tSTAB). */
186 /* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 32MHz to */
187 /* have the minimum number of CPU cycles to fulfill this delay. */
188 #define ADC_STAB_DELAY_CPU_CYCLES ((uint32_t)112)
193 /* Private macro -------------------------------------------------------------*/
194 /* Private variables ---------------------------------------------------------*/
195 /* Private function prototypes -----------------------------------------------*/
196 /** @defgroup ADC_Private_Functions ADC Private Functions
199 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
200 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
201 static void ADC_DMAError(DMA_HandleTypeDef *hdma);
206 /* Exported functions ---------------------------------------------------------*/
208 /** @defgroup ADC_Exported_Functions ADC Exported Functions
212 /** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions
213 * @brief Initialization and Configuration functions
216 ===============================================================================
217 ##### Initialization and de-initialization functions #####
218 ===============================================================================
219 [..] This section provides functions allowing to:
220 (+) Initialize and configure the ADC.
221 (+) De-initialize the ADC
227 * @brief Initializes the ADC peripheral and regular group according to
228 * parameters specified in structure "ADC_InitTypeDef".
229 * @note As prerequisite, ADC clock must be configured at RCC top level
230 * (clock source APB2).
231 * See commented example code below that can be copied and uncommented
232 * into HAL_ADC_MspInit().
233 * @note Possibility to update parameters on the fly:
234 * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
235 * coming from ADC state reset. Following calls to this function can
236 * be used to reconfigure some parameters of ADC_InitTypeDef
237 * structure on the fly, without modifying MSP configuration. If ADC
238 * MSP has to be modified again, HAL_ADC_DeInit() must be called
239 * before HAL_ADC_Init().
240 * The setting of these parameters is conditioned to ADC state.
241 * For parameters constraints, see comments of structure
243 * @note This function configures the ADC within 2 scopes: scope of entire
244 * ADC and scope of regular group. For parameters details, see comments
245 * of structure "ADC_InitTypeDef".
246 * @param hadc: ADC handle
249 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
251 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
252 uint32_t tmp_cr1 = 0;
253 uint32_t tmp_cr2 = 0;
255 /* Check ADC handle */
261 /* Check the parameters */
262 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
263 assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
264 assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
265 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
266 assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
267 assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
268 assert_param(IS_ADC_AUTOWAIT(hadc->Init.LowPowerAutoWait));
269 assert_param(IS_ADC_AUTOPOWEROFF(hadc->Init.LowPowerAutoPowerOff));
270 assert_param(IS_ADC_CHANNELSBANK(hadc->Init.ChannelsBank));
271 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
272 assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
273 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
275 if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
277 assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
278 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
279 assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));
282 if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
284 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
288 /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
289 /* at RCC top level. */
290 /* Refer to header of this file for more details on clock enabling */
293 /* Actions performed only if ADC is coming from state reset: */
294 /* - Initialization of ADC MSP */
295 if (hadc->State == HAL_ADC_STATE_RESET)
297 /* Enable SYSCFG clock to control the routing Interface (RI) */
298 __SYSCFG_CLK_ENABLE();
300 /* Init the low level hardware */
301 HAL_ADC_MspInit(hadc);
304 /* Configuration of ADC parameters if previous preliminary actions are */
305 /* correctly completed. */
306 if (tmpHALStatus != HAL_ERROR)
308 /* Initialize the ADC state */
309 hadc->State = HAL_ADC_STATE_BUSY;
311 /* Set ADC parameters */
313 /* Configuration of common ADC clock: clock source HSI with selectable */
315 MODIFY_REG(ADC->CCR ,
317 hadc->Init.ClockPrescaler );
319 /* Configuration of ADC: */
320 /* - external trigger polarity */
321 /* - End of conversion selection */
322 /* - DMA continuous request */
323 /* - Channels bank (Banks availability depends on devices categories) */
324 /* - continuous conversion mode */
325 tmp_cr2 |= (hadc->Init.DataAlign |
326 hadc->Init.EOCSelection |
327 __ADC_CR2_DMACONTREQ(hadc->Init.DMAContinuousRequests) |
328 hadc->Init.ChannelsBank |
329 __ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode) );
331 /* Enable external trigger if trigger selection is different of software */
333 /* Note: This configuration keeps the hardware feature of parameter */
334 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
335 /* software start. */
336 if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
338 tmp_cr2 |= ( hadc->Init.ExternalTrigConv |
339 hadc->Init.ExternalTrigConvEdge );
342 /* Parameters update conditioned to ADC state: */
343 /* Parameters that can be updated only when ADC is disabled: */
344 /* - delay selection (LowPowerAutoWait mode) */
346 /* - auto power off (LowPowerAutoPowerOff mode) */
348 /* - discontinuous mode disable/enable */
349 /* - discontinuous mode number of conversions */
350 if ((__HAL_ADC_IS_ENABLED(hadc) == RESET))
352 tmp_cr2 |= hadc->Init.LowPowerAutoWait;
354 tmp_cr1 |= (hadc->Init.Resolution |
355 hadc->Init.LowPowerAutoPowerOff |
356 __ADC_CR1_SCAN(hadc->Init.ScanConvMode) );
358 /* Enable discontinuous mode only if continuous mode is disabled */
359 if ((hadc->Init.DiscontinuousConvMode == ENABLE) &&
360 (hadc->Init.ContinuousConvMode == DISABLE) )
362 /* Enable discontinuous mode of regular group */
363 /* Set the number of channels to be converted in discontinuous mode */
364 tmp_cr1 |= ((ADC_CR1_DISCEN) |
365 __ADC_CR1_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion));
368 /* Update ADC configuration register CR1 with previous settings */
369 MODIFY_REG(hadc->Instance->CR1,
379 /* Update ADC configuration register CR2 with previous settings */
380 MODIFY_REG(hadc->Instance->CR2 ,
381 __ADC_CR2_MASK_ADCINIT() ,
384 /* Configuration of regular group sequencer: */
385 /* - if scan mode is disabled, regular channels sequence length is set to */
386 /* 0x00: 1 channel converted (channel on regular rank 1) */
387 /* Parameter "NbrOfConversion" is discarded. */
388 /* Note: Scan mode is present by hardware on this device and, if */
389 /* disabled, discards automatically nb of conversions. Anyway, nb of */
390 /* conversions is forced to 0x00 for alignment over all STM32 devices. */
391 /* - if scan mode is enabled, regular channels sequence length is set to */
392 /* parameter "NbrOfConversion" */
393 if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE)
395 MODIFY_REG(hadc->Instance->SQR1 ,
397 __ADC_SQR1_L(hadc->Init.NbrOfConversion) );
401 MODIFY_REG(hadc->Instance->SQR1,
406 /* Check back that ADC registers have effectively been configured to */
407 /* ensure of no potential problem of ADC core IP clocking. */
408 /* Check through register CR2 (excluding execution control bits ADON, */
409 /* JSWSTART, SWSTART and injected trigger bits JEXTEN and JEXTSEL). */
410 if ((READ_REG(hadc->Instance->CR2) & ~(ADC_CR2_ADON |
411 ADC_CR2_SWSTART | ADC_CR2_JSWSTART |
412 ADC_CR2_JEXTEN | ADC_CR2_JEXTSEL ))
415 /* Set ADC error code to none */
416 __HAL_ADC_CLEAR_ERRORCODE(hadc);
418 /* Initialize the ADC state */
419 hadc->State = HAL_ADC_STATE_READY;
423 /* Update ADC state machine to error */
424 hadc->State = HAL_ADC_STATE_ERROR;
426 /* Set ADC error code to ADC IP internal error */
427 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
429 tmpHALStatus = HAL_ERROR;
435 /* Update ADC state machine to error */
436 hadc->State = HAL_ADC_STATE_ERROR;
438 tmpHALStatus = HAL_ERROR;
441 /* Return function status */
446 * @brief Deinitialize the ADC peripheral registers to its default reset values.
447 * @note To not impact other ADCs, reset of common ADC registers have been
448 * left commented below.
449 * If needed, the example code can be copied and uncommented into
450 * function HAL_ADC_MspDeInit().
451 * @param hadc: ADC handle
454 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
456 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
458 /* Check ADC handle */
464 /* Check the parameters */
465 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
467 /* Change ADC state */
468 hadc->State = HAL_ADC_STATE_BUSY;
470 /* Stop potential conversion on going, on regular and injected groups */
471 /* Disable ADC peripheral */
472 tmpHALStatus = ADC_ConversionStop_Disable(hadc);
475 /* Configuration of ADC parameters if previous preliminary actions are */
476 /* correctly completed. */
477 if (tmpHALStatus != HAL_ERROR)
479 /* ========== Reset ADC registers ========== */
480 /* Reset register SR */
481 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_JEOC | ADC_FLAG_EOC |
482 ADC_FLAG_JSTRT | ADC_FLAG_STRT));
484 /* Reset register CR1 */
485 CLEAR_BIT(hadc->Instance->CR1, (ADC_CR1_OVRIE | ADC_CR1_RES | ADC_CR1_AWDEN |
486 ADC_CR1_JAWDEN | ADC_CR1_PDI | ADC_CR1_PDD |
487 ADC_CR1_DISCNUM | ADC_CR1_JDISCEN | ADC_CR1_DISCEN |
488 ADC_CR1_JAUTO | ADC_CR1_AWDSGL | ADC_CR1_SCAN |
489 ADC_CR1_JEOCIE | ADC_CR1_AWDIE | ADC_CR1_EOCIE |
492 /* Reset register CR2 */
493 __ADC_CR2_CLEAR(hadc);
495 /* Reset register SMPR0 */
496 __ADC_SMPR0_CLEAR(hadc);
498 /* Reset register SMPR1 */
499 CLEAR_BIT(hadc->Instance->SMPR1, (ADC_SMPR1_SMP29 | ADC_SMPR1_SMP28 | ADC_SMPR1_SMP27 |
500 ADC_SMPR1_SMP26 | ADC_SMPR1_SMP25 | ADC_SMPR1_SMP24 |
501 ADC_SMPR1_SMP23 | ADC_SMPR1_SMP22 | ADC_SMPR1_SMP21 |
504 /* Reset register SMPR2 */
505 CLEAR_BIT(hadc->Instance->SMPR2, (ADC_SMPR2_SMP19 | ADC_SMPR2_SMP18 | ADC_SMPR2_SMP17 |
506 ADC_SMPR2_SMP16 | ADC_SMPR2_SMP15 | ADC_SMPR2_SMP14 |
507 ADC_SMPR2_SMP13 | ADC_SMPR2_SMP12 | ADC_SMPR2_SMP11 |
510 /* Reset register SMPR3 */
511 CLEAR_BIT(hadc->Instance->SMPR3, (ADC_SMPR3_SMP9 | ADC_SMPR3_SMP8 | ADC_SMPR3_SMP7 |
512 ADC_SMPR3_SMP6 | ADC_SMPR3_SMP5 | ADC_SMPR3_SMP4 |
513 ADC_SMPR3_SMP3 | ADC_SMPR3_SMP2 | ADC_SMPR3_SMP1 |
516 /* Reset register JOFR1 */
517 CLEAR_BIT(hadc->Instance->JOFR1, ADC_JOFR1_JOFFSET1);
518 /* Reset register JOFR2 */
519 CLEAR_BIT(hadc->Instance->JOFR2, ADC_JOFR2_JOFFSET2);
520 /* Reset register JOFR3 */
521 CLEAR_BIT(hadc->Instance->JOFR3, ADC_JOFR3_JOFFSET3);
522 /* Reset register JOFR4 */
523 CLEAR_BIT(hadc->Instance->JOFR4, ADC_JOFR4_JOFFSET4);
525 /* Reset register HTR */
526 CLEAR_BIT(hadc->Instance->HTR, ADC_HTR_HT);
527 /* Reset register LTR */
528 CLEAR_BIT(hadc->Instance->LTR, ADC_LTR_LT);
530 /* Reset register SQR1 */
531 CLEAR_BIT(hadc->Instance->SQR1, (ADC_SQR1_L | __ADC_SQR1_SQXX));
533 /* Reset register SQR2 */
534 CLEAR_BIT(hadc->Instance->SQR2, (ADC_SQR2_SQ24 | ADC_SQR2_SQ23 | ADC_SQR2_SQ22 |
535 ADC_SQR2_SQ21 | ADC_SQR2_SQ20 | ADC_SQR2_SQ19 ));
537 /* Reset register SQR3 */
538 CLEAR_BIT(hadc->Instance->SQR3, (ADC_SQR3_SQ18 | ADC_SQR3_SQ17 | ADC_SQR3_SQ16 |
539 ADC_SQR3_SQ15 | ADC_SQR3_SQ14 | ADC_SQR3_SQ13 ));
541 /* Reset register SQR4 */
542 CLEAR_BIT(hadc->Instance->SQR4, (ADC_SQR4_SQ12 | ADC_SQR4_SQ11 | ADC_SQR4_SQ10 |
543 ADC_SQR4_SQ9 | ADC_SQR4_SQ8 | ADC_SQR4_SQ7 ));
545 /* Reset register SQR5 */
546 CLEAR_BIT(hadc->Instance->SQR5, (ADC_SQR5_SQ6 | ADC_SQR5_SQ5 | ADC_SQR5_SQ4 |
547 ADC_SQR5_SQ3 | ADC_SQR5_SQ2 | ADC_SQR5_SQ1 ));
550 /* Reset register JSQR */
551 CLEAR_BIT(hadc->Instance->JSQR, (ADC_JSQR_JL |
552 ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3 |
553 ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1 ));
555 /* Reset register JSQR */
556 CLEAR_BIT(hadc->Instance->JSQR, (ADC_JSQR_JL |
557 ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3 |
558 ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1 ));
560 /* Reset register DR */
561 /* bits in access mode read only, no direct reset applicable*/
563 /* Reset registers JDR1, JDR2, JDR3, JDR4 */
564 /* bits in access mode read only, no direct reset applicable*/
566 /* Reset register CCR */
567 CLEAR_BIT(ADC->CCR, ADC_CCR_TSVREFE);
569 /* ========== Hard reset ADC peripheral ========== */
570 /* Performs a global reset of the entire ADC peripheral: ADC state is */
571 /* forced to a similar state after device power-on. */
572 /* If needed, copy-paste and uncomment the following reset code into */
573 /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
575 /* __ADC1_FORCE_RESET() */
576 /* __ADC1_RELEASE_RESET() */
578 /* DeInit the low level hardware */
579 HAL_ADC_MspDeInit(hadc);
581 /* Set ADC error code to none */
582 __HAL_ADC_CLEAR_ERRORCODE(hadc);
584 /* Change ADC state */
585 hadc->State = HAL_ADC_STATE_RESET;
589 /* Process unlocked */
592 /* Return function status */
597 * @brief Initializes the ADC MSP.
598 * @param hadc: ADC handle
601 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
603 /* NOTE : This function should not be modified. When the callback is needed,
604 function HAL_ADC_MspInit must be implemented in the user file.
609 * @brief DeInitializes the ADC MSP.
610 * @param hadc: ADC handle
613 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
615 /* NOTE : This function should not be modified. When the callback is needed,
616 function HAL_ADC_MspDeInit must be implemented in the user file.
624 /** @defgroup ADC_Exported_Functions_Group2 IO operation functions
625 * @brief IO operation functions
628 ===============================================================================
629 ##### IO operation functions #####
630 ===============================================================================
631 [..] This section provides functions allowing to:
632 (+) Start conversion of regular group.
633 (+) Stop conversion of regular group.
634 (+) Poll for conversion complete on regular group.
635 (+) Poll for conversion event.
636 (+) Get result of regular channel conversion.
637 (+) Start conversion of regular group and enable interruptions.
638 (+) Stop conversion of regular group and disable interruptions.
639 (+) Handle ADC interrupt request
640 (+) Start conversion of regular group and enable DMA transfer.
641 (+) Stop conversion of regular group and disable ADC DMA transfer.
647 * @brief Enables ADC, starts conversion of regular group.
648 * Interruptions enabled in this function: None.
649 * @param hadc: ADC handle
652 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
654 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
656 /* Check the parameters */
657 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
662 /* Enable the ADC peripheral */
663 tmpHALStatus = ADC_Enable(hadc);
665 /* Start conversion if ADC is effectively enabled */
666 if (tmpHALStatus != HAL_ERROR)
668 /* State machine update: Check if an injected conversion is ongoing */
669 if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
671 /* Change ADC state */
672 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
676 /* Change ADC state */
677 hadc->State = HAL_ADC_STATE_BUSY_REG;
680 /* Set ADC error code to none */
681 __HAL_ADC_CLEAR_ERRORCODE(hadc);
683 /* Clear regular group conversion flag and overrun flag */
684 /* (To ensure of no unknown state from potential previous ADC operations) */
685 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
687 /* Start conversion of regular group if software start has been selected. */
688 /* If external trigger has been selected, conversion will start at next */
690 if (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc))
692 /* Start ADC conversion on regular group */
693 SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART);
697 /* Process unlocked */
700 /* Return function status */
705 * @brief Stop ADC conversion of regular group (and injected channels in
706 * case of auto_injection mode), disable ADC peripheral.
707 * @note: ADC peripheral disable is forcing interruption of potential
708 * conversion on injected group. If injected group is under use, it
709 * should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
710 * @param hadc: ADC handle
711 * @retval HAL status.
713 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
715 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
717 /* Check the parameters */
718 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
723 /* Stop potential conversion on going, on regular and injected groups */
724 /* Disable ADC peripheral */
725 tmpHALStatus = ADC_ConversionStop_Disable(hadc);
727 /* Check if ADC is effectively disabled */
728 if (tmpHALStatus != HAL_ERROR)
730 /* Change ADC state */
731 hadc->State = HAL_ADC_STATE_READY;
734 /* Process unlocked */
737 /* Return function status */
742 * @brief Wait for regular group conversion to be completed.
743 * @param hadc: ADC handle
744 * @param Timeout: Timeout value in millisecond.
747 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
749 uint32_t tickstart = 0;
751 /* Check the parameters */
752 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
755 tickstart = HAL_GetTick();
757 /* Wait until End of Conversion flag is raised */
758 while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
760 /* Check if timeout is disabled (set to infinite wait) */
761 if(Timeout != HAL_MAX_DELAY)
763 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
765 /* Update ADC state machine to timeout */
766 hadc->State = HAL_ADC_STATE_TIMEOUT;
768 /* Process unlocked */
776 /* Clear end of conversion flag of regular group if low power feature "Auto */
777 /* Wait" is disabled, to not interfere with this feature until data */
778 /* register is read using function HAL_ADC_GetValue(). */
779 if (hadc->Init.LowPowerAutoWait == DISABLE)
781 /* Clear regular group conversion flag */
782 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
785 /* Update state machine on conversion status if not in error state */
786 if(hadc->State != HAL_ADC_STATE_ERROR)
788 /* Update ADC state machine */
789 if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
791 /* Check if a conversion is ready on injected group */
792 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
794 /* Change ADC state */
795 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
799 /* Change ADC state */
800 hadc->State = HAL_ADC_STATE_EOC_REG;
805 /* Return ADC state */
810 * @brief Poll for conversion event.
811 * @param hadc: ADC handle
812 * @param EventType: the ADC event type.
813 * This parameter can be one of the following values:
814 * @arg AWD_EVENT: ADC Analog watchdog event.
815 * @arg OVR_EVENT: ADC Overrun event
816 * @param Timeout: Timeout value in millisecond.
819 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
821 uint32_t tickstart = 0;
823 /* Check the parameters */
824 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
825 assert_param(IS_ADC_EVENT_TYPE(EventType));
828 tickstart = HAL_GetTick();
830 /* Check selected event flag */
831 while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
833 /* Check if timeout is disabled (set to infinite wait) */
834 if(Timeout != HAL_MAX_DELAY)
836 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
838 /* Update ADC state machine to timeout */
839 hadc->State = HAL_ADC_STATE_TIMEOUT;
841 /* Process unlocked */
851 /* Analog watchdog (level out of window) event */
853 /* Change ADC state */
854 hadc->State = HAL_ADC_STATE_AWD;
856 /* Clear ADC analog watchdog flag */
857 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
861 default: /* Case OVR_EVENT */
862 /* Change ADC state */
863 hadc->State = HAL_ADC_STATE_ERROR;
865 /* Set ADC error code to overrun */
866 hadc->ErrorCode |= HAL_ADC_ERROR_OVR;
868 /* Clear ADC Overrun flag */
869 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
873 /* Return ADC state */
878 * @brief Enables ADC, starts conversion of regular group with interruption.
879 * Interruptions enabled in this function: EOC (end of conversion),
881 * Each of these interruptions has its dedicated callback function.
882 * @param hadc: ADC handle
885 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
887 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
889 /* Check the parameters */
890 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
895 /* Enable the ADC peripheral */
896 tmpHALStatus = ADC_Enable(hadc);
898 /* Start conversion if ADC is effectively enabled */
899 if (tmpHALStatus != HAL_ERROR)
901 /* State machine update: Check if an injected conversion is ongoing */
902 if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
904 /* Change ADC state */
905 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
909 /* Change ADC state */
910 hadc->State = HAL_ADC_STATE_BUSY_REG;
913 /* Set ADC error code to none */
914 __HAL_ADC_CLEAR_ERRORCODE(hadc);
916 /* Clear regular group conversion flag and overrun flag */
917 /* (To ensure of no unknown state from potential previous ADC operations) */
918 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
920 /* Enable end of conversion interrupt for regular group */
921 __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_OVR));
923 /* Start conversion of regular group if software start has been selected. */
924 /* If external trigger has been selected, conversion will start at next */
926 if (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc))
928 /* Start ADC conversion on regular group */
929 SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART);
934 /* Process unlocked */
937 /* Return function status */
942 * @brief Stop ADC conversion of regular group (and injected group in
943 * case of auto_injection mode), disable interrution of
944 * end-of-conversion, disable ADC peripheral.
945 * @param hadc: ADC handle
948 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
950 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
952 /* Check the parameters */
953 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
958 /* Stop potential conversion on going, on regular and injected groups */
959 /* Disable ADC peripheral */
960 tmpHALStatus = ADC_ConversionStop_Disable(hadc);
962 /* Check if ADC is effectively disabled */
963 if (tmpHALStatus != HAL_ERROR)
965 /* Disable ADC end of conversion interrupt for regular group */
966 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
968 /* Change ADC state */
969 hadc->State = HAL_ADC_STATE_READY;
972 /* Process unlocked */
975 /* Return function status */
980 * @brief Enables ADC, starts conversion of regular group and transfers result
982 * Interruptions enabled in this function:
983 * overrun, DMA half transfer, DMA transfer complete.
984 * Each of these interruptions has its dedicated callback function.
985 * @param hadc: ADC handle
986 * @param pData: The destination Buffer address.
987 * @param Length: The length of data to be transferred from ADC peripheral to memory.
990 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
992 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
994 /* Check the parameters */
995 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1000 /* Enable the ADC peripheral */
1001 tmpHALStatus = ADC_Enable(hadc);
1003 /* Start conversion if ADC is effectively enabled */
1004 if (tmpHALStatus != HAL_ERROR)
1006 /* State machine update: Check if an injected conversion is ongoing */
1007 if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
1009 /* Change ADC state */
1010 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
1014 /* Change ADC state */
1015 hadc->State = HAL_ADC_STATE_BUSY_REG;
1018 /* Set ADC error code to none */
1019 __HAL_ADC_CLEAR_ERRORCODE(hadc);
1022 /* Set the DMA transfer complete callback */
1023 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1025 /* Set the DMA half transfer complete callback */
1026 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1028 /* Set the DMA error callback */
1029 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
1032 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
1033 /* start (in case of SW start): */
1035 /* Clear regular group conversion flag and overrun flag */
1036 /* (To ensure of no unknown state from potential previous ADC operations) */
1037 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
1039 /* Enable ADC overrun interrupt */
1040 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
1042 /* Enable ADC DMA mode */
1043 hadc->Instance->CR2 |= ADC_CR2_DMA;
1045 /* Start the DMA channel */
1046 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
1048 /* Start conversion of regular group if software start has been selected. */
1049 /* If external trigger has been selected, conversion will start at next */
1050 /* trigger event. */
1051 /* Note: Alternate trigger for single conversion could be to force an */
1052 /* additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/
1053 if (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc))
1055 /* Start ADC conversion on regular group */
1056 SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART);
1060 /* Process unlocked */
1063 /* Return function status */
1064 return tmpHALStatus;
1068 * @brief Stop ADC conversion of regular group (and injected group in
1069 * case of auto_injection mode), disable ADC DMA transfer, disable
1071 * @note: ADC peripheral disable is forcing interruption of potential
1072 * conversion on injected group. If injected group is under use, it
1073 * should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
1074 * @param hadc: ADC handle
1075 * @retval HAL status.
1077 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
1079 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
1081 /* Check the parameters */
1082 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1084 /* Process locked */
1087 /* Stop potential conversion on going, on regular and injected groups */
1088 /* Disable ADC peripheral */
1089 tmpHALStatus = ADC_ConversionStop_Disable(hadc);
1091 /* Check if ADC is effectively disabled */
1092 if (tmpHALStatus != HAL_ERROR)
1094 /* Disable ADC DMA mode */
1095 hadc->Instance->CR2 &= ~ADC_CR2_DMA;
1097 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1098 /* DMA transfer is on going) */
1099 tmpHALStatus = HAL_DMA_Abort(hadc->DMA_Handle);
1101 /* Check if DMA channel effectively disabled */
1102 if (tmpHALStatus != HAL_ERROR)
1104 /* Change ADC state */
1105 hadc->State = HAL_ADC_STATE_READY;
1109 /* Update ADC state machine to error */
1110 hadc->State = HAL_ADC_STATE_ERROR;
1114 /* Process unlocked */
1117 /* Return function status */
1118 return tmpHALStatus;
1122 * @brief Get ADC regular group conversion result.
1123 * @param hadc: ADC handle
1124 * @retval Converted value
1126 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
1128 /* Check the parameters */
1129 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1131 /* Note: EOC flag is not cleared here by software because automatically */
1132 /* cleared by hardware when reading register DR. */
1134 /* Return ADC converted value */
1135 return hadc->Instance->DR;
1139 * @brief DMA transfer complete callback.
1140 * @param hdma: pointer to DMA handle.
1143 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
1145 /* Retrieve ADC handle corresponding to current DMA handle */
1146 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1148 /* Update state machine on conversion status if not in error state */
1149 if(hadc->State != HAL_ADC_STATE_ERROR)
1151 /* Update ADC state machine */
1152 if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
1154 /* Check if a conversion is ready on injected group */
1155 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
1157 /* Change ADC state */
1158 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
1162 /* Change ADC state */
1163 hadc->State = HAL_ADC_STATE_EOC_REG;
1168 /* Conversion complete callback */
1169 HAL_ADC_ConvCpltCallback(hadc);
1173 * @brief DMA half transfer complete callback.
1174 * @param hdma: pointer to DMA handle.
1177 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
1179 /* Retrieve ADC handle corresponding to current DMA handle */
1180 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1182 /* Half conversion callback */
1183 HAL_ADC_ConvHalfCpltCallback(hadc);
1187 * @brief DMA error callback
1188 * @param hdma: pointer to DMA handle.
1191 static void ADC_DMAError(DMA_HandleTypeDef *hdma)
1193 /* Retrieve ADC handle corresponding to current DMA handle */
1194 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1196 /* Change ADC state */
1197 hadc->State = HAL_ADC_STATE_ERROR;
1199 /* Set ADC error code to DMA error */
1200 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
1202 /* Error callback */
1203 HAL_ADC_ErrorCallback(hadc);
1207 * @brief Handles ADC interrupt request
1208 * @param hadc: ADC handle
1211 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
1213 /* Check the parameters */
1214 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1215 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
1216 assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
1219 /* ========== Check End of Conversion flag for regular group ========== */
1220 if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC))
1222 if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) )
1224 /* Update state machine on conversion status if not in error state */
1225 if(hadc->State != HAL_ADC_STATE_ERROR)
1227 /* Update ADC state machine */
1228 if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
1230 /* Check if a conversion is ready on injected group */
1231 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
1233 /* Change ADC state */
1234 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
1238 /* Change ADC state */
1239 hadc->State = HAL_ADC_STATE_EOC_REG;
1244 /* Disable interruption if no further conversion upcoming regular */
1245 /* external trigger or by continuous mode */
1246 if(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
1247 (hadc->Init.ContinuousConvMode == DISABLE) )
1249 /* Disable ADC end of single conversion interrupt */
1250 /* Note: Overrun interrupt was enabled with EOC interrupt in */
1251 /* HAL_ADC_Start_IT(), but is not disabled here because can be used by */
1252 /* overrun IRQ process below. */
1253 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
1256 /* Conversion complete callback */
1257 HAL_ADC_ConvCpltCallback(hadc);
1259 /* Clear regular group conversion flag */
1260 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
1264 /* ========== Check End of Conversion flag for injected group ========== */
1265 if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC))
1267 if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC))
1269 /* Update state machine on conversion status if not in error state */
1270 if(hadc->State != HAL_ADC_STATE_ERROR)
1272 /* Update ADC state machine */
1273 if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
1276 if(hadc->State == HAL_ADC_STATE_EOC_REG)
1278 /* Change ADC state */
1279 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
1283 /* Change ADC state */
1284 hadc->State = HAL_ADC_STATE_EOC_INJ;
1289 /* Disable interruption if no further conversion upcoming injected */
1290 /* external trigger or by automatic injected conversion with regular */
1291 /* group having no further conversion upcoming (same conditions as */
1292 /* regular group interruption disabling above). */
1293 if(__HAL_ADC_IS_SOFTWARE_START_INJECTED(hadc) ||
1294 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
1295 (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
1296 (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
1298 /* Disable ADC end of single conversion interrupt */
1299 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
1302 /* Conversion complete callback */
1303 HAL_ADCEx_InjectedConvCpltCallback(hadc);
1305 /* Clear injected group conversion flag */
1306 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC));
1310 /* ========== Check Analog watchdog flags ========== */
1311 if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
1313 if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD))
1315 /* Change ADC state */
1316 hadc->State = HAL_ADC_STATE_AWD;
1318 /* Clear the ADCx's Analog watchdog flag */
1319 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_AWD);
1321 /* Level out of window callback */
1322 HAL_ADC_LevelOutOfWindowCallback(hadc);
1326 /* ========== Check Overrun flag ========== */
1327 if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
1329 if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR))
1331 /* Change ADC state to error state */
1332 hadc->State = HAL_ADC_STATE_ERROR;
1334 /* Set ADC error code to overrun */
1335 hadc->ErrorCode |= HAL_ADC_ERROR_OVR;
1337 /* Error callback */
1338 HAL_ADC_ErrorCallback(hadc);
1340 /* Clear the Overrun flag */
1341 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1348 * @brief Conversion complete callback in non blocking mode
1349 * @param hadc: ADC handle
1352 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
1354 /* NOTE : This function should not be modified. When the callback is needed,
1355 function HAL_ADC_ConvCpltCallback must be implemented in the user file.
1360 * @brief Conversion DMA half-transfer callback in non blocking mode
1361 * @param hadc: ADC handle
1364 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
1366 /* NOTE : This function should not be modified. When the callback is needed,
1367 function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
1372 * @brief Analog watchdog callback in non blocking mode.
1373 * @param hadc: ADC handle
1376 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
1378 /* NOTE : This function should not be modified. When the callback is needed,
1379 function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file.
1384 * @brief ADC error callback in non blocking mode
1385 * (ADC conversion with interruption or transfer by DMA)
1386 * @param hadc: ADC handle
1389 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
1391 /* NOTE : This function should not be modified. When the callback is needed,
1392 function HAL_ADC_ErrorCallback must be implemented in the user file.
1401 /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
1402 * @brief Peripheral Control functions
1405 ===============================================================================
1406 ##### Peripheral Control functions #####
1407 ===============================================================================
1408 [..] This section provides functions allowing to:
1409 (+) Configure channels on regular group
1410 (+) Configure the analog watchdog
1417 * @brief Configures the the selected channel to be linked to the regular
1419 * @note In case of usage of internal measurement channels:
1420 * Vbat/VrefInt/TempSensor.
1421 * These internal paths can be be disabled using function
1423 * @note Possibility to update parameters on the fly:
1424 * This function initializes channel into regular group, following
1425 * calls to this function can be used to reconfigure some parameters
1426 * of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
1428 * The setting of these parameters is conditioned to ADC state.
1429 * For parameters constraints, see comments of structure
1430 * "ADC_ChannelConfTypeDef".
1431 * @param hadc: ADC handle
1432 * @param sConfig: Structure of ADC channel for regular group.
1433 * @retval HAL status
1435 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
1437 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
1439 /* Check the parameters */
1440 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1441 assert_param(IS_ADC_CHANNEL(sConfig->Channel));
1442 assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
1443 assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
1445 /* Process locked */
1449 /* Regular sequence configuration */
1450 /* For Rank 1 to 6 */
1451 if (sConfig->Rank < 7)
1453 MODIFY_REG(hadc->Instance->SQR5,
1454 __ADC_SQR5_RK(ADC_SQR5_SQ1, sConfig->Rank),
1455 __ADC_SQR5_RK(sConfig->Channel, sConfig->Rank) );
1457 /* For Rank 7 to 12 */
1458 else if (sConfig->Rank < 13)
1460 MODIFY_REG(hadc->Instance->SQR4,
1461 __ADC_SQR4_RK(ADC_SQR4_SQ7, sConfig->Rank),
1462 __ADC_SQR4_RK(sConfig->Channel, sConfig->Rank) );
1464 /* For Rank 13 to 18 */
1465 else if (sConfig->Rank < 19)
1467 MODIFY_REG(hadc->Instance->SQR3,
1468 __ADC_SQR3_RK(ADC_SQR3_SQ13, sConfig->Rank),
1469 __ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
1471 /* For Rank 19 to 24 */
1472 else if (sConfig->Rank < 25)
1474 MODIFY_REG(hadc->Instance->SQR2,
1475 __ADC_SQR2_RK(ADC_SQR2_SQ19, sConfig->Rank),
1476 __ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
1478 /* For Rank 25 to 28 */
1481 MODIFY_REG(hadc->Instance->SQR1,
1482 __ADC_SQR1_RK(ADC_SQR1_SQ25, sConfig->Rank),
1483 __ADC_SQR1_RK(sConfig->Channel, sConfig->Rank) );
1487 /* Channel sampling time configuration */
1488 /* For channels 0 to 9 */
1489 if (sConfig->Channel < ADC_CHANNEL_10)
1491 MODIFY_REG(hadc->Instance->SMPR3,
1492 __ADC_SMPR3(ADC_SMPR3_SMP0, sConfig->Channel),
1493 __ADC_SMPR3(sConfig->SamplingTime, sConfig->Channel) );
1495 /* For channels 10 to 19 */
1496 else if (sConfig->Channel < ADC_CHANNEL_20)
1498 MODIFY_REG(hadc->Instance->SMPR2,
1499 __ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel),
1500 __ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
1502 /* For channels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */
1503 /* For channels 20 to 29 for devices Cat4, Cat.5 */
1504 else if (sConfig->Channel <= ADC_SMPR1_CHANNEL_MAX)
1506 MODIFY_REG(hadc->Instance->SMPR1,
1507 __ADC_SMPR1(ADC_SMPR1_SMP20, sConfig->Channel),
1508 __ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
1510 /* For channels 30 to 31 for devices Cat4, Cat.5 */
1513 __ADC_SMPR0_CHANNEL_SET(hadc, sConfig->SamplingTime, sConfig->Channel);
1516 /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
1517 /* and VREFINT measurement path. */
1518 if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
1519 (sConfig->Channel == ADC_CHANNEL_VREFINT) )
1521 SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
1524 /* Process unlocked */
1527 /* Return function status */
1528 return tmpHALStatus;
1532 * @brief Configures the analog watchdog.
1533 * @param hadc: ADC handle
1534 * @param AnalogWDGConfig: Structure of ADC analog watchdog configuration
1535 * @retval HAL status
1537 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
1539 /* Check the parameters */
1540 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1541 assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
1542 assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
1543 assert_param(IS_ADC_RANGE(AnalogWDGConfig->HighThreshold));
1544 assert_param(IS_ADC_RANGE(AnalogWDGConfig->LowThreshold));
1546 if((AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) ||
1547 (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_INJEC) ||
1548 (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) )
1550 assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
1553 /* Process locked */
1556 /* Analog watchdog configuration */
1558 /* Configure ADC Analog watchdog interrupt */
1559 if(AnalogWDGConfig->ITMode == ENABLE)
1561 /* Enable the ADC Analog watchdog interrupt */
1562 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
1566 /* Disable the ADC Analog watchdog interrupt */
1567 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
1570 /* Configuration of analog watchdog: */
1571 /* - Set the analog watchdog enable mode: regular and/or injected groups, */
1572 /* one or all channels. */
1573 /* - Set the Analog watchdog channel (is not used if watchdog */
1574 /* mode "all channels": ADC_CFGR_AWD1SGL=0). */
1575 hadc->Instance->CR1 &= ~( ADC_CR1_AWDSGL |
1580 hadc->Instance->CR1 |= ( AnalogWDGConfig->WatchdogMode |
1581 AnalogWDGConfig->Channel );
1583 /* Set the high threshold */
1584 hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
1586 /* Set the low threshold */
1587 hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
1589 /* Process unlocked */
1592 /* Return function status */
1602 /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
1603 * @brief Peripheral State functions
1606 ===============================================================================
1607 ##### Peripheral State and Errors functions #####
1608 ===============================================================================
1610 This subsection provides functions to get in run-time the status of the
1612 (+) Check the ADC state
1613 (+) Check the ADC error code
1620 * @brief return the ADC state
1621 * @param hadc: ADC handle
1624 HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
1626 /* Return ADC state */
1631 * @brief Return the ADC error code
1632 * @param hadc: ADC handle
1633 * @retval ADC Error Code
1635 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
1637 return hadc->ErrorCode;
1648 /** @defgroup ADC_Private_Functions ADC Private Functions
1653 * @brief Enable the selected ADC.
1654 * @note Prerequisite condition to use this function: ADC must be disabled
1655 * and voltage regulator must be enabled (done into HAL_ADC_Init()).
1656 * @param hadc: ADC handle
1657 * @retval HAL status.
1659 HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
1661 uint32_t wait_loop_index = 0;
1662 uint32_t tickstart = 0;
1664 /* ADC enable and wait for ADC ready (in case of ADC is disabled or */
1665 /* enabling phase not yet completed: flag ADC ready not yet set). */
1666 /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
1667 /* causes: ADC clock not running, ...). */
1668 if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
1670 /* Enable the Peripheral */
1673 /* Delay for ADC stabilization time. */
1674 /* Delay fixed to worst case: maximum CPU frequency */
1675 while(wait_loop_index < ADC_STAB_DELAY_CPU_CYCLES)
1681 tickstart = HAL_GetTick();
1683 /* Wait for ADC effectively enabled */
1684 while(__HAL_ADC_IS_ENABLED(hadc) == RESET)
1686 if((HAL_GetTick() - tickstart ) > ADC_ENABLE_TIMEOUT)
1688 /* Update ADC state machine to error */
1689 hadc->State = HAL_ADC_STATE_ERROR;
1691 /* Set ADC error code to ADC IP internal error */
1692 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
1694 /* Process unlocked */
1702 /* Return HAL status */
1707 * @brief Stop ADC conversion and disable the selected ADC
1708 * @note Prerequisite condition to use this function: ADC conversions must be
1709 * stopped to disable the ADC.
1710 * @param hadc: ADC handle
1711 * @retval HAL status.
1713 HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
1715 uint32_t tickstart = 0;
1717 /* Verification if ADC is not already disabled: */
1718 if (__HAL_ADC_IS_ENABLED(hadc) != RESET)
1720 /* Disable the ADC peripheral */
1721 __ADC_DISABLE(hadc);
1724 tickstart = HAL_GetTick();
1726 /* Wait for ADC effectively disabled */
1727 while(__HAL_ADC_IS_ENABLED(hadc) != RESET)
1729 if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT)
1731 /* Update ADC state machine to error */
1732 hadc->State = HAL_ADC_STATE_ERROR;
1734 /* Set ADC error code to ADC IP internal error */
1735 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
1742 /* Return HAL status */
1750 #endif /* HAL_ADC_MODULE_ENABLED */
1759 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/