2 ******************************************************************************
3 * @file stm32l1xx_hal_cryp.c
4 * @author MCD Application Team
6 * @date 5-September-2014
7 * @brief CRYP HAL module driver.
9 * This file provides firmware functions to manage the following
10 * functionalities of the Cryptography (CRYP) peripheral:
11 * + Initialization and de-initialization functions
12 * + Processing functions by algorithm using polling mode
13 * + Processing functions by algorithm using interrupt mode
14 * + Processing functions by algorithm using DMA mode
15 * + Peripheral State functions
18 ==============================================================================
19 ##### How to use this driver #####
20 ==============================================================================
22 The CRYP HAL driver can be used as follows:
24 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
25 (##) Enable the CRYP interface clock using __CRYP_CLK_ENABLE()
26 (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
27 (+) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
28 (+) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
29 (+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
30 (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
31 (+) Enable the DMA2 interface clock using
32 (++) __DMA2_CLK_ENABLE()
33 (+) Configure and enable two DMA Channels one for managing data transfer from
34 memory to peripheral (input channel) and another channel for managing data
35 transfer from peripheral to memory (output channel)
36 (+) Associate the initialized DMA handle to the CRYP DMA handle
38 (+) Configure the priority and enable the NVIC for the transfer complete
39 interrupt on the two DMA Streams. The output stream should have higher
40 priority than the input stream.
41 (++) HAL_NVIC_SetPriority()
42 (++) HAL_NVIC_EnableIRQ()
44 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
45 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
46 (##) The encryption/decryption key.
47 (##) The initialization vector (counter). It is not used ECB mode.
49 (#)Three processing (encryption/decryption) functions are available:
50 (##) Polling mode: encryption and decryption APIs are blocking functions
51 i.e. they process the data and wait till the processing is finished
52 e.g. HAL_CRYP_AESCBC_Encrypt()
53 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
54 i.e. they process the data under interrupt
55 e.g. HAL_CRYP_AESCBC_Encrypt_IT()
56 (##) DMA mode: encryption and decryption APIs are not blocking functions
57 i.e. the data transfer is ensured by DMA
58 e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
60 (#)When the processing function is called for the first time after HAL_CRYP_Init()
61 the CRYP peripheral is initialized and processes the buffer in input.
62 At second call, the processing function performs an append of the already
64 When a new data block is to be processed, call HAL_CRYP_Init() then the
67 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
70 ******************************************************************************
73 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
75 * Redistribution and use in source and binary forms, with or without modification,
76 * are permitted provided that the following conditions are met:
77 * 1. Redistributions of source code must retain the above copyright notice,
78 * this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce the above copyright notice,
80 * this list of conditions and the following disclaimer in the documentation
81 * and/or other materials provided with the distribution.
82 * 3. Neither the name of STMicroelectronics nor the names of its contributors
83 * may be used to endorse or promote products derived from this software
84 * without specific prior written permission.
86 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
87 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
88 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
90 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
91 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
93 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
94 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
95 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
97 ******************************************************************************
100 /* Includes ------------------------------------------------------------------*/
101 #include "stm32l1xx_hal.h"
103 #ifdef HAL_CRYP_MODULE_ENABLED
105 /** @addtogroup STM32L1xx_HAL_Driver
109 /** @defgroup CRYP CRYP
110 * @brief CRYP HAL module driver.
114 #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE)
116 /* Private typedef -----------------------------------------------------------*/
117 /* Private define ------------------------------------------------------------*/
119 /** @defgroup CRYP_Private_Defines CRYP Private Defines
123 #define CRYP_ALGO_CHAIN_MASK (AES_CR_MODE | AES_CR_CHMOD)
129 /* Private macro -------------------------------------------------------------*/
130 /* Private variables ---------------------------------------------------------*/
131 /* Private function prototypes -----------------------------------------------*/
133 /** @defgroup CRYP_Private_Functions CRYP Private Functions
137 static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp);
138 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector);
139 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key);
140 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
141 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
142 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
143 static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
144 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
150 /* Private functions ---------------------------------------------------------*/
152 /** @defgroup CRYP_Exported_Functions CRYP Exported Functions
156 /** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
157 * @brief Initialization and Configuration functions.
160 ==============================================================================
161 ##### Initialization and de-initialization functions #####
162 ==============================================================================
163 [..] This section provides functions allowing to:
164 (+) Initialize the CRYP according to the specified parameters
165 in the CRYP_InitTypeDef and creates the associated handle
166 (+) DeInitialize the CRYP peripheral
167 (+) Initialize the CRYP MSP
168 (+) DeInitialize CRYP MSP
175 * @brief Initializes the CRYP according to the specified
176 * parameters in the CRYP_InitTypeDef and creates the associated handle.
177 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
178 * the configuration information for CRYP module
181 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
183 /* Check the CRYP handle allocation */
184 if(hcryp == HAL_NULL)
189 /* Check the parameters */
190 assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
192 if(hcryp->State == HAL_CRYP_STATE_RESET)
194 /* Init the low level hardware */
195 HAL_CRYP_MspInit(hcryp);
198 /* Check if AES already enabled */
199 if (HAL_IS_BIT_CLR(AES->CR, AES_CR_EN))
201 /* Change the CRYP state */
202 hcryp->State = HAL_CRYP_STATE_BUSY;
204 /* Set the data type*/
205 MODIFY_REG(AES->CR, AES_CR_DATATYPE, hcryp->Init.DataType);
207 /* Reset CrypInCount and CrypOutCount */
208 hcryp->CrypInCount = 0;
209 hcryp->CrypOutCount = 0;
211 /* Change the CRYP state */
212 hcryp->State = HAL_CRYP_STATE_READY;
214 /* Set the default CRYP phase */
215 hcryp->Phase = HAL_CRYP_PHASE_READY;
217 /* Return function status */
222 /* The Datatype selection must be changed if the AES is disabled. Writing these bits while the AES is */
223 /* enabled is forbidden to avoid unpredictable AES behavior.*/
225 /* Return function status */
232 * @brief DeInitializes the CRYP peripheral.
233 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
234 * the configuration information for CRYP module
237 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
239 /* Check the CRYP handle allocation */
240 if(hcryp == HAL_NULL)
245 /* Change the CRYP state */
246 hcryp->State = HAL_CRYP_STATE_BUSY;
248 /* Set the default CRYP phase */
249 hcryp->Phase = HAL_CRYP_PHASE_READY;
251 /* Reset CrypInCount and CrypOutCount */
252 hcryp->CrypInCount = 0;
253 hcryp->CrypOutCount = 0;
255 /* Disable the CRYP Peripheral Clock */
256 __HAL_CRYP_DISABLE();
258 /* DeInit the low level hardware: CLOCK, NVIC.*/
259 HAL_CRYP_MspDeInit(hcryp);
261 /* Change the CRYP state */
262 hcryp->State = HAL_CRYP_STATE_RESET;
267 /* Return function status */
272 * @brief Initializes the CRYP MSP.
273 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
274 * the configuration information for CRYP module
277 __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
279 /* NOTE : This function should not be modified; when the callback is needed,
280 the HAL_CRYP_MspInit can be implemented in the user file */
284 * @brief DeInitializes CRYP MSP.
285 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
286 * the configuration information for CRYP module
289 __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
291 /* NOTE : This function should not be modified; when the callback is needed,
292 the HAL_CRYP_MspDeInit can be implemented in the user file */
299 /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
300 * @brief processing functions.
303 ==============================================================================
304 ##### AES processing functions #####
305 ==============================================================================
306 [..] This section provides functions allowing to:
307 (+) Encrypt plaintext using AES algorithm in different chaining modes
308 (+) Decrypt cyphertext using AES algorithm in different chaining modes
309 [..] Three processing functions are available:
319 * @brief Initializes the CRYP peripheral in AES ECB encryption mode
320 * then encrypt pPlainData. The cypher data are available in pCypherData
321 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
322 * the configuration information for CRYP module
323 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
324 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
325 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
326 * @param Timeout: Specify Timeout value
329 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
334 /* Check that data aligned on u32 and Size multiple of 16*/
335 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
340 /* Return function status */
344 /* Check if HAL_CRYP_Init has been called */
345 if(hcryp->State != HAL_CRYP_STATE_RESET)
347 /* Change the CRYP state */
348 hcryp->State = HAL_CRYP_STATE_BUSY;
350 /* Check if initialization phase has already been performed */
351 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
354 CRYP_SetKey(hcryp, hcryp->Init.pKey);
356 /* Reset the CHMOD & MODE bits */
357 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
359 /* Set the CRYP peripheral in AES ECB mode */
360 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
366 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
369 /* Write Plain Data and Get Cypher Data */
370 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
375 /* Change the CRYP state */
376 hcryp->State = HAL_CRYP_STATE_READY;
378 /* Process Unlocked */
381 /* Return function status */
386 /* Return function status */
392 * @brief Initializes the CRYP peripheral in AES CBC encryption mode
393 * then encrypt pPlainData. The cypher data are available in pCypherData
394 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
395 * the configuration information for CRYP module
396 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
397 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
398 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
399 * @param Timeout: Specify Timeout value
402 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
407 /* Check that data aligned on u32 */
408 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
413 /* Return function status */
417 /* Check if HAL_CRYP_Init has been called */
418 if(hcryp->State != HAL_CRYP_STATE_RESET)
420 /* Change the CRYP state */
421 hcryp->State = HAL_CRYP_STATE_BUSY;
423 /* Check if initialization phase has already been performed */
424 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
427 CRYP_SetKey(hcryp, hcryp->Init.pKey);
429 /* Reset the CHMOD & MODE bits */
430 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
432 /* Set the CRYP peripheral in AES CBC mode */
433 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
435 /* Set the Initialization Vector */
436 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
442 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
445 /* Write Plain Data and Get Cypher Data */
446 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
451 /* Change the CRYP state */
452 hcryp->State = HAL_CRYP_STATE_READY;
454 /* Process Unlocked */
457 /* Return function status */
462 /* Return function status */
468 * @brief Initializes the CRYP peripheral in AES CTR encryption mode
469 * then encrypt pPlainData. The cypher data are available in pCypherData
470 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
471 * the configuration information for CRYP module
472 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
473 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
474 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
475 * @param Timeout: Specify Timeout value
478 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
483 /* Check that data aligned on u32 */
484 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
489 /* Return function status */
493 /* Check if HAL_CRYP_Init has been called */
494 if(hcryp->State != HAL_CRYP_STATE_RESET)
496 /* Change the CRYP state */
497 hcryp->State = HAL_CRYP_STATE_BUSY;
499 /* Check if initialization phase has already been performed */
500 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
503 CRYP_SetKey(hcryp, hcryp->Init.pKey);
505 /* Reset the CHMOD & MODE bits */
506 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
508 /* Set the CRYP peripheral in AES CTR mode */
509 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
511 /* Set the Initialization Vector */
512 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
518 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
521 /* Write Plain Data and Get Cypher Data */
522 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
527 /* Change the CRYP state */
528 hcryp->State = HAL_CRYP_STATE_READY;
530 /* Process Unlocked */
533 /* Return function status */
538 /* Return function status */
544 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
545 * then decrypted pCypherData. The cypher data are available in pPlainData
546 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
547 * the configuration information for CRYP module
548 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
549 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
550 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
551 * @param Timeout: Specify Timeout value
554 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
559 /* Check that data aligned on u32 */
560 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
565 /* Return function status */
569 /* Check if HAL_CRYP_Init has been called */
570 if(hcryp->State != HAL_CRYP_STATE_RESET)
572 /* Change the CRYP state */
573 hcryp->State = HAL_CRYP_STATE_BUSY;
575 /* Check if initialization phase has already been performed */
576 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
579 CRYP_SetKey(hcryp, hcryp->Init.pKey);
581 /* Reset the CHMOD & MODE bits */
582 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
584 /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
585 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
591 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
594 /* Write Cypher Data and Get Plain Data */
595 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
600 /* Change the CRYP state */
601 hcryp->State = HAL_CRYP_STATE_READY;
603 /* Process Unlocked */
606 /* Return function status */
611 /* Return function status */
617 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
618 * then decrypted pCypherData. The cypher data are available in pPlainData
619 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
620 * the configuration information for CRYP module
621 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
622 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
623 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
624 * @param Timeout: Specify Timeout value
627 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
632 /* Check that data aligned on u32 */
633 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
638 /* Return function status */
642 /* Check if HAL_CRYP_Init has been called */
643 if(hcryp->State != HAL_CRYP_STATE_RESET)
645 /* Change the CRYP state */
646 hcryp->State = HAL_CRYP_STATE_BUSY;
648 /* Check if initialization phase has already been performed */
649 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
652 CRYP_SetKey(hcryp, hcryp->Init.pKey);
654 /* Reset the CHMOD & MODE bits */
655 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
657 /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
658 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
660 /* Set the Initialization Vector */
661 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
667 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
670 /* Write Cypher Data and Get Plain Data */
671 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
676 /* Change the CRYP state */
677 hcryp->State = HAL_CRYP_STATE_READY;
679 /* Process Unlocked */
682 /* Return function status */
687 /* Return function status */
693 * @brief Initializes the CRYP peripheral in AES CTR decryption mode
694 * then decrypted pCypherData. The cypher data are available in pPlainData
695 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
696 * the configuration information for CRYP module
697 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
698 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
699 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
700 * @param Timeout: Specify Timeout value
703 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
708 /* Check that data aligned on u32 */
709 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
714 /* Return function status */
718 /* Check if initialization phase has already been performed */
719 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->Phase == HAL_CRYP_PHASE_READY))
721 /* Change the CRYP state */
722 hcryp->State = HAL_CRYP_STATE_BUSY;
725 CRYP_SetKey(hcryp, hcryp->Init.pKey);
727 /* Reset the CHMOD & MODE bits */
728 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
730 /* Set the CRYP peripheral in AES CTR decryption mode */
731 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
733 /* Set the Initialization Vector */
734 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
740 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
743 /* Write Cypher Data and Get Plain Data */
744 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
749 /* Change the CRYP state */
750 hcryp->State = HAL_CRYP_STATE_READY;
752 /* Process Unlocked */
755 /* Return function status */
760 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
761 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
762 * the configuration information for CRYP module
763 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
764 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
765 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
768 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
770 uint32_t inputaddr = 0;
772 /* Check that data aligned on u32 */
773 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
778 /* Return function status */
782 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
787 /* Get the buffer addresses and sizes */
788 hcryp->CrypInCount = Size;
789 hcryp->pCrypInBuffPtr = pPlainData;
790 hcryp->pCrypOutBuffPtr = pCypherData;
791 hcryp->CrypOutCount = Size;
793 /* Change the CRYP state */
794 hcryp->State = HAL_CRYP_STATE_BUSY;
796 /* Check if initialization phase has already been performed */
797 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
800 CRYP_SetKey(hcryp, hcryp->Init.pKey);
802 /* Reset the CHMOD & MODE bits */
803 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
805 /* Set the CRYP peripheral in AES ECB mode */
806 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
809 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
812 /* Enable Interrupts */
813 __HAL_CRYP_ENABLE_IT(AES_IT_CC);
818 /* Get the last input data adress */
819 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
821 /* Write the Input block in the Data Input register */
822 AES->DINR = *(uint32_t*)(inputaddr);
824 AES->DINR = *(uint32_t*)(inputaddr);
826 AES->DINR = *(uint32_t*)(inputaddr);
828 AES->DINR = *(uint32_t*)(inputaddr);
829 hcryp->pCrypInBuffPtr += 16;
830 hcryp->CrypInCount -= 16;
832 /* Return function status */
837 /* Return function status */
843 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
844 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
845 * the configuration information for CRYP module
846 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
847 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
848 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
851 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
853 uint32_t inputaddr = 0;
855 /* Check that data aligned on u32 */
856 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
861 /* Return function status */
865 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
870 /* Get the buffer addresses and sizes */
871 hcryp->CrypInCount = Size;
872 hcryp->pCrypInBuffPtr = pPlainData;
873 hcryp->pCrypOutBuffPtr = pCypherData;
874 hcryp->CrypOutCount = Size;
876 /* Change the CRYP state */
877 hcryp->State = HAL_CRYP_STATE_BUSY;
879 /* Check if initialization phase has already been performed */
880 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
883 CRYP_SetKey(hcryp, hcryp->Init.pKey);
885 /* Reset the CHMOD & MODE bits */
886 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
888 /* Set the CRYP peripheral in AES CBC mode */
889 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
891 /* Set the Initialization Vector */
892 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
895 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
898 /* Enable Interrupts */
899 __HAL_CRYP_ENABLE_IT(AES_IT_CC);
904 /* Get the last input data adress */
905 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
907 /* Write the Input block in the Data Input register */
908 AES->DINR = *(uint32_t*)(inputaddr);
910 AES->DINR = *(uint32_t*)(inputaddr);
912 AES->DINR = *(uint32_t*)(inputaddr);
914 AES->DINR = *(uint32_t*)(inputaddr);
915 hcryp->pCrypInBuffPtr += 16;
916 hcryp->CrypInCount -= 16;
918 /* Return function status */
923 /* Return function status */
929 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
930 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
931 * the configuration information for CRYP module
932 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
933 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
934 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
937 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
939 uint32_t inputaddr = 0;
941 /* Check that data aligned on u32 */
942 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
947 /* Return function status */
951 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
956 /* Get the buffer addresses and sizes */
957 hcryp->CrypInCount = Size;
958 hcryp->pCrypInBuffPtr = pPlainData;
959 hcryp->pCrypOutBuffPtr = pCypherData;
960 hcryp->CrypOutCount = Size;
962 /* Change the CRYP state */
963 hcryp->State = HAL_CRYP_STATE_BUSY;
965 /* Check if initialization phase has already been performed */
966 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
969 CRYP_SetKey(hcryp, hcryp->Init.pKey);
971 /* Reset the CHMOD & MODE bits */
972 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
974 /* Set the CRYP peripheral in AES CTR mode */
975 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
977 /* Set the Initialization Vector */
978 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
981 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
984 /* Enable Interrupts */
985 __HAL_CRYP_ENABLE_IT(AES_IT_CC);
990 /* Get the last input data adress */
991 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
993 /* Write the Input block in the Data Input register */
994 AES->DINR = *(uint32_t*)(inputaddr);
996 AES->DINR = *(uint32_t*)(inputaddr);
998 AES->DINR = *(uint32_t*)(inputaddr);
1000 AES->DINR = *(uint32_t*)(inputaddr);
1001 hcryp->pCrypInBuffPtr += 16;
1002 hcryp->CrypInCount -= 16;
1004 /* Return function status */
1009 /* Return function status */
1015 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
1016 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1017 * the configuration information for CRYP module
1018 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1019 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1020 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1021 * @retval HAL status
1023 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1025 uint32_t inputaddr = 0;
1027 /* Check that data aligned on u32 */
1028 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1030 /* Process Locked */
1031 __HAL_UNLOCK(hcryp);
1033 /* Return function status */
1037 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1039 /* Process Locked */
1042 /* Get the buffer addresses and sizes */
1043 hcryp->CrypInCount = Size;
1044 hcryp->pCrypInBuffPtr = pCypherData;
1045 hcryp->pCrypOutBuffPtr = pPlainData;
1046 hcryp->CrypOutCount = Size;
1048 /* Change the CRYP state */
1049 hcryp->State = HAL_CRYP_STATE_BUSY;
1051 /* Check if initialization phase has already been performed */
1052 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1055 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1057 /* Reset the CHMOD & MODE bits */
1058 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
1060 /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
1061 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
1064 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1067 /* Enable Interrupts */
1068 __HAL_CRYP_ENABLE_IT(AES_IT_CC);
1071 __HAL_CRYP_ENABLE();
1073 /* Get the last input data adress */
1074 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1076 /* Write the Input block in the Data Input register */
1077 AES->DINR = *(uint32_t*)(inputaddr);
1079 AES->DINR = *(uint32_t*)(inputaddr);
1081 AES->DINR = *(uint32_t*)(inputaddr);
1083 AES->DINR = *(uint32_t*)(inputaddr);
1084 hcryp->pCrypInBuffPtr += 16;
1085 hcryp->CrypInCount -= 16;
1087 /* Return function status */
1092 /* Return function status */
1098 * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
1099 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1100 * the configuration information for CRYP module
1101 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1102 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1103 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1104 * @retval HAL status
1106 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1108 uint32_t inputaddr = 0;
1110 /* Check that data aligned on u32 */
1111 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1113 /* Process Locked */
1114 __HAL_UNLOCK(hcryp);
1116 /* Return function status */
1120 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1122 /* Process Locked */
1125 /* Get the buffer addresses and sizes */
1126 hcryp->CrypInCount = Size;
1127 hcryp->pCrypInBuffPtr = pCypherData;
1128 hcryp->pCrypOutBuffPtr = pPlainData;
1129 hcryp->CrypOutCount = Size;
1131 /* Change the CRYP state */
1132 hcryp->State = HAL_CRYP_STATE_BUSY;
1134 /* Check if initialization phase has already been performed */
1135 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1138 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1140 /* Reset the CHMOD & MODE bits */
1141 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
1143 /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
1144 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
1146 /* Set the Initialization Vector */
1147 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1150 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1153 /* Enable Interrupts */
1154 __HAL_CRYP_ENABLE_IT(AES_IT_CC);
1157 __HAL_CRYP_ENABLE();
1159 /* Get the last input data adress */
1160 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1162 /* Write the Input block in the Data Input register */
1163 AES->DINR = *(uint32_t*)(inputaddr);
1165 AES->DINR = *(uint32_t*)(inputaddr);
1167 AES->DINR = *(uint32_t*)(inputaddr);
1169 AES->DINR = *(uint32_t*)(inputaddr);
1170 hcryp->pCrypInBuffPtr += 16;
1171 hcryp->CrypInCount -= 16;
1173 /* Return function status */
1178 /* Return function status */
1184 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
1185 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1186 * the configuration information for CRYP module
1187 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1188 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1189 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1190 * @retval HAL status
1192 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1194 uint32_t inputaddr = 0;
1196 /* Check that data aligned on u32 */
1197 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1199 /* Process Locked */
1200 __HAL_UNLOCK(hcryp);
1202 /* Return function status */
1206 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1208 /* Process Locked */
1211 /* Get the buffer addresses and sizes */
1212 hcryp->CrypInCount = Size;
1213 hcryp->pCrypInBuffPtr = pCypherData;
1214 hcryp->pCrypOutBuffPtr = pPlainData;
1215 hcryp->CrypOutCount = Size;
1217 /* Change the CRYP state */
1218 hcryp->State = HAL_CRYP_STATE_BUSY;
1220 /* Check if initialization phase has already been performed */
1221 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1224 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1226 /* Reset the CHMOD & MODE bits */
1227 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
1229 /* Set the CRYP peripheral in AES CTR decryption mode */
1230 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
1232 /* Set the Initialization Vector */
1233 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1236 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1239 /* Enable Interrupts */
1240 __HAL_CRYP_ENABLE_IT(AES_IT_CC);
1243 __HAL_CRYP_ENABLE();
1245 /* Get the last input data adress */
1246 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1248 /* Write the Input block in the Data Input register */
1249 AES->DINR = *(uint32_t*)(inputaddr);
1251 AES->DINR = *(uint32_t*)(inputaddr);
1253 AES->DINR = *(uint32_t*)(inputaddr);
1255 AES->DINR = *(uint32_t*)(inputaddr);
1256 hcryp->pCrypInBuffPtr += 16;
1257 hcryp->CrypInCount -= 16;
1259 /* Return function status */
1264 /* Return function status */
1270 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
1271 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1272 * the configuration information for CRYP module
1273 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1274 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1275 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1276 * @retval HAL status
1278 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1280 uint32_t inputaddr = 0, outputaddr = 0;
1282 /* Check that data aligned on u32 */
1283 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1285 /* Process Locked */
1286 __HAL_UNLOCK(hcryp);
1288 /* Return function status */
1292 /* Check if HAL_CRYP_Init has been called */
1293 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1295 /* Process Locked */
1298 inputaddr = (uint32_t)pPlainData;
1299 outputaddr = (uint32_t)pCypherData;
1301 /* Change the CRYP state */
1302 hcryp->State = HAL_CRYP_STATE_BUSY;
1304 /* Check if initialization phase has already been performed */
1305 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1308 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1310 /* Set the CRYP peripheral in AES ECB mode */
1311 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
1314 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1316 /* Set the input and output addresses and start DMA transfer */
1317 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1319 /* Process Unlocked */
1320 __HAL_UNLOCK(hcryp);
1322 /* Return function status */
1332 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1333 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1334 * the configuration information for CRYP module
1335 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1336 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1337 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1338 * @retval HAL status
1340 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1342 uint32_t inputaddr = 0, outputaddr = 0;
1344 /* Check that data aligned on u32 */
1345 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1347 /* Process Locked */
1348 __HAL_UNLOCK(hcryp);
1350 /* Return function status */
1354 /* Check if HAL_CRYP_Init has been called */
1355 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1357 /* Process Locked */
1360 inputaddr = (uint32_t)pPlainData;
1361 outputaddr = (uint32_t)pCypherData;
1363 /* Change the CRYP state */
1364 hcryp->State = HAL_CRYP_STATE_BUSY;
1366 /* Check if initialization phase has already been performed */
1367 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1370 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1372 /* Set the CRYP peripheral in AES CBC mode */
1373 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
1375 /* Set the Initialization Vector */
1376 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1379 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1381 /* Set the input and output addresses and start DMA transfer */
1382 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1384 /* Process Unlocked */
1385 __HAL_UNLOCK(hcryp);
1387 /* Return function status */
1397 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
1398 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1399 * the configuration information for CRYP module
1400 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1401 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1402 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1403 * @retval HAL status
1405 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1407 uint32_t inputaddr = 0, outputaddr = 0;
1409 /* Check that data aligned on u32 */
1410 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1412 /* Process Locked */
1413 __HAL_UNLOCK(hcryp);
1415 /* Return function status */
1419 /* Check if HAL_CRYP_Init has been called */
1420 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1422 /* Process Locked */
1425 inputaddr = (uint32_t)pPlainData;
1426 outputaddr = (uint32_t)pCypherData;
1428 /* Change the CRYP state */
1429 hcryp->State = HAL_CRYP_STATE_BUSY;
1431 /* Check if initialization phase has already been performed */
1432 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1435 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1437 /* Set the CRYP peripheral in AES CTR mode */
1438 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
1440 /* Set the Initialization Vector */
1441 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1444 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1447 /* Set the input and output addresses and start DMA transfer */
1448 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1450 /* Process Unlocked */
1451 __HAL_UNLOCK(hcryp);
1453 /* Return function status */
1463 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
1464 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1465 * the configuration information for CRYP module
1466 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1467 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1468 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1469 * @retval HAL status
1471 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1473 uint32_t inputaddr = 0, outputaddr = 0;
1475 /* Check that data aligned on u32 */
1476 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1478 /* Process Locked */
1479 __HAL_UNLOCK(hcryp);
1481 /* Return function status */
1485 /* Check if HAL_CRYP_Init has been called */
1486 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1488 /* Process Locked */
1491 inputaddr = (uint32_t)pCypherData;
1492 outputaddr = (uint32_t)pPlainData;
1494 /* Change the CRYP state */
1495 hcryp->State = HAL_CRYP_STATE_BUSY;
1497 /* Check if initialization phase has already been performed */
1498 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1501 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1503 /* Reset the CHMOD & MODE bits */
1504 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
1506 /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
1507 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
1510 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1513 /* Set the input and output addresses and start DMA transfer */
1514 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1516 /* Process Unlocked */
1517 __HAL_UNLOCK(hcryp);
1519 /* Return function status */
1529 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1530 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1531 * the configuration information for CRYP module
1532 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1533 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1534 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1535 * @retval HAL status
1537 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1539 uint32_t inputaddr = 0, outputaddr = 0;
1541 /* Check that data aligned on u32 */
1542 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1544 /* Process Locked */
1545 __HAL_UNLOCK(hcryp);
1547 /* Return function status */
1551 /* Check if HAL_CRYP_Init has been called */
1552 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1554 /* Process Locked */
1557 inputaddr = (uint32_t)pCypherData;
1558 outputaddr = (uint32_t)pPlainData;
1560 /* Change the CRYP state */
1561 hcryp->State = HAL_CRYP_STATE_BUSY;
1563 /* Check if initialization phase has already been performed */
1564 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1567 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1569 /* Reset the CHMOD & MODE bits */
1570 CLEAR_BIT(AES->CR, CRYP_ALGO_CHAIN_MASK);
1572 /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
1573 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
1575 /* Set the Initialization Vector */
1576 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1579 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1582 /* Set the input and output addresses and start DMA transfer */
1583 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1585 /* Process Unlocked */
1586 __HAL_UNLOCK(hcryp);
1588 /* Return function status */
1598 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
1599 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1600 * the configuration information for CRYP module
1601 * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
1602 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1603 * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
1604 * @retval HAL status
1606 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1608 uint32_t inputaddr = 0, outputaddr = 0;
1610 /* Check that data aligned on u32 */
1611 if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
1613 /* Process Locked */
1614 __HAL_UNLOCK(hcryp);
1616 /* Return function status */
1620 /* Check if HAL_CRYP_Init has been called */
1621 if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
1623 /* Process Locked */
1626 inputaddr = (uint32_t)pCypherData;
1627 outputaddr = (uint32_t)pPlainData;
1629 /* Change the CRYP state */
1630 hcryp->State = HAL_CRYP_STATE_BUSY;
1632 /* Check if initialization phase has already been performed */
1633 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1636 CRYP_SetKey(hcryp, hcryp->Init.pKey);
1638 /* Set the CRYP peripheral in AES CTR mode */
1639 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
1641 /* Set the Initialization Vector */
1642 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
1645 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1648 /* Set the input and output addresses and start DMA transfer */
1649 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1651 /* Process Unlocked */
1652 __HAL_UNLOCK(hcryp);
1654 /* Return function status */
1667 /** @defgroup CRYP_Exported_Functions_Group3 DMA callback functions
1668 * @brief DMA callback functions.
1671 ==============================================================================
1672 ##### DMA callback functions #####
1673 ==============================================================================
1674 [..] This section provides DMA callback functions:
1675 (+) DMA Input data transfer complete
1676 (+) DMA Output data transfer complete
1684 * @brief CRYP error callback.
1685 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1686 * the configuration information for CRYP module
1689 __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
1691 /* NOTE : This function should not be modified; when the callback is needed,
1692 the HAL_CRYP_ErrorCallback can be implemented in the user file
1697 * @brief Input transfer completed callback.
1698 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1699 * the configuration information for CRYP module
1702 __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
1704 /* NOTE : This function should not be modified; when the callback is needed,
1705 the HAL_CRYP_InCpltCallback can be implemented in the user file
1710 * @brief Output transfer completed callback.
1711 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1712 * the configuration information for CRYP module
1715 __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
1717 /* NOTE : This function should not be modified; when the callback is needed,
1718 the HAL_CRYP_OutCpltCallback can be implemented in the user file
1726 /** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
1727 * @brief CRYP IRQ handler.
1730 ==============================================================================
1731 ##### CRYP IRQ handler management #####
1732 ==============================================================================
1733 [..] This section provides CRYP IRQ handler function.
1740 * @brief This function handles CRYP interrupt request.
1741 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1742 * the configuration information for CRYP module
1745 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
1747 /* Check if error occurred*/
1748 if (__HAL_CRYP_GET_IT_SOURCE(hcryp, AES_IT_ERR) != RESET)
1750 if (__HAL_CRYP_GET_FLAG(AES_FLAG_RDERR) != RESET)
1752 __HAL_CRYP_CLEAR_FLAG(hcryp, AES_CLEARFLAG_RDERR);
1755 if (__HAL_CRYP_GET_FLAG(AES_FLAG_WRERR) != RESET)
1757 __HAL_CRYP_CLEAR_FLAG(hcryp, AES_CLEARFLAG_WRERR);
1760 if (__HAL_CRYP_GET_FLAG(AES_FLAG_CCF) != RESET)
1762 __HAL_CRYP_CLEAR_FLAG(hcryp, AES_CLEARFLAG_CCF);
1765 hcryp->State= HAL_CRYP_STATE_ERROR;
1766 /* Disable Computation Complete Interrupt */
1767 __HAL_CRYP_DISABLE_IT(AES_IT_CC);
1768 __HAL_CRYP_DISABLE_IT(AES_IT_ERR);
1770 HAL_CRYP_ErrorCallback(hcryp);
1772 /* Process Unlocked */
1773 __HAL_UNLOCK(hcryp);
1778 /* Check if computation complete interrupt was enabled*/
1779 if (__HAL_CRYP_GET_IT_SOURCE(hcryp, AES_IT_CC) != RESET)
1781 /* Clear CCF Flag */
1782 __HAL_CRYP_CLEAR_FLAG(hcryp, AES_CLEARFLAG_CCF);
1784 CRYP_EncryptDecrypt_IT(hcryp);
1792 /** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
1793 * @brief Peripheral State functions.
1796 ==============================================================================
1797 ##### Peripheral State functions #####
1798 ==============================================================================
1800 This subsection permits to get in run-time the status of the peripheral.
1807 * @brief Returns the CRYP state.
1808 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1809 * the configuration information for CRYP module
1812 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
1814 return hcryp->State;
1825 /** @addtogroup CRYP_Private_Functions
1830 * @brief IT function called under interruption context to continue encryption or decryption
1831 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1832 * the configuration information for CRYP module
1833 * @retval HAL status
1835 static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp)
1837 uint32_t inputaddr = 0, outputaddr = 0;
1839 /* Get the last Output data adress */
1840 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1842 /* Read the Output block from the Output Register */
1843 *(uint32_t*)(outputaddr) = AES->DOUTR;
1845 *(uint32_t*)(outputaddr) = AES->DOUTR;
1847 *(uint32_t*)(outputaddr) = AES->DOUTR;
1849 *(uint32_t*)(outputaddr) = AES->DOUTR;
1851 hcryp->pCrypOutBuffPtr += 16;
1852 hcryp->CrypOutCount -= 16;
1854 /* Check if all input text is encrypted or decrypted */
1855 if(hcryp->CrypOutCount == 0)
1857 /* Disable Computation Complete Interrupt */
1858 __HAL_CRYP_DISABLE_IT(AES_IT_CC);
1859 __HAL_CRYP_DISABLE_IT(AES_IT_ERR);
1861 /* Process Unlocked */
1862 __HAL_UNLOCK(hcryp);
1864 /* Change the CRYP state */
1865 hcryp->State = HAL_CRYP_STATE_READY;
1867 /* Call computation complete callback */
1868 HAL_CRYPEx_ComputationCpltCallback(hcryp);
1870 else /* Process the rest of input text */
1872 /* Get the last Intput data adress */
1873 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1875 /* Write the Input block in the Data Input register */
1876 AES->DINR = *(uint32_t*)(inputaddr);
1878 AES->DINR = *(uint32_t*)(inputaddr);
1880 AES->DINR = *(uint32_t*)(inputaddr);
1882 AES->DINR = *(uint32_t*)(inputaddr);
1883 hcryp->pCrypInBuffPtr += 16;
1884 hcryp->CrypInCount -= 16;
1889 * @brief DMA CRYP Input Data process complete callback.
1890 * @param hdma: DMA handle
1893 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
1895 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1897 /* Disable the DMA transfer for input request */
1898 CLEAR_BIT(AES->CR, AES_CR_DMAINEN);
1900 /* Call input data transfer complete callback */
1901 HAL_CRYP_InCpltCallback(hcryp);
1905 * @brief DMA CRYP Output Data process complete callback.
1906 * @param hdma: DMA handle
1909 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
1911 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1913 /* Disable the DMA transfer for output request by resetting the DMAOUTEN bit
1914 in the DMACR register */
1915 CLEAR_BIT(AES->CR, AES_CR_DMAOUTEN);
1917 /* Clear CCF Flag */
1918 __HAL_CRYP_CLEAR_FLAG(hcryp, AES_CLEARFLAG_CCF);
1921 __HAL_CRYP_DISABLE();
1923 /* Change the CRYP state to ready */
1924 hcryp->State = HAL_CRYP_STATE_READY;
1926 /* Call output data transfer complete callback */
1927 HAL_CRYP_OutCpltCallback(hcryp);
1931 * @brief DMA CRYP communication error callback.
1932 * @param hdma: DMA handle
1935 static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
1937 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1938 hcryp->State= HAL_CRYP_STATE_ERROR;
1939 HAL_CRYP_ErrorCallback(hcryp);
1943 * @brief Writes the Key in Key registers.
1944 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1945 * the configuration information for CRYP module
1946 * @param Key: Pointer to Key buffer
1947 * @note Key must be written as little endian.
1948 * If Key pointer points at address n,
1949 * n[15:0] contains key[96:127],
1950 * (n+4)[15:0] contains key[64:95],
1951 * (n+8)[15:0] contains key[32:63] and
1952 * (n+12)[15:0] contains key[0:31]
1955 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key)
1957 uint32_t keyaddr = (uint32_t)Key;
1959 AES->KEYR3 = __REV(*(uint32_t*)(keyaddr));
1961 AES->KEYR2 = __REV(*(uint32_t*)(keyaddr));
1963 AES->KEYR1 = __REV(*(uint32_t*)(keyaddr));
1965 AES->KEYR0 = __REV(*(uint32_t*)(keyaddr));
1969 * @brief Writes the InitVector/InitCounter in IV registers.
1970 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1971 * the configuration information for CRYP module
1972 * @param InitVector: Pointer to InitVector/InitCounter buffer
1973 * @note Init Vector must be written as little endian.
1974 * If Init Vector pointer points at address n,
1975 * n[15:0] contains Vector[96:127],
1976 * (n+4)[15:0] contains Vector[64:95],
1977 * (n+8)[15:0] contains Vector[32:63] and
1978 * (n+12)[15:0] contains Vector[0:31]
1981 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector)
1983 uint32_t ivaddr = (uint32_t)InitVector;
1985 AES->IVR3 = __REV(*(uint32_t*)(ivaddr));
1987 AES->IVR2 = __REV(*(uint32_t*)(ivaddr));
1989 AES->IVR1 = __REV(*(uint32_t*)(ivaddr));
1991 AES->IVR0 = __REV(*(uint32_t*)(ivaddr));
1995 * @brief Process Data: Writes Input data in polling mode and reads the output data
1996 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1997 * the configuration information for CRYP module
1998 * @param Input: Pointer to the Input buffer
1999 * @param Ilength: Length of the Input buffer, must be a multiple of 16.
2000 * @param Output: Pointer to the returned buffer
2001 * @param Timeout: Specify Timeout value
2004 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
2006 uint32_t tickstart = 0;
2009 uint32_t inputaddr = (uint32_t)Input;
2010 uint32_t outputaddr = (uint32_t)Output;
2012 for(index=0; (index < Ilength); index += 16)
2014 /* Write the Input block in the Data Input register */
2015 AES->DINR = *(uint32_t*)(inputaddr);
2017 AES->DINR = *(uint32_t*)(inputaddr);
2019 AES->DINR = *(uint32_t*)(inputaddr);
2021 AES->DINR = *(uint32_t*)(inputaddr);
2025 tickstart = HAL_GetTick();
2027 while(HAL_IS_BIT_CLR(AES->SR, AES_SR_CCF))
2029 /* Check for the Timeout */
2030 if(Timeout != HAL_MAX_DELAY)
2032 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
2035 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2037 /* Process Unlocked */
2038 __HAL_UNLOCK(hcryp);
2044 /* Clear CCF Flag */
2045 __HAL_CRYP_CLEAR_FLAG(hcryp, AES_CLEARFLAG_CCF);
2047 /* Read the Output block from the Data Output Register */
2048 *(uint32_t*)(outputaddr) = AES->DOUTR;
2050 *(uint32_t*)(outputaddr) = AES->DOUTR;
2052 *(uint32_t*)(outputaddr) = AES->DOUTR;
2054 *(uint32_t*)(outputaddr) = AES->DOUTR;
2057 /* Return function status */
2062 * @brief Set the DMA configuration and start the DMA transfer
2063 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2064 * the configuration information for CRYP module
2065 * @param inputaddr: address of the Input buffer
2066 * @param Size: Size of the Input buffer, must be a multiple of 16.
2067 * @param outputaddr: address of the Output buffer
2070 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
2072 /* Set the CRYP DMA transfer complete callback */
2073 hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
2074 /* Set the DMA error callback */
2075 hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
2077 /* Set the CRYP DMA transfer complete callback */
2078 hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
2079 /* Set the DMA error callback */
2080 hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
2082 /* Enable the DMA In DMA Stream */
2083 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&AES->DINR, Size/4);
2085 /* Enable the DMA Out DMA Stream */
2086 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&AES->DOUTR, outputaddr, Size/4);
2088 /* Enable In and Out DMA requests */
2089 SET_BIT(AES->CR, (AES_CR_DMAINEN | AES_CR_DMAOUTEN));
2092 __HAL_CRYP_ENABLE();
2099 #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE*/
2109 #endif /* HAL_CRYP_MODULE_ENABLED */
2111 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/