2 ******************************************************************************
3 * @file stm32l1xx_hal_pcd.h
4 * @author MCD Application Team
6 * @date 5-September-2014
7 * @brief Header file of PCD HAL module.
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
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18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L1xx_HAL_PCD_H
40 #define __STM32L1xx_HAL_PCD_H
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32l1xx_hal_def.h"
49 /** @addtogroup STM32L1xx_HAL_Driver
57 /* Exported types ------------------------------------------------------------*/
58 /** @defgroup PCD_Exported_Types PCD Exported Types
63 * @brief PCD State structures definition
75 /* double buffered endpoint direction */
81 /* endpoint buffer number */
90 * @brief PCD Initialization Structure definition
94 uint32_t dev_endpoints; /*!< Device Endpoints number.
95 This parameter depends on the used USB core.
96 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
98 uint32_t speed; /*!< USB Core speed.
99 This parameter can be any value of @ref USB_Core_Speed */
101 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
102 This parameter can be any value of @ref USB_EP0_MPS */
104 uint32_t phy_itface; /*!< Select the used PHY interface.
105 This parameter can be any value of @ref USB_Core_PHY */
107 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
109 uint32_t low_power_enable; /*!< Enable or disable Low Power mode */
111 uint32_t lpm_enable; /*!< Enable or disable Battery charging. */
113 uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
119 uint8_t num; /*!< Endpoint number
120 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
122 uint8_t is_in; /*!< Endpoint direction
123 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
125 uint8_t is_stall; /*!< Endpoint stall condition
126 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
128 uint8_t type; /*!< Endpoint type
129 This parameter can be any value of @ref USB_EP_Type */
131 uint16_t pmaadress; /*!< PMA Address
132 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
135 uint16_t pmaaddr0; /*!< PMA Address0
136 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
139 uint16_t pmaaddr1; /*!< PMA Address1
140 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
143 uint8_t doublebuffer; /*!< Double buffer enable
144 This parameter can be 0 or 1 */
146 uint32_t maxpacket; /*!< Endpoint Max packet size
147 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
149 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
152 uint32_t xfer_len; /*!< Current transfer length */
154 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
158 typedef USB_TypeDef PCD_TypeDef;
161 * @brief PCD Handle Structure definition
165 PCD_TypeDef *Instance; /*!< Register base address */
166 PCD_InitTypeDef Init; /*!< PCD required parameters */
167 __IO uint8_t USB_Address; /*!< USB Address */
168 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
169 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
170 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
171 __IO PCD_StateTypeDef State; /*!< PCD communication state */
172 uint32_t Setup[12]; /*!< Setup packet buffer */
173 void *pData; /*!< Pointer to upper stack Handler */
181 #include "stm32l1xx_hal_pcd_ex.h"
182 /* Exported constants --------------------------------------------------------*/
183 /** @defgroup PCD_Exported_Constants PCD Exported Constants
187 /** @defgroup USB_Exti_Line_Wakeup USB_Exti_Line_Wakeup
191 #define USB_EXTI_LINE_WAKEUP ((uint32_t)0x00040000) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
197 /** @defgroup USB_Core_Speed USB Core Speed
200 #define PCD_SPEED_HIGH 0 /* Not Supported */
201 #define PCD_SPEED_FULL 2
206 /** @defgroup USB_Core_PHY USB Core PHY
209 #define PCD_PHY_EMBEDDED 2
214 /** @defgroup USB_EP0_MPS USB EP0 MPS
217 #define DEP0CTL_MPS_64 0
218 #define DEP0CTL_MPS_32 1
219 #define DEP0CTL_MPS_16 2
220 #define DEP0CTL_MPS_8 3
222 #define PCD_EP0MPS_64 DEP0CTL_MPS_64
223 #define PCD_EP0MPS_32 DEP0CTL_MPS_32
224 #define PCD_EP0MPS_16 DEP0CTL_MPS_16
225 #define PCD_EP0MPS_08 DEP0CTL_MPS_8
230 /** @defgroup USB_EP_Type USB EP Type
233 #define PCD_EP_TYPE_CTRL 0
234 #define PCD_EP_TYPE_ISOC 1
235 #define PCD_EP_TYPE_BULK 2
236 #define PCD_EP_TYPE_INTR 3
241 /** @defgroup USB_ENDP_Type USB_ENDP_Type
245 #define PCD_ENDP0 ((uint8_t)0)
246 #define PCD_ENDP1 ((uint8_t)1)
247 #define PCD_ENDP2 ((uint8_t)2)
248 #define PCD_ENDP3 ((uint8_t)3)
249 #define PCD_ENDP4 ((uint8_t)4)
250 #define PCD_ENDP5 ((uint8_t)5)
251 #define PCD_ENDP6 ((uint8_t)6)
252 #define PCD_ENDP7 ((uint8_t)7)
255 #define PCD_SNG_BUF 0
256 #define PCD_DBL_BUF 1
258 #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
269 /* Exported macros -----------------------------------------------------------*/
271 /** @defgroup PCD_Exported_Macros PCD Exported Macros
272 * @brief macros to handle interrupts and specific clock configurations
275 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
276 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
278 #define __HAL_USB_EXTI_ENABLE_IT() EXTI->IMR |= USB_EXTI_LINE_WAKEUP
279 #define __HAL_USB_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_EXTI_LINE_WAKEUP)
280 #define __HAL_USB_EXTI_GET_FLAG() EXTI->PR & (USB_EXTI_LINE_WAKEUP)
281 #define __HAL_USB_EXTI_CLEAR_FLAG() EXTI->PR = USB_EXTI_LINE_WAKEUP
283 #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->FTSR &= ~(USB_EXTI_LINE_WAKEUP);\
284 EXTI->RTSR |= USB_EXTI_LINE_WAKEUP
287 #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER() EXTI->FTSR |= (USB_EXTI_LINE_WAKEUP);\
288 EXTI->RTSR &= ~(USB_EXTI_LINE_WAKEUP)
291 #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER() EXTI->RTSR &= ~(USB_EXTI_LINE_WAKEUP);\
292 EXTI->FTSR &= ~(USB_EXTI_LINE_WAKEUP);\
293 EXTI->RTSR |= USB_EXTI_LINE_WAKEUP;\
294 EXTI->FTSR |= USB_EXTI_LINE_WAKEUP
300 /* Internal macros -----------------------------------------------------------*/
302 /** @defgroup PCD_Private_Macros PCD Private Macros
303 * @brief macros to handle interrupts and specific clock configurations
308 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue))
311 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2))
316 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
317 * @param USBx: USB peripheral instance register address.
318 * @param bEpNum: Endpoint Number.
319 * @param wType: Endpoint Type.
322 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
323 ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) )))
326 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
327 * @param USBx: USB peripheral instance register address.
328 * @param bEpNum: Endpoint Number.
329 * @retval Endpoint Type
331 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
335 * @brief free buffer used from the application realizing it to the line
336 toggles bit SW_BUF in the double buffered endpoint register
337 * @param USBx: USB peripheral instance register address.
338 * @param bEpNum: Endpoint Number.
339 * @param bDir: Direction
342 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
344 if ((bDir) == PCD_EP_DBUF_OUT)\
345 { /* OUT double buffered endpoint */\
346 PCD_TX_DTOG((USBx), (bEpNum));\
348 else if ((bDir) == PCD_EP_DBUF_IN)\
349 { /* IN double buffered endpoint */\
350 PCD_RX_DTOG((USBx), (bEpNum));\
355 * @brief gets direction of the double buffered endpoint
356 * @param USBx: USB peripheral instance register address.
357 * @param bEpNum: Endpoint Number.
358 * @retval EP_DBUF_OUT, EP_DBUF_IN,
359 * EP_DBUF_ERR if the endpoint counter not yet programmed.
361 #define PCD_GET_DB_DIR(USBx, bEpNum)\
363 if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
364 return(PCD_EP_DBUF_OUT);\
365 else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
366 return(PCD_EP_DBUF_IN);\
368 return(PCD_EP_DBUF_ERR);\
372 * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
373 * @param USBx: USB peripheral instance register address.
374 * @param bEpNum: Endpoint Number.
375 * @param wState: new state
378 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
380 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
381 /* toggle first bit ? */ \
382 if((USB_EPTX_DTOG1 & (wState))!= 0) \
384 _wRegVal ^= USB_EPTX_DTOG1; \
386 /* toggle second bit ? */ \
387 if((USB_EPTX_DTOG2 & (wState))!= 0) \
389 _wRegVal ^= USB_EPTX_DTOG2; \
391 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
392 } /* PCD_SET_EP_TX_STATUS */
395 * @brief sets the status for rx transfer (bits STAT_TX[1:0])
396 * @param USBx: USB peripheral instance register address.
397 * @param bEpNum: Endpoint Number.
398 * @param wState: new state
401 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
402 register uint16_t _wRegVal; \
404 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
405 /* toggle first bit ? */ \
406 if((USB_EPRX_DTOG1 & (wState))!= 0) \
408 _wRegVal ^= USB_EPRX_DTOG1; \
410 /* toggle second bit ? */ \
411 if((USB_EPRX_DTOG2 & (wState))!= 0) \
413 _wRegVal ^= USB_EPRX_DTOG2; \
415 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
416 } /* PCD_SET_EP_RX_STATUS */
419 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
420 * @param USBx: USB peripheral instance register address.
421 * @param bEpNum: Endpoint Number.
422 * @param wStaterx: new state.
423 * @param wStatetx: new state.
426 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
427 register uint32_t _wRegVal; \
429 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
430 /* toggle first bit ? */ \
431 if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
433 _wRegVal ^= USB_EPRX_DTOG1; \
435 /* toggle second bit ? */ \
436 if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
438 _wRegVal ^= USB_EPRX_DTOG2; \
440 /* toggle first bit ? */ \
441 if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \
443 _wRegVal ^= USB_EPTX_DTOG1; \
445 /* toggle second bit ? */ \
446 if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \
448 _wRegVal ^= USB_EPTX_DTOG2; \
450 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
451 } /* PCD_SET_EP_TXRX_STATUS */
454 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
456 * @param USBx: USB peripheral instance register address.
457 * @param bEpNum: Endpoint Number.
460 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
462 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
465 * @brief sets directly the VALID tx/rx-status into the endpoint register
466 * @param USBx: USB peripheral instance register address.
467 * @param bEpNum: Endpoint Number.
470 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
472 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
475 * @brief checks stall condition in an endpoint.
476 * @param USBx: USB peripheral instance register address.
477 * @param bEpNum: Endpoint Number.
478 * @retval TRUE = endpoint in stall condition.
480 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
482 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
486 * @brief set & clear EP_KIND bit.
487 * @param USBx: USB peripheral instance register address.
488 * @param bEpNum: Endpoint Number.
491 #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
492 (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK))))
493 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
494 (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
497 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
498 * @param USBx: USB peripheral instance register address.
499 * @param bEpNum: Endpoint Number.
502 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
503 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
506 * @brief Sets/clears directly EP_KIND bit in the endpoint register.
507 * @param USBx: USB peripheral instance register address.
508 * @param bEpNum: Endpoint Number.
511 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
512 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
515 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
516 * @param USBx: USB peripheral instance register address.
517 * @param bEpNum: Endpoint Number.
520 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
521 PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK))
522 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
523 PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK))
526 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
527 * @param USBx: USB peripheral instance register address.
528 * @param bEpNum: Endpoint Number.
531 #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
532 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
533 #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
534 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
537 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
538 * @param USBx: USB peripheral instance register address.
539 * @param bEpNum: Endpoint Number.
542 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\
544 PCD_RX_DTOG((USBx), (bEpNum)); \
546 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\
548 PCD_TX_DTOG((USBx), (bEpNum)); \
552 * @brief Sets address in an endpoint register.
553 * @param USBx: USB peripheral instance register address.
554 * @param bEpNum: Endpoint Number.
555 * @param bAddr: Address.
558 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
559 USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr))
561 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
563 #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8)*2+ ((uint32_t)(USBx) + 0x400)))
564 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+2)*2+ ((uint32_t)(USBx) + 0x400)))
565 #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+4)*2+ ((uint32_t)(USBx) + 0x400)))
566 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+6)*2+ ((uint32_t)(USBx) + 0x400)))
568 #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
569 uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
570 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
574 * @brief sets address of the tx/rx buffer.
575 * @param USBx: USB peripheral instance register address.
576 * @param bEpNum: Endpoint Number.
577 * @param wAddr: address to be set (must be word aligned).
580 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
581 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
584 * @brief Gets address of the tx/rx buffer.
585 * @param USBx: USB peripheral instance register address.
586 * @param bEpNum: Endpoint Number.
587 * @retval address of the buffer.
589 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
590 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
593 * @brief Sets counter of rx buffer with no. of blocks.
594 * @param dwReg: Register
595 * @param wCount: Counter.
596 * @param wNBlocks: no. of Blocks.
599 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
600 (wNBlocks) = (wCount) >> 5;\
601 if(((wCount) & 0x1f) == 0)\
605 *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \
606 }/* PCD_CALC_BLK32 */
608 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
609 (wNBlocks) = (wCount) >> 1;\
610 if(((wCount) & 0x1) != 0)\
614 *pdwReg = (uint16_t)((wNBlocks) << 10);\
617 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
621 PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
625 PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
627 }/* PCD_SET_EP_CNT_RX_REG */
629 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
630 uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
631 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
634 * @brief sets counter for the tx/rx buffer.
635 * @param USBx: USB peripheral instance register address.
636 * @param bEpNum: Endpoint Number.
637 * @param wCount: Counter value.
640 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
644 * @brief gets counter of the tx buffer.
645 * @param USBx: USB peripheral instance register address.
646 * @param bEpNum: Endpoint Number.
647 * @retval Counter value
649 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
650 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
653 * @brief Sets buffer 0/1 address in a double buffer endpoint.
654 * @param USBx: USB peripheral instance register address.
655 * @param bEpNum: Endpoint Number.
656 * @param wBuf0Addr: buffer 0 address.
657 * @retval Counter value
659 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
660 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
663 * @brief Sets addresses in a double buffer endpoint.
664 * @param USBx: USB peripheral instance register address.
665 * @param bEpNum: Endpoint Number.
666 * @param wBuf0Addr: buffer 0 address.
667 * @param wBuf1Addr = buffer 1 address.
670 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
671 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
672 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
673 } /* PCD_SET_EP_DBUF_ADDR */
676 * @brief Gets buffer 0/1 address of a double buffer endpoint.
677 * @param USBx: USB peripheral instance register address.
678 * @param bEpNum: Endpoint Number.
681 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
682 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
685 * @brief Gets buffer 0/1 address of a double buffer endpoint.
686 * @param USBx: USB peripheral instance register address.
687 * @param bEpNum: Endpoint Number.
688 * @param bDir: endpoint dir EP_DBUF_OUT = OUT
690 * @param wCount: Counter value
693 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
694 if((bDir) == PCD_EP_DBUF_OUT)\
696 {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
697 else if((bDir) == PCD_EP_DBUF_IN)\
699 *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
700 } /* SetEPDblBuf0Count*/
702 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
703 if((bDir) == PCD_EP_DBUF_OUT)\
704 {/* OUT endpoint */ \
705 PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
707 else if((bDir) == PCD_EP_DBUF_IN)\
709 *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
711 } /* SetEPDblBuf1Count */
713 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
714 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
715 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
716 } /* PCD_SET_EP_DBUF_CNT */
719 * @brief Gets buffer 0/1 rx/tx counter for double buffering.
720 * @param USBx: USB peripheral instance register address.
721 * @param bEpNum: Endpoint Number.
724 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
725 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
732 /* Exported functions --------------------------------------------------------*/
734 /** @addtogroup PCD_Exported_Functions
738 /* Initialization/de-initialization functions **********************************/
741 /** @addtogroup PCD_Exported_Functions_Group1
745 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
746 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
747 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
748 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
754 /* I/O operation functions *****************************************************/
755 /* Non-Blocking mode: Interrupt */
756 /** @addtogroup PCD_Exported_Functions_Group2
760 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
761 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
762 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
764 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
765 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
766 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
767 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
768 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
769 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
770 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
771 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
772 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
773 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
774 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
780 /* Peripheral Control functions ************************************************/
781 /** @addtogroup PCD_Exported_Functions_Group3
784 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
785 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
786 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
787 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
788 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
789 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
790 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
791 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
792 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
793 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
794 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
795 HAL_StatusTypeDef HAL_PCD_ActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
796 HAL_StatusTypeDef HAL_PCD_DeActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
802 /* Peripheral State functions **************************************************/
803 /** @addtogroup PCD_Exported_Functions_Group4
806 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
807 void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
831 #endif /* __STM32L1xx_HAL_PCD_H */
833 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/