2 ******************************************************************************
3 * @file stm32l1xx_hal_tim_ex.h
4 * @author MCD Application Team
6 * @date 5-September-2014
7 * @brief Header file of TIM HAL Extension module.
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L1xx_HAL_TIM_EX_H
40 #define __STM32L1xx_HAL_TIM_EX_H
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32l1xx_hal_def.h"
49 /** @addtogroup STM32L1xx_HAL_Driver
57 /* Exported types ------------------------------------------------------------*/
58 /** @defgroup TIMEx_Exported_Types TIMEx Exported Types
63 * @brief TIM Master configuration Structure definition
66 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
67 This parameter can be a value of @ref TIM_Master_Mode_Selection */
68 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
69 This parameter can be a value of @ref TIM_Master_Slave_Mode */
70 }TIM_MasterConfigTypeDef;
77 /* Exported constants --------------------------------------------------------*/
78 /** @defgroup TIMEx_Exported_Constants TIMEx_Exported_Constants
82 /** @defgroup TIMEx_Remap TIMEx_Remap
86 #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
87 #define TIM_TIM2_ITR1_TIM10_OC (0x00000000) /* !< TIM2 ITR1 input is connected to TIM10 OC */
88 #define TIM_TIM2_ITR1_TIM5_TGO TIM2_OR_ITR1_RMP /* !< TIM2 ITR1 input is connected to TIM5 TGO */
89 #endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) */
91 #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
92 #define TIM_TIM3_ITR2_TIM11_OC (0x00000000) /* !< TIM3 ITR2 input is connected to TIM11 OC */
93 #define TIM_TIM3_ITR2_TIM5_TGO TIM2_OR_ITR1_RMP /* !< TIM3 ITR2 input is connected to TIM5 TGO */
94 #endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) */
96 #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
97 #define TIM_TIM9_ITR1_TIM3_TGO (0x00000000) /* !< TIM9 ITR1 input is connected to TIM3 TGO */
98 #define TIM_TIM9_ITR1_TS TIM9_OR_ITR1_RMP /* !< TIM9 ITR1 input is connected to touch sensing I/O */
99 #endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) */
100 #define TIM_TIM9_GPIO (0x00000000) /* !< TIM9 Channel1 is connected to GPIO */
101 #define TIM_TIM9_LSE TIM_OR_TI1RMP_0 /* !< TIM9 Channel1 is connected to LSE internal clock */
102 #define TIM_TIM9_GPIO1 TIM_OR_TI1RMP_1 /* !< TIM9 Channel1 is connected to GPIO */
103 #define TIM_TIM9_GPIO2 TIM_OR_TI1RMP /* !< TIM9 Channel1 is connected to GPIO */
106 #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
107 #define TIM_TIM10_TI1RMP (0x00000000) /* !< TIM10 Channel 1 depends on TI1_RMP */
108 #define TIM_TIM10_RI TIM_OR_TI1_RMP_RI /* !< TIM10 Channel 1 is connected to RI */
109 #define TIM_TIM10_ETR_LSE (0x00000000) /* !< TIM10 ETR input is connected to LSE clock */
110 #define TIM_TIM10_ETR_TIM9_TGO TIM_OR_ETR_RMP /* !< TIM10 ETR input is connected to TIM9 TGO */
111 #endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) */
112 #define TIM_TIM10_GPIO (0x00000000) /* !< TIM10 Channel1 is connected to GPIO */
113 #define TIM_TIM10_LSI TIM_OR_TI1RMP_0 /* !< TIM10 Channel1 is connected to LSI internal clock */
114 #define TIM_TIM10_LSE TIM_OR_TI1RMP_1 /* !< TIM10 Channel1 is connected to LSE internal clock */
115 #define TIM_TIM10_RTC TIM_OR_TI1RMP /* !< TIM10 Channel1 is connected to RTC wakeup interrupt */
117 #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
118 #define TIM_TIM11_TI1RMP (0x00000000) /* !< TIM11 Channel 1 depends on TI1_RMP */
119 #define TIM_TIM11_RI TIM_OR_TI1_RMP_RI /* !< TIM11 Channel 1 is connected to RI */
120 #define TIM_TIM11_ETR_LSE (0x00000000) /* !< TIM11 ETR input is connected to LSE clock */
121 #define TIM_TIM11_ETR_TIM9_TGO TIM_OR_ETR_RMP /* !< TIM11 ETR input is connected to TIM9 TGO */
122 #endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) */
123 #define TIM_TIM11_GPIO (0x00000000) /* !< TIM11 Channel1 is connected to GPIO */
124 #define TIM_TIM11_MSI TIM_OR_TI1RMP_0 /* !< TIM11 Channel1 is connected to MSI internal clock */
125 #define TIM_TIM11_HSE_RTC TIM_OR_TI1RMP_1 /* !< TIM11 Channel1 is connected to HSE_RTC clock */
126 #define TIM_TIM11_GPIO1 TIM_OR_TI1RMP /* !< TIM11 Channel1 is connected to GPIO */
129 #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
130 #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
131 ( (((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_ITR1_TIM10_OC) || ((TIM_REMAP) == TIM_TIM2_ITR1_TIM5_TGO))) || \
132 (((INSTANCE) == TIM3) && (((TIM_REMAP) == TIM_TIM3_ITR2_TIM11_OC) || ((TIM_REMAP) == TIM_TIM3_ITR2_TIM5_TGO))) || \
133 (((INSTANCE) == TIM9) && ((TIM_REMAP) <= (TIM_TIM9_ITR1_TS | TIM_TIM9_GPIO2))) || \
134 (((INSTANCE) == TIM10) && ((TIM_REMAP) <= (TIM_TIM10_RI | TIM_TIM10_ETR_TIM9_TGO | TIM_TIM10_RTC))) || \
135 (((INSTANCE) == TIM11) && ((TIM_REMAP) <= (TIM_TIM11_RI | TIM_TIM11_ETR_TIM9_TGO | TIM_TIM11_GPIO1))) \
137 #else /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) */
138 #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
139 ( (((INSTANCE) == TIM9) && (((TIM_REMAP) == TIM_TIM9_GPIO) || ((TIM_REMAP) == TIM_TIM9_LSE) || ((TIM_REMAP) == TIM_TIM9_GPIO1) || ((TIM_REMAP) == TIM_TIM9_GPIO2))) || \
140 (((INSTANCE) == TIM10) && (((TIM_REMAP) == TIM_TIM10_GPIO) || ((TIM_REMAP) == TIM_TIM10_LSI) || ((TIM_REMAP) == TIM_TIM10_LSE) || ((TIM_REMAP) == TIM_TIM10_RTC))) || \
141 (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || ((TIM_REMAP) == TIM_TIM11_MSI) || ((TIM_REMAP) == TIM_TIM11_HSE_RTC) || ((TIM_REMAP) == TIM_TIM11_GPIO1))) \
154 /* Exported macro ------------------------------------------------------------*/
156 /* Exported functions --------------------------------------------------------*/
157 /** @addtogroup TIMEx_Exported_Functions
161 /** @addtogroup TIMEx_Exported_Functions_Group1
164 /* Extension Control functions ************************************************/
165 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
166 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
171 /** @addtogroup TIMEx_Exported_Functions_Group2
179 /* Extension Callback *********************************************************/
181 /** @addtogroup TIMEx_Exported_Functions_Group3
188 /* Extension Peripheral State functions **************************************/
210 #endif /* __STM32L1xx_HAL_TIM_EX_H */
212 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/