1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
16 #include "mbed_assert.h"
23 #include "mbed_error.h"
25 static const PinMap PinMap_I2C_SDA[] = {
26 {PB_7, I2C_1, STM_PIN_DATA(2, 4)},
27 {PB_9, I2C_1, STM_PIN_DATA(2, 4)},
28 {PB_11, I2C_2, STM_PIN_DATA(2, 4)},
29 {PC_9, I2C_3, STM_PIN_DATA(2, 4)},
30 {PF_0, I2C_2, STM_PIN_DATA(2, 4)},
31 {PH_5, I2C_2, STM_PIN_DATA(2, 4)},
32 {PH_8, I2C_3, STM_PIN_DATA(2, 4)},
36 static const PinMap PinMap_I2C_SCL[] = {
37 {PA_8, I2C_3, STM_PIN_DATA(2, 4)},
38 {PB_6, I2C_1, STM_PIN_DATA(2, 4)},
39 {PB_8, I2C_1, STM_PIN_DATA(2, 4)},
40 {PB_10, I2C_2, STM_PIN_DATA(2, 4)},
41 {PF_1, I2C_2, STM_PIN_DATA(2, 4)},
42 {PH_4, I2C_2, STM_PIN_DATA(2, 4)},
43 {PH_7, I2C_3, STM_PIN_DATA(2, 4)},
47 static const uint32_t I2C_addr_offset[2][4] = {
48 {0x0C, 0x20, 0x24, 0x28},
49 {0x30, 0x34, 0x38, 0x3C}
53 static inline void i2c_interface_enable(i2c_t *obj) {
54 obj->i2c->CR1 |= I2C_CR1_PE;
57 static inline void i2c_interface_disable(i2c_t *obj) {
58 obj->i2c->CR1 &= ~I2C_CR1_PE;
62 static inline void i2c_power_enable(i2c_t *obj) {
63 switch ((int)obj->i2c) {
65 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
66 RCC->APB1ENR |= RCC_APB1ENR_I2C1EN;
69 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOFEN |
71 RCC->APB1ENR |= RCC_APB1ENR_I2C2EN;
74 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOCEN |
76 RCC->APB1ENR |= RCC_APB1ENR_I2C3EN;
81 static inline void i2c_wait_status(i2c_t *obj, uint32_t sr1_mask,
83 while (!(((obj->i2c->SR1 & sr1_mask) >= sr1_mask) &&
84 ((obj->i2c->SR2 & sr2_mask) == sr2_mask)));
87 // Wait until the slave address has been acknowledged
88 static inline void i2c_wait_addr_tx(i2c_t *obj) {
89 uint32_t sr1_mask = I2C_SR1_ADDR | I2C_SR1_TXE;
90 uint32_t sr2_mask = I2C_SR2_MSL | I2C_SR2_BUSY | I2C_SR2_TRA;
91 i2c_wait_status(obj, sr1_mask, sr2_mask);
94 // Wait until the slave address has been acknowledged
95 static inline void i2c_wait_addr_rx(i2c_t *obj) {
96 uint32_t sr1_mask = I2C_SR1_ADDR;
97 uint32_t sr2_mask = I2C_SR2_MSL | I2C_SR2_BUSY;
98 i2c_wait_status(obj, sr1_mask, sr2_mask);
102 // Wait until a byte has been sent
103 static inline void i2c_wait_send(i2c_t *obj) {
104 uint32_t sr1_mask = I2C_SR1_BTF | I2C_SR1_TXE;
105 uint32_t sr2_mask = I2C_SR2_MSL | I2C_SR2_BUSY | I2C_SR2_TRA;
106 i2c_wait_status(obj, sr1_mask, sr2_mask);
109 // Wait until a byte has been received
110 static inline void i2c_wait_receive(i2c_t *obj) {
111 uint32_t sr1_mask = I2C_SR1_RXNE;
112 uint32_t sr2_mask = I2C_SR2_MSL | I2C_SR2_BUSY;
113 i2c_wait_status(obj, sr1_mask, sr2_mask);
116 // Wait until the start condition has been accepted
117 static inline void i2c_wait_start(i2c_t *obj) {
118 uint32_t sr1_mask = I2C_SR1_SB;
119 uint32_t sr2_mask = I2C_SR2_MSL | I2C_SR2_BUSY;
120 i2c_wait_status(obj, sr1_mask, sr2_mask);
123 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
124 // determine the SPI to use
125 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
126 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
127 obj->i2c = (I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
128 MBED_ASSERT((int)obj->i2c != NC);
131 i2c_power_enable(obj);
133 pinmap_pinout(sda, PinMap_I2C_SDA);
134 pinmap_pinout(scl, PinMap_I2C_SCL);
136 pin_mode(sda, OpenDrain);
137 pin_mode(scl, OpenDrain);
139 // Force reset if the bus is stuck in the BUSY state
140 if (obj->i2c->SR2 & I2C_SR2_BUSY) {
141 obj->i2c->CR1 |= I2C_CR1_SWRST;
142 obj->i2c->CR1 &= ~I2C_CR1_SWRST;
145 // Set the peripheral clock frequency
148 // set default frequency at 100k
149 i2c_frequency(obj, 100000);
150 i2c_interface_enable(obj);
153 inline int i2c_start(i2c_t *obj) {
154 // Wait until we are not busy any more
155 while (obj->i2c->SR2 & I2C_SR2_BUSY);
157 // Generate the start condition
158 obj->i2c->CR1 |= I2C_CR1_START;
164 inline int i2c_stop(i2c_t *obj) {
165 // Generate the stop condition
166 obj->i2c->CR1 |= I2C_CR1_STOP;
171 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
172 obj->i2c->DR = value;
176 static inline int i2c_do_read(i2c_t *obj, int last) {
178 // Don't acknowledge the byte
179 obj->i2c->CR1 &= ~(I2C_CR1_ACK);
181 // Acknowledge the byte
182 obj->i2c->CR1 |= I2C_CR1_ACK;
185 // Wait until we receive the byte
186 i2c_wait_receive(obj);
188 int data = obj->i2c->DR;
192 void i2c_frequency(i2c_t *obj, int hz) {
193 i2c_interface_disable(obj);
194 obj->i2c->CCR &= ~(I2C_CCR_CCR | I2C_CCR_FS);
197 obj->i2c->CCR |= I2C_CCR_FS;
198 int result = 42000000 / (hz * 3);
199 obj->i2c->CCR |= result & I2C_CCR_CCR;
200 obj->i2c->TRISE = ((42 * 300) / 1000) + 1;
204 obj->i2c->CCR &= ~I2C_CCR_FS;
205 int result = 42000000 / (hz << 1);
206 result = result < 0x4 ? 0x4 : result;
207 obj->i2c->CCR |= result & I2C_CCR_CCR;
208 obj->i2c->TRISE = 42 + 1;
210 i2c_interface_enable(obj);
213 // The I2C does a read or a write as a whole operation
214 // There are two types of error conditions it can encounter
215 // 1) it can not obtain the bus
216 // 2) it gets error responses at part of the transmission
218 // We tackle them as follows:
219 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
220 // which basically turns it in to a 2)
221 // 2) on error, we use the standard error mechanisms to report/debug
223 // Therefore an I2C transaction should always complete. If it doesn't it is usually
224 // because something is setup wrong (e.g. wiring), and we don't need to programatically
227 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
232 // Send the slave address
233 i2c_do_write(obj, (address | 0x01), 1);
235 // Wait until we have transmitted and the ADDR byte is set
236 i2c_wait_addr_rx(obj);
238 // Read in all except last byte
239 for (count = 0; count < (length - 1); count++) {
240 int value = i2c_do_read(obj, 0);
241 data[count] = (char) value;
245 int value = i2c_do_read(obj, 1);
246 data[count] = (char) value;
248 // If not repeated start, send stop.
256 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
261 // Send the slave address
262 i2c_do_write(obj, (address & 0xFE), 1);
263 i2c_wait_addr_tx(obj);
265 for (i=0; i<length; i++) {
266 i2c_do_write(obj, data[i], 0);
270 // If not repeated start, send stop.
278 void i2c_reset(i2c_t *obj) {
282 int i2c_byte_read(i2c_t *obj, int last) {
283 return (i2c_do_read(obj, last) & 0xFF);
286 int i2c_byte_write(i2c_t *obj, int data) {
287 i2c_do_write(obj, (data & 0xFF), 0);
290 // TODO: Should return whether write has been acknowledged