3 Copyright (c) 2011-2015 ARM Limited
5 Licensed under the Apache License, Version 2.0 (the "License");
6 you may not use this file except in compliance with the License.
7 You may obtain a copy of the License at
9 http://www.apache.org/licenses/LICENSE-2.0
11 Unless required by applicable law or agreed to in writing, software
12 distributed under the License is distributed on an "AS IS" BASIS,
13 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 See the License for the specific language governing permissions and
15 limitations under the License.
19 "ARM7TDMI-S": ["ARM7"],
20 "Cortex-M0" : ["M0", "CORTEX_M"],
21 "Cortex-M0+": ["M0P", "CORTEX_M"],
22 "Cortex-M1" : ["M1", "CORTEX_M"],
23 "Cortex-M3" : ["M3", "CORTEX_M"],
24 "Cortex-M4" : ["M4", "CORTEX_M"],
25 "Cortex-M4F" : ["M4", "CORTEX_M"],
26 "Cortex-M7" : ["M7", "CORTEX_M"],
27 "Cortex-M7F" : ["M7", "CORTEX_M"],
28 "Cortex-A9" : ["A9", "CORTEX_A"]
35 from workspace_tools.patch import patch
36 from paths import TOOLS_BOOTLOADERS
43 # Is the disk provided by the interface chip of this board virtual?
44 self.is_disk_virtual = False
46 # list of toolchains that are supported by the mbed SDK for this target
47 self.supported_toolchains = None
49 # list of extra specific labels
50 self.extra_labels = []
55 # Default online compiler:
56 self.default_toolchain = "ARM"
58 self.name = self.__class__.__name__
60 # Code used to determine devices' platform
61 # This code is prefix in URL link provided in mbed.htm (in mbed disk)
64 def program_cycle_s(self):
65 return 4 if self.is_disk_virtual else 1.5
68 return [self.name] + CORE_LABELS[self.core] + self.extra_labels
70 def init_hooks(self, hook, toolchain_name):
76 # This class implements the post-link patching step needed by LPC targets
77 class LPCTarget(Target):
81 def init_hooks(self, hook, toolchain_name):
82 hook.hook_add_binary("post", self.lpc_patch)
85 def lpc_patch(t_self, resources, elf, binf):
86 t_self.debug("LPC Patch: %s" % os.path.split(binf)[1])
89 class LPC11C24(LPCTarget):
91 LPCTarget.__init__(self)
92 self.core = "Cortex-M0"
93 self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11CXX']
94 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
96 class LPC1114(LPCTarget):
98 LPCTarget.__init__(self)
99 self.core = "Cortex-M0"
100 self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11XX']
101 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"]
102 self.default_toolchain = "uARM"
104 class LPC11U24(LPCTarget):
106 LPCTarget.__init__(self)
107 self.core = "Cortex-M0"
108 self.extra_labels = ['NXP', 'LPC11UXX', 'LPC11U24_401']
109 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
110 self.default_toolchain = "uARM"
111 self.detect_code = ["1040"]
113 class OC_MBUINO(LPC11U24):
115 LPC11U24.__init__(self)
116 self.core = "Cortex-M0"
117 self.extra_labels = ['NXP', 'LPC11UXX']
118 self.macros = ['TARGET_LPC11U24']
119 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
120 self.default_toolchain = "uARM"
122 class LPC11U24_301(LPCTarget):
124 LPCTarget.__init__(self)
125 self.core = "Cortex-M0"
126 self.extra_labels = ['NXP', 'LPC11UXX']
127 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
129 class LPC11U34_421(LPCTarget):
131 LPCTarget.__init__(self)
132 self.core = "Cortex-M0"
133 self.extra_labels = ['NXP', 'LPC11UXX']
134 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
135 self.default_toolchain = "uARM"
137 class APPNEARME_MICRONFCBOARD(LPC11U34_421):
139 LPC11U34_421.__init__(self)
140 self.macros = ['LPC11U34_421']
141 self.is_disk_virtual = True
143 class LPC11U35_401(LPCTarget):
145 LPCTarget.__init__(self)
146 self.core = "Cortex-M0"
147 self.extra_labels = ['NXP', 'LPC11UXX']
148 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"]
149 self.default_toolchain = "uARM"
151 class LPC11U35_501(LPCTarget):
153 LPCTarget.__init__(self)
154 self.core = "Cortex-M0"
155 self.extra_labels = ['NXP', 'LPC11UXX', 'MCU_LPC11U35_501']
156 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR" , "IAR"]
157 self.default_toolchain = "uARM"
159 class LPC11U35_Y5_MBUG(LPCTarget):
161 LPCTarget.__init__(self)
162 self.core = "Cortex-M0"
163 self.extra_labels = ['NXP', 'LPC11UXX', 'MCU_LPC11U35_501']
164 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR" , "IAR"]
165 self.default_toolchain = "uARM"
167 class LPC11U37_501(LPCTarget):
169 LPCTarget.__init__(self)
170 self.core = "Cortex-M0"
171 self.extra_labels = ['NXP', 'LPC11UXX']
172 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"]
173 self.default_toolchain = "uARM"
175 class LPCCAPPUCCINO(LPC11U37_501):
177 LPC11U37_501.__init__(self)
179 class ARCH_GPRS(LPCTarget):
181 LPCTarget.__init__(self)
182 self.core = "Cortex-M0"
183 self.extra_labels = ['NXP', 'LPC11UXX', 'LPC11U37_501']
184 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"]
185 self.default_toolchain = "uARM"
186 self.supported_form_factors = ["ARDUINO"]
188 class LPC11U68(LPCTarget):
190 LPCTarget.__init__(self)
191 self.core = "Cortex-M0+"
192 self.extra_labels = ['NXP', 'LPC11U6X']
193 self.supported_toolchains = ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"]
194 self.default_toolchain = "uARM"
195 self.supported_form_factors = ["ARDUINO"]
196 self.detect_code = ["1168"]
198 class LPC1347(LPCTarget):
200 LPCTarget.__init__(self)
201 self.core = "Cortex-M3"
202 self.extra_labels = ['NXP', 'LPC13XX']
203 self.supported_toolchains = ["ARM", "GCC_ARM","IAR"]
205 class LPC1549(LPCTarget):
207 LPCTarget.__init__(self)
208 self.core = "Cortex-M3"
209 self.extra_labels = ['NXP', 'LPC15XX']
210 self.supported_toolchains = ["uARM", "GCC_CR", "GCC_ARM", "IAR"]
211 self.default_toolchain = "uARM"
212 self.supported_form_factors = ["ARDUINO"]
213 self.detect_code = ["1549"]
215 class LPC1768(LPCTarget):
217 LPCTarget.__init__(self)
218 self.core = "Cortex-M3"
219 self.extra_labels = ['NXP', 'LPC176X', 'MBED_LPC1768']
220 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
221 self.detect_code = ["1010"]
223 class ARCH_PRO(LPCTarget):
225 LPCTarget.__init__(self)
226 self.core = "Cortex-M3"
227 self.extra_labels = ['NXP', 'LPC176X']
228 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
229 self.macros = ['TARGET_LPC1768']
230 self.supported_form_factors = ["ARDUINO"]
232 class UBLOX_C027(LPCTarget):
234 LPCTarget.__init__(self)
235 self.core = "Cortex-M3"
236 self.extra_labels = ['NXP', 'LPC176X']
237 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
238 self.macros = ['TARGET_LPC1768']
239 self.supported_form_factors = ["ARDUINO"]
241 class LPC2368(LPCTarget):
243 LPCTarget.__init__(self)
244 self.core = "ARM7TDMI-S"
245 self.extra_labels = ['NXP', 'LPC23XX']
246 self.supported_toolchains = ["ARM", "GCC_ARM", "GCC_CR"]
248 class LPC810(LPCTarget):
250 LPCTarget.__init__(self)
251 self.core = "Cortex-M0+"
252 self.extra_labels = ['NXP', 'LPC81X']
253 self.supported_toolchains = ["uARM", "IAR"]
254 self.default_toolchain = "uARM"
255 self.is_disk_virtual = True
257 class LPC812(LPCTarget):
259 LPCTarget.__init__(self)
260 self.core = "Cortex-M0+"
261 self.extra_labels = ['NXP', 'LPC81X']
262 self.supported_toolchains = ["uARM", "IAR"]
263 self.default_toolchain = "uARM"
264 self.supported_form_factors = ["ARDUINO"]
265 self.is_disk_virtual = True
266 self.detect_code = ["1050"]
268 class LPC824(LPCTarget):
270 LPCTarget.__init__(self)
271 self.core = "Cortex-M0+"
272 self.extra_labels = ['NXP', 'LPC82X']
273 self.supported_toolchains = ["uARM", "GCC_ARM","GCC_CR", "IAR"]
274 self.default_toolchain = "uARM"
275 self.supported_form_factors = ["ARDUINO"]
276 self.is_disk_virtual = True
278 class SSCI824(LPCTarget):
280 LPCTarget.__init__(self)
281 self.core = "Cortex-M0+"
282 self.extra_labels = ['NXP', 'LPC82X']
283 self.supported_toolchains = ["uARM", "GCC_ARM"]
284 self.default_toolchain = "uARM"
285 self.is_disk_virtual = True
287 class LPC4088(LPCTarget):
289 LPCTarget.__init__(self)
290 self.core = "Cortex-M4F"
291 self.extra_labels = ['NXP', 'LPC408X']
292 self.supported_toolchains = ["ARM", "GCC_CR", "GCC_ARM", "IAR"]
293 self.is_disk_virtual = True
295 def init_hooks(self, hook, toolchain_name):
296 if toolchain_name in ['ARM_STD', 'ARM_MICRO']:
297 hook.hook_add_binary("post", self.binary_hook)
300 def binary_hook(t_self, resources, elf, binf):
301 if not os.path.isdir(binf):
302 # Regular binary file, nothing to do
303 LPCTarget.lpc_patch(t_self, resources, elf, binf)
305 outbin = open(binf + ".temp", "wb")
306 partf = open(os.path.join(binf, "ER_IROM1"), "rb")
307 # Pad the fist part (internal flash) with 0xFF to 512k
310 outbin.write('\xFF' * (512*1024 - len(data)))
312 # Read and append the second part (external flash) in chunks of fixed size
313 chunksize = 128 * 1024
314 partf = open(os.path.join(binf, "ER_IROM2"), "rb")
316 data = partf.read(chunksize)
318 if len(data) < chunksize:
322 # Remove the directory with the binary parts and rename the temporary
324 shutil.rmtree(binf, True)
325 os.rename(binf + '.temp', binf)
326 t_self.debug("Generated custom binary file (internal flash + SPIFI)")
327 LPCTarget.lpc_patch(t_self, resources, elf, binf)
329 class LPC4088_DM(LPC4088):
332 class LPC4330_M4(LPCTarget):
334 LPCTarget.__init__(self)
335 self.core = "Cortex-M4F"
336 self.extra_labels = ['NXP', 'LPC43XX', 'LPC4330']
337 self.supported_toolchains = ["ARM", "GCC_CR", "IAR", "GCC_ARM"]
339 class LPC4330_M0(LPCTarget):
341 LPCTarget.__init__(self)
342 self.core = "Cortex-M0"
343 self.extra_labels = ['NXP', 'LPC43XX', 'LPC4330']
344 self.supported_toolchains = ["ARM", "GCC_CR", "IAR"]
346 class LPC4337(LPCTarget):
348 Target.__init__(self)
349 self.core = "Cortex-M4F"
350 self.extra_labels = ['NXP', 'LPC43XX', 'LPC4337']
351 self.supported_toolchains = ["ARM"]
353 class LPC1800(LPCTarget):
355 LPCTarget.__init__(self)
356 self.core = "Cortex-M3"
357 self.extra_labels = ['NXP', 'LPC43XX']
358 self.supported_toolchains = ["ARM", "GCC_CR", "IAR"]
360 class LPC11U37H_401(LPCTarget):
362 LPCTarget.__init__(self)
363 self.core = "Cortex-M0"
364 self.extra_labels = ['NXP', 'LPC11UXX']
365 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
366 self.default_toolchain = "uARM"
367 self.supported_form_factors = ["ARDUINO"]
374 Target.__init__(self)
375 self.core = "Cortex-M0+"
376 self.extra_labels = ['Freescale', 'KLXX']
377 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
378 self.default_toolchain = "uARM"
379 self.supported_form_factors = ["ARDUINO"]
380 self.is_disk_virtual = True
384 Target.__init__(self)
385 self.core = "Cortex-M0+"
386 self.extra_labels = ['Freescale', 'KLXX']
387 self.supported_toolchains = ["ARM", "GCC_CW_EWL", "GCC_CW_NEWLIB", "GCC_ARM","IAR"]
388 self.supported_form_factors = ["ARDUINO"]
389 self.is_disk_virtual = True
390 self.detect_code = ["0200"]
394 Target.__init__(self)
395 self.core = "Cortex-M0+"
396 self.extra_labels = ['Freescale', 'KLXX']
397 self.supported_toolchains = ["GCC_ARM", "ARM"]
398 self.supported_form_factors = ["ARDUINO"]
399 self.is_disk_virtual = True
403 Target.__init__(self)
404 self.core = "Cortex-M0+"
405 self.extra_labels = ['Freescale', 'KLXX']
406 self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"]
407 self.supported_form_factors = ["ARDUINO"]
408 self.is_disk_virtual = True
409 self.detect_code = ["0220"]
411 class K20D50M(Target):
413 Target.__init__(self)
414 self.core = "Cortex-M4"
415 self.extra_labels = ['Freescale', 'K20XX']
416 self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"]
417 self.is_disk_virtual = True
418 self.detect_code = ["0230"]
420 class TEENSY3_1(Target):
424 Target.__init__(self)
425 self.core = "Cortex-M4"
426 self.extra_labels = ['Freescale', 'K20XX', 'K20DX256']
427 self.supported_toolchains = ["GCC_ARM", "ARM"]
428 self.is_disk_virtual = True
429 self.detect_code = ["0230"]
432 def init_hooks(self, hook, toolchain_name):
433 if toolchain_name in ['ARM_STD', 'ARM_MICRO', 'GCC_ARM']:
434 hook.hook_add_binary("post", self.binary_hook)
437 def binary_hook(t_self, resources, elf, binf):
438 from intelhex import IntelHex
440 binh.loadbin(binf, offset = 0)
442 with open(binf.replace(".bin", ".hex"), "w") as f:
443 binh.tofile(f, format='hex')
447 Target.__init__(self)
448 self.core = "Cortex-M4F"
449 self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE']
450 self.macros = ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"]
451 self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
452 self.supported_form_factors = ["ARDUINO"]
453 self.is_disk_virtual = True
454 self.detect_code = ["0201"]
458 Target.__init__(self)
459 self.core = "Cortex-M4F"
460 self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F', 'FRDM']
461 self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"]
462 self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
463 self.supported_form_factors = ["ARDUINO"]
464 self.is_disk_virtual = True
465 self.default_toolchain = "ARM"
466 self.detect_code = ["0240"]
468 class MTS_GAMBIT(Target):
470 Target.__init__(self)
471 self.core = "Cortex-M4F"
472 self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F']
473 self.supported_toolchains = ["ARM", "GCC_ARM"]
474 self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"]
475 self.is_disk_virtual = True
476 self.default_toolchain = "ARM"
481 class NUCLEO_F030R8(Target):
483 Target.__init__(self)
484 self.core = "Cortex-M0"
485 self.extra_labels = ['STM', 'STM32F0', 'STM32F030R8']
486 self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
487 self.default_toolchain = "uARM"
488 self.supported_form_factors = ["ARDUINO", "MORPHO"]
489 self.detect_code = ["0725"]
491 class NUCLEO_F070RB(Target):
493 Target.__init__(self)
494 self.core = "Cortex-M0"
495 self.extra_labels = ['STM', 'STM32F0', 'STM32F070RB']
496 self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
497 self.default_toolchain = "uARM"
498 self.supported_form_factors = ["ARDUINO", "MORPHO"]
499 self.detect_code = ["0755"]
501 class NUCLEO_F072RB(Target):
503 Target.__init__(self)
504 self.core = "Cortex-M0"
505 self.extra_labels = ['STM', 'STM32F0', 'STM32F072RB']
506 self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
507 self.default_toolchain = "uARM"
508 self.supported_form_factors = ["ARDUINO", "MORPHO"]
509 self.detect_code = ["0730"]
511 class NUCLEO_F091RC(Target):
513 Target.__init__(self)
514 self.core = "Cortex-M0"
515 self.extra_labels = ['STM', 'STM32F0', 'STM32F091RC']
516 self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
517 self.default_toolchain = "uARM"
518 self.supported_form_factors = ["ARDUINO", "MORPHO"]
519 self.detect_code = ["0750"]
521 class NUCLEO_F103RB(Target):
523 Target.__init__(self)
524 self.core = "Cortex-M3"
525 self.extra_labels = ['STM', 'STM32F1', 'STM32F103RB']
526 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
527 self.default_toolchain = "uARM"
528 self.supported_form_factors = ["ARDUINO", "MORPHO"]
529 self.detect_code = ["0700"]
531 class NUCLEO_F302R8(Target):
533 Target.__init__(self)
534 self.core = "Cortex-M4F"
535 self.extra_labels = ['STM', 'STM32F3', 'STM32F302R8']
536 self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
537 self.default_toolchain = "uARM"
538 self.supported_form_factors = ["ARDUINO", "MORPHO"]
539 self.detect_code = ["0705"]
541 class NUCLEO_F303RE(Target):
543 Target.__init__(self)
544 self.core = "Cortex-M4F"
545 self.extra_labels = ['STM', 'STM32F3', 'STM32F303RE']
546 self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
547 self.default_toolchain = "uARM"
548 self.supported_form_factors = ["ARDUINO", "MORPHO"]
549 self.detect_code = ["0745"]
551 class NUCLEO_F334R8(Target):
553 Target.__init__(self)
554 self.core = "Cortex-M4F"
555 self.extra_labels = ['STM', 'STM32F3', 'STM32F334R8']
556 self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
557 self.default_toolchain = "uARM"
558 self.supported_form_factors = ["ARDUINO", "MORPHO"]
559 self.detect_code = ["0735"]
561 class NUCLEO_F401RE(Target):
563 Target.__init__(self)
564 self.core = "Cortex-M4F"
565 self.extra_labels = ['STM', 'STM32F4', 'STM32F401RE']
566 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
567 self.default_toolchain = "uARM"
568 self.supported_form_factors = ["ARDUINO", "MORPHO"]
569 self.detect_code = ["0720"]
571 class NUCLEO_F411RE(Target):
573 Target.__init__(self)
574 self.core = "Cortex-M4F"
575 self.extra_labels = ['STM', 'STM32F4', 'STM32F411RE']
576 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
577 self.default_toolchain = "uARM"
578 self.supported_form_factors = ["ARDUINO", "MORPHO"]
579 self.detect_code = ["0740"]
581 class NUCLEO_L053R8(Target):
583 Target.__init__(self)
584 self.core = "Cortex-M0+"
585 self.extra_labels = ['STM', 'STM32L0', 'STM32L053R8']
586 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
587 self.default_toolchain = "uARM"
588 self.supported_form_factors = ["ARDUINO", "MORPHO"]
589 self.detect_code = ["0715"]
591 class NUCLEO_L073RZ(Target):
593 Target.__init__(self)
594 self.core = "Cortex-M0+"
595 self.extra_labels = ['STM', 'STM32L0', 'STM32L073RZ']
596 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
597 self.default_toolchain = "uARM"
598 self.supported_form_factors = ["ARDUINO", "MORPHO"]
599 self.detect_code = ["0760"]
601 class NUCLEO_L152RE(Target):
603 Target.__init__(self)
604 self.core = "Cortex-M3"
605 self.extra_labels = ['STM', 'STM32L1', 'STM32L152RE']
606 self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
607 self.default_toolchain = "uARM"
608 self.supported_form_factors = ["ARDUINO", "MORPHO"]
609 self.detect_code = ["0710"]
611 class STM32F3XX(Target):
613 Target.__init__(self)
614 self.core = "Cortex-M4"
615 self.extra_labels = ['STM', 'STM32F3XX']
616 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
617 self.default_toolchain = "uARM"
619 class STM32F407(Target):
621 Target.__init__(self)
622 self.core = "Cortex-M4F"
623 self.extra_labels = ['STM', 'STM32F4', 'STM32F4XX']
624 self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
626 class ARCH_MAX(Target):
628 Target.__init__(self)
629 self.core = "Cortex-M4F"
630 self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG']
631 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
632 self.supported_form_factors = ["ARDUINO"]
633 self.macros = ['LSI_VALUE=32000']
635 def program_cycle_s(self):
638 class DISCO_F051R8(Target):
640 Target.__init__(self)
641 self.core = "Cortex-M0"
642 self.extra_labels = ['STM', 'STM32F0', 'STM32F051', 'STM32F051R8']
643 self.supported_toolchains = ["GCC_ARM"]
644 self.default_toolchain = "uARM"
646 class DISCO_F100RB(Target):
648 Target.__init__(self)
649 self.core = "Cortex-M3"
650 self.extra_labels = ['STM', 'STM32F1', 'STM32F100RB']
651 self.supported_toolchains = ["GCC_ARM"]
652 self.default_toolchain = "uARM"
654 class DISCO_F303VC(Target):
656 Target.__init__(self)
657 self.core = "Cortex-M4F"
658 self.extra_labels = ['STM', 'STM32F3', 'STM32F303', 'STM32F303VC']
659 self.supported_toolchains = ["GCC_ARM"]
660 self.default_toolchain = "uARM"
662 class DISCO_F334C8(Target):
664 Target.__init__(self)
665 self.core = "Cortex-M4F"
666 self.extra_labels = ['STM', 'STM32F3', 'STM32F334C8']
667 self.supported_toolchains = ["GCC_ARM",]
668 self.default_toolchain = "GCC_ARM"
669 self.detect_code = ["0735"]
671 class DISCO_F407VG(Target):
673 Target.__init__(self)
674 self.core = "Cortex-M4F"
675 self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG']
676 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
678 class DISCO_F429ZI(Target):
680 Target.__init__(self)
681 self.core = "Cortex-M4F"
682 self.extra_labels = ['STM', 'STM32F4', 'STM32F429', 'STM32F429ZI']
683 self.supported_toolchains = ["GCC_ARM", "IAR"]
684 self.default_toolchain = "GCC_ARM"
686 class DISCO_L053C8(Target):
688 Target.__init__(self)
689 self.core = "Cortex-M0+"
690 self.extra_labels = ['STM', 'STM32L0', 'STM32L053C8']
691 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
692 self.default_toolchain = "uARM"
694 class MTS_MDOT_F405RG(Target):
696 Target.__init__(self)
697 self.core = "Cortex-M4F"
698 self.extra_labels = ['STM', 'STM32F4', 'STM32F405RG']
699 self.macros = ['HSE_VALUE=26000000', 'OS_CLOCK=48000000']
700 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
701 self.is_disk_virtual = True
702 self.default_toolchain = "ARM"
704 class MTS_MDOT_F411RE(Target):
706 Target.__init__(self)
707 self.core = "Cortex-M4F"
708 self.extra_labels = ['STM', 'STM32F4', 'STM32F411RE']
709 self.macros = ['HSE_VALUE=26000000', 'OS_CLOCK=96000000', 'USE_PLL_HSE_EXTC=0', 'VECT_TAB_OFFSET=0x00010000']
710 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
711 self.default_toolchain = "uARM"
713 def init_hooks(self, hook, toolchain_name):
714 if toolchain_name in ['GCC_ARM', 'ARM_STD', 'ARM_MICRO']:
715 hook.hook_add_binary("post", self.combine_bins)
717 # combine application binary with bootloader
718 # bootloader + padding to 64kB + application + md5sum (16 bytes)
720 def combine_bins(t_self, resources, elf, binf):
721 loader = os.path.join(TOOLS_BOOTLOADERS, "MTS_MDOT_F411RE", "bootloader.bin")
722 target = binf + ".tmp"
723 if not os.path.exists(loader):
724 print "Can't find bootloader binary: " + loader
726 outbin = open(target, 'w+b')
727 part = open(loader, 'rb')
730 outbin.write('\xFF' * (64*1024 - len(data)))
732 part = open(binf, 'rb')
739 crc = struct.pack('<I', binascii.crc32(data) & 0xFFFFFFFF)
743 os.rename(target, binf)
745 class MTS_DRAGONFLY_F411RE(Target):
747 Target.__init__(self)
748 self.core = "Cortex-M4F"
749 self.extra_labels = ['STM', 'STM32F4', 'STM32F411RE']
750 self.macros = ['HSE_VALUE=26000000', 'VECT_TAB_OFFSET=0x08010000']
751 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
752 self.default_toolchain = "ARM"
754 def init_hooks(self, hook, toolchain_name):
755 if toolchain_name in ['GCC_ARM', 'ARM_STD', 'ARM_MICRO']:
756 hook.hook_add_binary("post", self.combine_bins)
758 # combine application binary with bootloader
759 # bootloader + padding to 64kB + application + md5sum (16 bytes)
761 def combine_bins(t_self, resources, elf, binf):
762 loader = os.path.join(TOOLS_BOOTLOADERS, "MTS_DRAGONFLY_F411RE", "bootloader.bin")
763 target = binf + ".tmp"
764 if not os.path.exists(loader):
765 print "Can't find bootloader binary: " + loader
767 outbin = open(target, 'w+b')
768 part = open(loader, 'rb')
771 outbin.write('\xFF' * (64*1024 - len(data)))
773 part = open(binf, 'rb')
780 crc = struct.pack('<I', binascii.crc32(data) & 0xFFFFFFFF)
784 os.rename(target, binf)
786 class MOTE_L152RC(Target):
788 Target.__init__(self)
789 self.core = "Cortex-M3"
790 self.extra_labels = ['STM', 'STM32L1', 'STM32L152RC']
791 self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
792 self.default_toolchain = "uARM"
793 self.detect_code = ["4100"]
795 class DISCO_F401VC(Target):
797 Target.__init__(self)
798 self.core = "Cortex-M4F"
799 self.extra_labels = ['STM', 'STM32F4', 'STM32F401', 'STM32F401VC']
800 self.supported_toolchains = ["GCC_ARM"]
801 self.default_toolchain = "GCC_ARM"
803 class UBLOX_C029(Target):
805 Target.__init__(self)
806 self.core = "Cortex-M4F"
807 self.extra_labels = ['STM', 'STM32F4', 'STM32F439', 'STM32F439ZI']
808 self.macros = ['HSE_VALUE=24000000', 'HSE_STARTUP_TIMEOUT=5000']
809 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
810 self.default_toolchain = "uARM"
811 self.supported_form_factors = ["ARDUINO"]
817 class NRF51822(Target):
818 # the following is a list of possible Nordic softdevices in decreasing order
820 EXPECTED_SOFTDEVICES_WITH_OFFSETS = [
822 'name' : 's110_nrf51822_8.0.0_softdevice.hex',
826 'name' : 's110_nrf51822_7.1.0_softdevice.hex',
830 'name' : 's110_nrf51822_7.0.0_softdevice.hex',
834 'name' : 's110_nrf51822_6.0.0_softdevice.hex',
838 EXPECTED_BOOTLOADER_FILENAME = "nrf51822_bootloader.hex"
840 MERGE_SOFT_DEVICE = True
841 MERGE_BOOTLOADER = False
844 Target.__init__(self)
845 self.core = "Cortex-M0"
846 self.extra_labels = ["NORDIC", "NRF51822_MKIT", "MCU_NRF51822", "MCU_NORDIC_16K"]
847 self.common_macros = ['NRF51']
848 self.macros = self.common_macros
849 self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
850 self.is_disk_virtual = True
851 self.detect_code = ["1070"]
853 def program_cycle_s(self):
856 def init_hooks(self, hook, toolchain_name):
857 if toolchain_name in ['ARM_STD', 'ARM_MICRO', 'GCC_ARM', 'IAR']:
858 hook.hook_add_binary("post", self.binary_hook)
861 def binary_hook(t_self, resources, elf, binf):
862 # Scan to find the actual paths of soft device and bootloader files
865 for hexf in resources.hex_files:
866 if hexf.find(t_self.target.EXPECTED_BOOTLOADER_FILENAME) != -1:
869 for softdeviceAndOffsetEntry in t_self.target.EXPECTED_SOFTDEVICES_WITH_OFFSETS:
870 if hexf.find(softdeviceAndOffsetEntry['name']) != -1:
875 t_self.debug("Hex file not found. Aborting.")
878 # Merge user code with softdevice
879 from intelhex import IntelHex
881 binh.loadbin(binf, offset=softdeviceAndOffsetEntry['offset'])
883 if t_self.target.MERGE_SOFT_DEVICE is True:
884 t_self.debug("Merge SoftDevice file %s" % softdeviceAndOffsetEntry['name'])
888 if t_self.target.MERGE_BOOTLOADER is True and blf is not None:
889 t_self.debug("Merge BootLoader file %s" % t_self.target.EXPECTED_BOOTLOADER_FILENAME)
893 with open(binf.replace(".bin", ".hex"), "w") as f:
894 binh.tofile(f, format='hex')
896 class NRF51822_BOOT(NRF51822):
898 NRF51822.__init__(self)
899 self.core = "Cortex-M0"
900 self.extra_labels = ["NORDIC", "NRF51822_MKIT", "MCU_NRF51822", "MCU_NORDIC_16K", "NRF51822"]
901 self.macros = ['TARGET_NRF51822', 'TARGET_OTA_ENABLED']
902 self.macros += self.common_macros
903 self.supported_toolchains = ["ARM", "GCC_ARM"]
904 self.MERGE_SOFT_DEVICE = True
905 self.MERGE_BOOTLOADER = True
907 class NRF51822_OTA(NRF51822):
909 NRF51822.__init__(self)
910 self.core = "Cortex-M0"
911 self.extra_labels = ["NORDIC", "NRF51822_MKIT", "MCU_NRF51822", "MCU_NORDIC_16K", "NRF51822"]
912 self.macros = ['TARGET_NRF51822', 'TARGET_OTA_ENABLED']
913 self.macros += self.common_macros
914 self.supported_toolchains = ["ARM", "GCC_ARM"]
915 self.MERGE_SOFT_DEVICE = False
917 class NRF51_DK(NRF51822):
919 NRF51822.__init__(self)
920 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_32K']
921 self.macros = ['TARGET_NRF51822']
922 self.macros += self.common_macros
923 self.supported_form_factors = ["ARDUINO"]
925 class NRF51_DK_BOOT(NRF51822):
927 NRF51822.__init__(self)
928 self.core = "Cortex-M0"
929 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_32K', 'NRF51_DK']
930 self.macros = ['TARGET_NRF51822', 'TARGET_NRF51_DK', 'TARGET_OTA_ENABLED']
931 self.macros += self.common_macros
932 self.supported_toolchains = ["ARM", "GCC_ARM"]
933 self.MERGE_SOFT_DEVICE = True
934 self.MERGE_BOOTLOADER = True
936 class NRF51_DK_OTA(NRF51822):
938 NRF51822.__init__(self)
939 self.core = "Cortex-M0"
940 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_32K', 'NRF51_DK']
941 self.macros = ['TARGET_NRF51822', 'TARGET_NRF51_DK', 'TARGET_OTA_ENABLED']
942 self.macros += self.common_macros
943 self.supported_toolchains = ["ARM", "GCC_ARM"]
944 self.MERGE_SOFT_DEVICE = False
946 class NRF51_DONGLE(NRF51822):
948 NRF51822.__init__(self)
949 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_32K']
950 self.macros = ['TARGET_NRF51822']
951 self.macros += self.common_macros
953 class ARCH_BLE(NRF51822):
955 NRF51822.__init__(self)
956 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
957 self.macros = ['TARGET_NRF51822']
958 self.macros += self.common_macros
959 self.supported_form_factors = ["ARDUINO"]
961 class SEEED_TINY_BLE(NRF51822):
963 NRF51822.__init__(self)
964 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
965 self.macros = ['TARGET_NRF51822']
966 self.macros += self.common_macros
968 class SEEED_TINY_BLE_BOOT(NRF51822):
970 NRF51822.__init__(self)
971 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K', 'SEEED_TINY_BLE']
972 self.macros = ['TARGET_NRF51822', 'TARGET_SEEED_TINY_BLE', 'TARGET_OTA_ENABLED']
973 self.macros += self.common_macros
974 self.MERGE_SOFT_DEVICE = True
975 self.MERGE_BOOTLOADER = True
977 class SEEED_TINY_BLE_OTA(NRF51822):
979 NRF51822.__init__(self)
980 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K', 'SEEED_TINY_BLE']
981 self.macros = ['TARGET_NRF51822', 'TARGET_SEEED_TINY_BLE', 'TARGET_OTA_ENABLED']
982 self.macros += self.common_macros
983 self.MERGE_SOFT_DEVICE = False
985 class HRM1017(NRF51822):
987 NRF51822.__init__(self)
988 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
989 self.macros = ['TARGET_NRF51822']
990 self.macros += self.common_macros
992 class RBLAB_NRF51822(NRF51822):
994 NRF51822.__init__(self)
995 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
996 self.macros = ['TARGET_NRF51822']
997 self.macros += self.common_macros
998 self.supported_form_factors = ["ARDUINO"]
1000 class RBLAB_BLENANO(NRF51822):
1002 NRF51822.__init__(self)
1003 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
1004 self.macros = ['TARGET_NRF51822']
1005 self.macros += self.common_macros
1007 class NRF51822_Y5_MBUG(NRF51822):
1009 NRF51822.__init__(self)
1010 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
1011 self.macros = ['TARGET_NRF51822']
1012 self.macros += self.common_macros
1014 class XADOW_M0(LPCTarget):
1016 LPCTarget.__init__(self)
1017 self.core = "Cortex-M0"
1018 self.extra_labels = ['NXP', 'LPC11UXX', 'MCU_LPC11U35_501']
1019 self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"]
1020 self.default_toolchain = "uARM"
1022 class WALLBOT_BLE(NRF51822):
1024 NRF51822.__init__(self)
1025 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
1026 self.macros = ['TARGET_NRF51822']
1027 self.macros += self.common_macros
1029 class DELTA_DFCM_NNN40(NRF51822):
1031 NRF51822.__init__(self)
1032 self.core = "Cortex-M0"
1033 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
1034 self.macros = ['TARGET_NRF51822']
1035 self.macros += self.common_macros
1037 class DELTA_DFCM_NNN40_OTA(NRF51822):
1039 NRF51822.__init__(self)
1040 self.core = "Cortex-M0"
1041 self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K', 'DELTA_DFCM_NNN40']
1042 self.MERGE_SOFT_DEVICE = False
1043 self.macros += self.common_macros
1046 class ARM_MPS2_M0(Target):
1048 Target.__init__(self)
1049 self.core = "Cortex-M0"
1050 self.extra_labels = ['ARM_SSG', 'MPS2_M0']
1051 self.macros = ['CMSDK_CM0']
1052 self.supported_toolchains = ["ARM", "GCC_ARM"]
1053 self.default_toolchain = "ARM"
1055 class ARM_MPS2_M0P(Target):
1057 Target.__init__(self)
1058 self.core = "Cortex-M0+"
1059 self.extra_labels = ['ARM_SSG', 'MPS2_M0P']
1060 self.macros = ['CMSDK_CM0plus']
1061 self.supported_toolchains = ["ARM", "GCC_ARM"]
1062 self.default_toolchain = "ARM"
1064 class ARM_MPS2_M1(Target):
1066 Target.__init__(self)
1067 self.core = "Cortex-M1"
1068 self.extra_labels = ['ARM_SSG', 'MPS2_M1']
1069 self.macros = ['CMSDK_CM1']
1070 self.supported_toolchains = ["ARM", "GCC_ARM"]
1071 self.default_toolchain = "ARM"
1073 class ARM_MPS2_M3(Target):
1075 Target.__init__(self)
1076 self.core = "Cortex-M3"
1077 self.extra_labels = ['ARM_SSG', 'MPS2_M3']
1078 self.macros = ['CMSDK_CM3']
1079 self.supported_toolchains = ["ARM", "GCC_ARM"]
1080 self.default_toolchain = "ARM"
1082 class ARM_MPS2_M4(Target):
1084 Target.__init__(self)
1085 self.core = "Cortex-M4F"
1086 self.extra_labels = ['ARM_SSG', 'MPS2_M4']
1087 self.macros = ['CMSDK_CM4']
1088 self.supported_toolchains = ["ARM", "GCC_ARM"]
1089 self.default_toolchain = "ARM"
1091 class ARM_MPS2_M7(Target):
1093 Target.__init__(self)
1094 self.core = "Cortex-M7F"
1095 self.extra_labels = ['ARM_SSG', 'MPS2_M7']
1096 self.macros = ['CMSDK_CM7']
1097 self.supported_toolchains = ["ARM", "GCC_ARM"]
1098 self.default_toolchain = "ARM"
1100 class ARM_MPS2(ARM_MPS2_M4):
1106 class RZ_A1H(Target):
1108 Target.__init__(self)
1109 self.core = "Cortex-A9"
1110 self.extra_labels = ['RENESAS', 'MBRZA1H']
1111 self.supported_toolchains = ["ARM", "GCC_ARM"]
1112 self.supported_form_factors = ["ARDUINO"]
1113 self.default_toolchain = "ARM"
1115 def program_cycle_s(self):
1119 ### Maxim Integrated ###
1121 class MAXWSNENV(Target):
1123 Target.__init__(self)
1124 self.core = "Cortex-M3"
1125 self.extra_labels = ['Maxim', 'MAX32610']
1126 self.macros = ['__SYSTEM_HFX=24000000']
1127 self.supported_toolchains = ["GCC_ARM", "IAR", "ARM"]
1128 self.default_toolchain = "ARM"
1130 class MAX32600MBED(Target):
1132 Target.__init__(self)
1133 self.core = "Cortex-M3"
1134 self.extra_labels = ['Maxim', 'MAX32600']
1135 self.macros = ['__SYSTEM_HFX=24000000']
1136 self.supported_toolchains = ["GCC_ARM", "IAR", "ARM"]
1137 self.default_toolchain = "ARM"
1139 # Get a single instance for each target
1145 OC_MBUINO(), # LPC11U24
1148 APPNEARME_MICRONFCBOARD(), #LPC11U34_421
1151 XADOW_M0(), # LPC11U35_501
1154 LPCCAPPUCCINO(),# LPC11U37_501
1155 ARCH_GPRS(), # LPC11U37_501
1161 ARCH_PRO(), # LPC1768
1162 UBLOX_C027(), # LPC1768
1184 MTS_GAMBIT(), # FRDM K64F
1206 DISCO_F407VG(), # STM32F407
1207 ARCH_MAX(), # STM32F407
1213 MTS_DRAGONFLY_F411RE(),
1215 UBLOX_C029(), # STM32F439
1219 NRF51822_BOOT(), # nRF51822
1220 NRF51822_OTA(), # nRF51822
1222 NRF51_DK_BOOT(), # nRF51822
1223 NRF51_DK_OTA(), # nRF51822
1225 ARCH_BLE(), # nRF51822
1226 SEEED_TINY_BLE(), # nRF51822
1227 SEEED_TINY_BLE_BOOT(),# nRF51822
1228 SEEED_TINY_BLE_OTA(),# nRF51822
1229 HRM1017(), # nRF51822
1230 RBLAB_NRF51822(),# nRF51822
1231 RBLAB_BLENANO(),# nRF51822
1232 NRF51822_Y5_MBUG(),#nRF51822
1233 WALLBOT_BLE(), # nRF51822
1234 DELTA_DFCM_NNN40(), # nRF51822
1235 DELTA_DFCM_NNN40_OTA(), # nRF51822
1249 ### Maxim Integrated ###
1254 # Map each target name to its unique instance
1257 TARGET_MAP[t.name] = t
1259 TARGET_NAMES = TARGET_MAP.keys()
1261 # Some targets with different name have the same exporters
1265 def get_target_detect_codes():
1266 """ Returns dictionary mapping detect_code -> platform_name
1269 for target in TARGETS:
1270 for detect_code in target.detect_code:
1271 result[detect_code] = target.name