]> git.friedersdorff.com Git - max/tmk_keyboard.git/blobdiff - keyboard/infinity/mbed-infinity/README
Merge commit '20b787fc1284176834cbe7ca2134e4b36bec5828'
[max/tmk_keyboard.git] / keyboard / infinity / mbed-infinity / README
index b0d226f793fc61a0e3bd974fe1dfecaa8a82116a..43051c9003856097de53da8f1ac1106879977d94 100644 (file)
@@ -37,3 +37,47 @@ Clock enable:
     SIM_SCGC4[USBOTG] = 1
 
 
+
+Infinity bootloader change
+==========================
+After @2c7542e(2015/01) Infinity bootloader doesn't disable watchdog timer and keyboard firmware has to do it itself.  mbed disables watchdog in startup sequence but unfortunately timer is timed out bofore that.
+
+We have to do that in earlier phase of mbed startup sequence.
+
+
+mbed starup sequence files:
+mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/startup_M20D5.s
+mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c
+
+Infinity booloader change commit:
+https://github.com/kiibohd/controller/commit/2c7542e2e7f0b8a99edf563dc53164fe1a439483
+
+discussion:
+https://geekhack.org/index.php?topic=41989.msg1686616#msg1686616
+
+
+WORKAROUND
+----------
+Call SystemInit early in Reset_Handler.
+
+$ diff -u ../../mbed-sdk/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/startup_MK20D5.s mbed-infinity
+--- ../../mbed-sdk/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/startup_MK20D5.s      2015-03-22 10:33:22.779866000 +0900
++++ mbed-infinity/startup_MK20D5.s      2015-03-22 10:32:56.483866000 +0900
+@@ -147,6 +147,8 @@
+  *      __etext: End of code section, i.e., begin of data sections to copy from.
+  *      __data_start__/__data_end__: RAM address range that data should be
+  *      copied to. Both must be aligned to 4 bytes boundary.  */
++    ldr    r0, =SystemInit
++    blx    r0
+
+     ldr    r1, =__etext
+     ldr    r2, =__data_start__
+@@ -161,8 +163,6 @@
+
+ .Lflash_to_ram_loop_end:
+
+-    ldr    r0, =SystemInit
+-    blx    r0
+     ldr    r0, =_start
+     bx    r0
+     .pool