make some change to complie stm32_f103_onekey with new version of Chibios (#583)

[max/tmk_keyboard.git] / keyboard / stm32_f103_onekey / mcuconf.h

diff --git a/keyboard/stm32_f103_onekey/mcuconf.h b/keyboard/stm32_f103_onekey/mcuconf.h
index 4d29c4ae96d1f4ff6d037915b545d553607ff36a..a89194897b44c91f2d59ea54401d5c27b90194c9 100644 (file)
--- a/keyboard/stm32_f103_onekey/mcuconf.h
+++ b/keyboard/stm32_f103_onekey/mcuconf.h
@@ -1,5 +1,5 @@
 /*\r
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio\r
+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio\r
 \r
     Licensed under the Apache License, Version 2.0 (the "License");\r
     you may not use this file except in compliance with the License.\r
@@ -14,71 +14,75 @@
     limitations under the License.\r
 */\r
 \r
-#ifndef _MCUCONF_H_\r
-#define _MCUCONF_H_\r
+#ifndef MCUCONF_H\r
+#define MCUCONF_H\r
+\r
+#define STM32F103_MCUCONF\r
 \r
 /*\r
- * STM32F0xx drivers configuration.\r
+ * STM32F103 drivers configuration.\r
  * The following settings override the default settings present in\r
  * the various device driver implementation headers.\r
  * Note that the settings for each driver only have effect if the whole\r
  * driver is enabled in halconf.h.\r
  *\r
  * IRQ priorities:\r
- * 3...0       Lowest...Highest.\r
+ * 15...0       Lowest...Highest.\r
  *\r
  * DMA priorities:\r
  * 0...3        Lowest...Highest.\r
  */\r
 \r
-#define STM32F103_MCUCONF\r
-\r
 /*\r
  * HAL driver system settings.\r
  */\r
 #define STM32_NO_INIT                       FALSE\r
-#define STM32_PVD_ENABLE                    FALSE\r
-#define STM32_PLS                           STM32_PLS_LEV0\r
 #define STM32_HSI_ENABLED                   TRUE\r
-#define STM32_HSI14_ENABLED                 TRUE\r
-#define STM32_HSI48_ENABLED                 FALSE\r
-#define STM32_LSI_ENABLED                   TRUE\r
-#define STM32_HSE_ENABLED                   FALSE\r
+#define STM32_LSI_ENABLED                   FALSE\r
+#define STM32_HSE_ENABLED                   TRUE\r
 #define STM32_LSE_ENABLED                   FALSE\r
 #define STM32_SW                            STM32_SW_PLL\r
-#define STM32_PLLSRC                        STM32_PLLSRC_HSI\r
-#define STM32_PREDIV_VALUE                  2\r
-#define STM32_PLLMUL_VALUE                  12\r
-#define STM32_USBPRE                       STM32_USBPRE_DIV1\r
+#define STM32_PLLSRC                        STM32_PLLSRC_HSE\r
+#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1\r
+#define STM32_PLLMUL_VALUE                  9\r
 #define STM32_HPRE                          STM32_HPRE_DIV1\r
-#define STM32_PPRE                          STM32_PPRE_DIV1\r
-#define STM32_ADCSW                         STM32_ADCSW_HSI14\r
+#define STM32_PPRE1                         STM32_PPRE1_DIV2\r
+#define STM32_PPRE2                         STM32_PPRE2_DIV2\r
 #define STM32_ADCPRE                        STM32_ADCPRE_DIV4\r
+#define STM32_USB_CLOCK_REQUIRED            TRUE\r
+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5\r
 #define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK\r
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4\r
-#define STM32_ADCSW                         STM32_ADCSW_HSI14\r
-#define STM32_USBSW                         STM32_USBSW_HSI48\r
-#define STM32_CECSW                         STM32_CECSW_HSI\r
-#define STM32_I2C1SW                        STM32_I2C1SW_HSI\r
-#define STM32_USART1SW                      STM32_USART1SW_PCLK\r
-#define STM32_RTCSEL                        STM32_RTCSEL_LSI\r
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV\r
+#define STM32_PVD_ENABLE                    FALSE\r
+#define STM32_PLS                           STM32_PLS_LEV0\r
+\r
+/*\r
+ * IRQ system settings.\r
+ */\r
+#define STM32_IRQ_EXTI0_PRIORITY            6\r
+#define STM32_IRQ_EXTI1_PRIORITY            6\r
+#define STM32_IRQ_EXTI2_PRIORITY            6\r
+#define STM32_IRQ_EXTI3_PRIORITY            6\r
+#define STM32_IRQ_EXTI4_PRIORITY            6\r
+#define STM32_IRQ_EXTI5_9_PRIORITY          6\r
+#define STM32_IRQ_EXTI10_15_PRIORITY        6\r
+#define STM32_IRQ_EXTI16_PRIORITY           6\r
+#define STM32_IRQ_EXTI17_PRIORITY           6\r
+#define STM32_IRQ_EXTI18_PRIORITY           6\r
+#define STM32_IRQ_EXTI19_PRIORITY           6\r
 \r
 /*\r
  * ADC driver system settings.\r
  */\r
 #define STM32_ADC_USE_ADC1                  FALSE\r
 #define STM32_ADC_ADC1_DMA_PRIORITY         2\r
-#define STM32_ADC_IRQ_PRIORITY              2\r
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2\r
+#define STM32_ADC_ADC1_IRQ_PRIORITY         6\r
 \r
 /*\r
- * EXT driver system settings.\r
+ * CAN driver system settings.\r
  */\r
-#define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3\r
-#define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3\r
-#define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3\r
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       3\r
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       3\r
+#define STM32_CAN_USE_CAN1                  FALSE\r
+#define STM32_CAN_CAN1_IRQ_PRIORITY         11\r
 \r
 /*\r
  * GPT driver system settings.\r
@@ -86,11 +90,15 @@
 #define STM32_GPT_USE_TIM1                  FALSE\r
 #define STM32_GPT_USE_TIM2                  FALSE\r
 #define STM32_GPT_USE_TIM3                  FALSE\r
-#define STM32_GPT_USE_TIM14                 FALSE\r
-#define STM32_GPT_TIM1_IRQ_PRIORITY         2\r
-#define STM32_GPT_TIM2_IRQ_PRIORITY         2\r
-#define STM32_GPT_TIM3_IRQ_PRIORITY         2\r
-#define STM32_GPT_TIM14_IRQ_PRIORITY        2\r
+#define STM32_GPT_USE_TIM4                  FALSE\r
+#define STM32_GPT_USE_TIM5                  FALSE\r
+#define STM32_GPT_USE_TIM8                  FALSE\r
+#define STM32_GPT_TIM1_IRQ_PRIORITY         7\r
+#define STM32_GPT_TIM2_IRQ_PRIORITY         7\r
+#define STM32_GPT_TIM3_IRQ_PRIORITY         7\r
+#define STM32_GPT_TIM4_IRQ_PRIORITY         7\r
+#define STM32_GPT_TIM5_IRQ_PRIORITY         7\r
+#define STM32_GPT_TIM8_IRQ_PRIORITY         7\r
 \r
 /*\r
  * I2C driver system settings.\r
@@ -98,11 +106,10 @@
 #define STM32_I2C_USE_I2C1                  FALSE\r
 #define STM32_I2C_USE_I2C2                  FALSE\r
 #define STM32_I2C_BUSY_TIMEOUT              50\r
-#define STM32_I2C_I2C1_IRQ_PRIORITY         3\r
-#define STM32_I2C_I2C2_IRQ_PRIORITY         3\r
-#define STM32_I2C_USE_DMA                   TRUE\r
-#define STM32_I2C_I2C1_DMA_PRIORITY         1\r
-#define STM32_I2C_I2C2_DMA_PRIORITY         1\r
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5\r
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5\r
+#define STM32_I2C_I2C1_DMA_PRIORITY         3\r
+#define STM32_I2C_I2C2_DMA_PRIORITY         3\r
 #define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")\r
 \r
 /*\r
@@ -111,9 +118,15 @@
 #define STM32_ICU_USE_TIM1                  FALSE\r
 #define STM32_ICU_USE_TIM2                  FALSE\r
 #define STM32_ICU_USE_TIM3                  FALSE\r
-#define STM32_ICU_TIM1_IRQ_PRIORITY         3\r
-#define STM32_ICU_TIM2_IRQ_PRIORITY         3\r
-#define STM32_ICU_TIM3_IRQ_PRIORITY         3\r
+#define STM32_ICU_USE_TIM4                  FALSE\r
+#define STM32_ICU_USE_TIM5                  FALSE\r
+#define STM32_ICU_USE_TIM8                  FALSE\r
+#define STM32_ICU_TIM1_IRQ_PRIORITY         7\r
+#define STM32_ICU_TIM2_IRQ_PRIORITY         7\r
+#define STM32_ICU_TIM3_IRQ_PRIORITY         7\r
+#define STM32_ICU_TIM4_IRQ_PRIORITY         7\r
+#define STM32_ICU_TIM5_IRQ_PRIORITY         7\r
+#define STM32_ICU_TIM8_IRQ_PRIORITY         7\r
 \r
 /*\r
  * PWM driver system settings.\r
@@ -122,33 +135,53 @@
 #define STM32_PWM_USE_TIM1                  FALSE\r
 #define STM32_PWM_USE_TIM2                  FALSE\r
 #define STM32_PWM_USE_TIM3                  FALSE\r
-#define STM32_PWM_TIM1_IRQ_PRIORITY         3\r
-#define STM32_PWM_TIM2_IRQ_PRIORITY         3\r
-#define STM32_PWM_TIM3_IRQ_PRIORITY         3\r
+#define STM32_PWM_USE_TIM4                  FALSE\r
+#define STM32_PWM_USE_TIM5                  FALSE\r
+#define STM32_PWM_USE_TIM8                  FALSE\r
+#define STM32_PWM_TIM1_IRQ_PRIORITY         7\r
+#define STM32_PWM_TIM2_IRQ_PRIORITY         7\r
+#define STM32_PWM_TIM3_IRQ_PRIORITY         7\r
+#define STM32_PWM_TIM4_IRQ_PRIORITY         7\r
+#define STM32_PWM_TIM5_IRQ_PRIORITY         7\r
+#define STM32_PWM_TIM8_IRQ_PRIORITY         7\r
+\r
+/*\r
+ * RTC driver system settings.\r
+ */\r
+#define STM32_RTC_IRQ_PRIORITY              15\r
 \r
 /*\r
  * SERIAL driver system settings.\r
  */\r
 #define STM32_SERIAL_USE_USART1             FALSE\r
 #define STM32_SERIAL_USE_USART2             FALSE\r
-#define STM32_SERIAL_USART1_PRIORITY        3\r
-#define STM32_SERIAL_USART2_PRIORITY        3\r
+#define STM32_SERIAL_USE_USART3             FALSE\r
+#define STM32_SERIAL_USE_UART4              FALSE\r
+#define STM32_SERIAL_USE_UART5              FALSE\r
+#define STM32_SERIAL_USART1_PRIORITY        12\r
+#define STM32_SERIAL_USART2_PRIORITY        12\r
+#define STM32_SERIAL_USART3_PRIORITY        12\r
+#define STM32_SERIAL_UART4_PRIORITY         12\r
+#define STM32_SERIAL_UART5_PRIORITY         12\r
 \r
 /*\r
  * SPI driver system settings.\r
  */\r
 #define STM32_SPI_USE_SPI1                  FALSE\r
 #define STM32_SPI_USE_SPI2                  FALSE\r
+#define STM32_SPI_USE_SPI3                  FALSE\r
 #define STM32_SPI_SPI1_DMA_PRIORITY         1\r
 #define STM32_SPI_SPI2_DMA_PRIORITY         1\r
-#define STM32_SPI_SPI1_IRQ_PRIORITY         2\r
-#define STM32_SPI_SPI2_IRQ_PRIORITY         2\r
+#define STM32_SPI_SPI3_DMA_PRIORITY         1\r
+#define STM32_SPI_SPI1_IRQ_PRIORITY         10\r
+#define STM32_SPI_SPI2_IRQ_PRIORITY         10\r
+#define STM32_SPI_SPI3_IRQ_PRIORITY         10\r
 #define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")\r
 \r
 /*\r
  * ST driver system settings.\r
  */\r
-#define STM32_ST_IRQ_PRIORITY               2\r
+#define STM32_ST_IRQ_PRIORITY               8\r
 #define STM32_ST_USE_TIMER                  2\r
 \r
 /*\r
@@ -156,10 +189,13 @@
  */\r
 #define STM32_UART_USE_USART1               FALSE\r
 #define STM32_UART_USE_USART2               FALSE\r
-#define STM32_UART_USART1_IRQ_PRIORITY      3\r
-#define STM32_UART_USART2_IRQ_PRIORITY      3\r
+#define STM32_UART_USE_USART3               FALSE\r
+#define STM32_UART_USART1_IRQ_PRIORITY      12\r
+#define STM32_UART_USART2_IRQ_PRIORITY      12\r
+#define STM32_UART_USART3_IRQ_PRIORITY      12\r
 #define STM32_UART_USART1_DMA_PRIORITY      0\r
 #define STM32_UART_USART2_DMA_PRIORITY      0\r
+#define STM32_UART_USART3_DMA_PRIORITY      0\r
 #define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")\r
 \r
 /*\r
@@ -167,6 +203,12 @@
  */\r
 #define STM32_USB_USE_USB1                  TRUE\r
 #define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE\r
-#define STM32_USB_USB1_LP_IRQ_PRIORITY      3\r
+#define STM32_USB_USB1_HP_IRQ_PRIORITY      13\r
+#define STM32_USB_USB1_LP_IRQ_PRIORITY      14\r
+\r
+/*\r
+ * WDG driver system settings.\r
+ */\r
+#define STM32_WDG_USE_IWDG                  FALSE\r
 \r
-#endif /* _MCUCONF_H_ */\r
+#endif /* MCUCONF_H */\r