core: Make TIMER0 ISR noblock

The TIMER0 ISR takes 1.5us and can affect IBMPC protocol ISR.
Add ISR_NOBLOCK to allow interrupt during TIMER0 ISR.

diff --git a/tmk_core/common/avr/timer.c b/tmk_core/common/avr/timer.c
index 1aa4a6a80cee68d39ed748083acfc7d620514b3c..9be3fa8b801473f385046acb325f114c096b438f 100644 (file)
--- a/tmk_core/common/avr/timer.c
+++ b/tmk_core/common/avr/timer.c
@@ -115,7 +115,7 @@ uint32_t timer_elapsed32(uint32_t last)
 }
 
 // excecuted once per 1ms.(excess for just timer count?)
-ISR(TIMER0_COMPA_vect)
+ISR(TIMER0_COMPA_vect, ISR_NOBLOCK)
 {
     timer_count++;
 }