* @{\r
*/\r
\r
-#ifndef _CHCONF_H_\r
-#define _CHCONF_H_\r
+#ifndef CHCONF_H\r
+#define CHCONF_H\r
+\r
+#define _CHIBIOS_RT_CONF_\r
\r
/*===========================================================================*/\r
/**\r
*/\r
#define CH_CFG_NO_IDLE_THREAD FALSE\r
\r
+/* Use __WFI in the idle thread for waiting. Does lower the power\r
+ * consumption. */\r
+#define CORTEX_ENABLE_WFI_IDLE TRUE\r
+\r
/** @} */\r
\r
/*===========================================================================*/\r
*/\r
#define CH_CFG_USE_MAILBOXES TRUE\r
\r
-/**\r
- * @brief I/O Queues APIs.\r
- * @details If enabled then the I/O queues APIs are included in the kernel.\r
- *\r
- * @note The default is @p TRUE.\r
- */\r
-#define CH_CFG_USE_QUEUES TRUE\r
-\r
/**\r
* @brief Core Memory Manager APIs.\r
* @details If enabled then the core memory manager APIs are included\r
\r
/**\r
* @brief Debug option, trace buffer.\r
- * @details If enabled then the context switch circular trace buffer is\r
- * activated.\r
+ * @details If enabled then the trace buffer is activated.\r
*\r
- * @note The default is @p FALSE.\r
+ * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.\r
+ */\r
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED\r
+\r
+/**\r
+ * @brief Trace buffer entries.\r
+ * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is\r
+ * different from @p CH_DBG_TRACE_MASK_DISABLED.\r
*/\r
-#define CH_DBG_ENABLE_TRACE FALSE\r
+#define CH_DBG_TRACE_BUFFER_SIZE 128\r
\r
/**\r
* @brief Debug option, stack checks.\r
/**\r
* @brief Threads finalization hook.\r
* @details User finalization code added to the @p chThdExit() API.\r
- *\r
- * @note It is inserted into lock zone.\r
- * @note It is also invoked when the threads simply return in order to\r
- * terminate.\r
*/\r
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \\r
/* Add threads finalization code here.*/ \\r
/* Context switch code here.*/ \\r
}\r
\r
+/**\r
+ * @brief ISR enter hook.\r
+ */\r
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \\r
+ /* IRQ prologue code here.*/ \\r
+}\r
+\r
+/**\r
+ * @brief ISR exit hook.\r
+ */\r
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \\r
+ /* IRQ epilogue code here.*/ \\r
+}\r
+\r
/**\r
* @brief Idle thread enter hook.\r
* @note This hook is invoked within a critical zone, no OS functions\r
* @note This macro can be used to activate a power saving mode.\r
*/\r
#define CH_CFG_IDLE_ENTER_HOOK() { \\r
+ /* Idle-enter code here.*/ \\r
}\r
\r
/**\r
* @note This macro can be used to deactivate a power saving mode.\r
*/\r
#define CH_CFG_IDLE_LEAVE_HOOK() { \\r
+ /* Idle-leave code here.*/ \\r
}\r
\r
/**\r
/* System halt code here.*/ \\r
}\r
\r
+/**\r
+ * @brief Trace hook.\r
+ * @details This hook is invoked each time a new record is written in the\r
+ * trace buffer.\r
+ */\r
+#define CH_CFG_TRACE_HOOK(tep) { \\r
+ /* Trace code here.*/ \\r
+}\r
+\r
/** @} */\r
\r
/*===========================================================================*/\r
/* Port-specific settings (override port settings defaulted in chcore.h). */\r
/*===========================================================================*/\r
\r
-#endif /* _CHCONF_H_ */\r
+#endif /* CHCONF_H */\r
\r
/** @} */\r
* @{
*/
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#define _CHIBIOS_RT_CONF_
/*===========================================================================*/
/**
*/
#define CH_CFG_USE_MAILBOXES TRUE
-/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
/**
* @brief Debug option, trace buffer.
- * @details If enabled then the context switch circular trace buffer is
- * activated.
+ * @details If enabled then the trace buffer is activated.
*
- * @note The default is @p FALSE.
+ * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
+
+/**
+ * @brief Trace buffer entries.
+ * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
+ * different from @p CH_DBG_TRACE_MASK_DISABLED.
*/
-#define CH_DBG_ENABLE_TRACE FALSE
+#define CH_DBG_TRACE_BUFFER_SIZE 128
/**
* @brief Debug option, stack checks.
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
- *
- * @note It is inserted into lock zone.
- * @note It is also invoked when the threads simply return in order to
- * terminate.
*/
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
/* Context switch code here.*/ \
}
+/**
+ * @brief ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
+ /* IRQ prologue code here.*/ \
+}
+
+/**
+ * @brief ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
+ /* IRQ epilogue code here.*/ \
+}
+
/**
* @brief Idle thread enter hook.
* @note This hook is invoked within a critical zone, no OS functions
* @note This macro can be used to activate a power saving mode.
*/
#define CH_CFG_IDLE_ENTER_HOOK() { \
+ /* Idle-enter code here.*/ \
}
/**
* @note This macro can be used to deactivate a power saving mode.
*/
#define CH_CFG_IDLE_LEAVE_HOOK() { \
+ /* Idle-leave code here.*/ \
}
/**
/* System halt code here.*/ \
}
+/**
+ * @brief Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ * trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) { \
+ /* Trace code here.*/ \
+}
+
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#endif /* _CHCONF_H_ */
+#endif /* CHCONF_H */
/** @} */
# MAPLE MINI
# OPT_DEFS = -DCORTEX_VTOR_INIT=0x5000
-# MCU_LDSCRIPT = STM32F103xE_maplemini_bootloader
+# MCU_LDSCRIPT = STM32F103xB_maplemini_bootloader
# BOARD = MAPLEMINI_STM32_F103
## chip/board settings
* @{
*/
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#define _CHIBIOS_RT_CONF_
/*===========================================================================*/
/**
*/
#define CH_CFG_USE_MAILBOXES TRUE
-/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
/**
* @brief Debug option, trace buffer.
- * @details If enabled then the context switch circular trace buffer is
- * activated.
+ * @details If enabled then the trace buffer is activated.
*
- * @note The default is @p FALSE.
+ * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
+
+/**
+ * @brief Trace buffer entries.
+ * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
+ * different from @p CH_DBG_TRACE_MASK_DISABLED.
*/
-#define CH_DBG_ENABLE_TRACE FALSE
+#define CH_DBG_TRACE_BUFFER_SIZE 128
/**
* @brief Debug option, stack checks.
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
- *
- * @note It is inserted into lock zone.
- * @note It is also invoked when the threads simply return in order to
- * terminate.
*/
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
/* Context switch code here.*/ \
}
+/**
+ * @brief ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
+ /* IRQ prologue code here.*/ \
+}
+
+/**
+ * @brief ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
+ /* IRQ epilogue code here.*/ \
+}
+
/**
* @brief Idle thread enter hook.
* @note This hook is invoked within a critical zone, no OS functions
* @note This macro can be used to activate a power saving mode.
*/
#define CH_CFG_IDLE_ENTER_HOOK() { \
+ /* Idle-enter code here.*/ \
}
/**
* @note This macro can be used to deactivate a power saving mode.
*/
#define CH_CFG_IDLE_LEAVE_HOOK() { \
+ /* Idle-leave code here.*/ \
}
/**
/* System halt code here.*/ \
}
+/**
+ * @brief Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ * trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) { \
+ /* Trace code here.*/ \
+}
+
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#endif /* _CHCONF_H_ */
+#endif /* CHCONF_H */
/** @} */
+++ /dev/null
-/*\r
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.\r
-\r
- This file is part of ChibiOS.\r
-\r
- ChibiOS is free software; you can redistribute it and/or modify\r
- it under the terms of the GNU General Public License as published by\r
- the Free Software Foundation; either version 3 of the License, or\r
- (at your option) any later version.\r
-\r
- ChibiOS is distributed in the hope that it will be useful,\r
- but WITHOUT ANY WARRANTY; without even the implied warranty of\r
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
- GNU General Public License for more details.\r
-\r
- You should have received a copy of the GNU General Public License\r
- along with this program. If not, see <http://www.gnu.org/licenses/>.\r
-*/\r
-\r
-/*\r
- * ST32F103xB memory setup.\r
- */\r
-MEMORY\r
-{\r
- flash : org = 0x08000000, len = 64k\r
- ram0 : org = 0x20000000, len = 20k\r
- ram1 : org = 0x00000000, len = 0\r
- ram2 : org = 0x00000000, len = 0\r
- ram3 : org = 0x00000000, len = 0\r
- ram4 : org = 0x00000000, len = 0\r
- ram5 : org = 0x00000000, len = 0\r
- ram6 : org = 0x00000000, len = 0\r
- ram7 : org = 0x00000000, len = 0\r
-}\r
-\r
-/* RAM region to be used for Main stack. This stack accommodates the processing\r
- of all exceptions and interrupts*/\r
-REGION_ALIAS("MAIN_STACK_RAM", ram0);\r
-\r
-/* RAM region to be used for the process stack. This is the stack used by\r
- the main() function.*/\r
-REGION_ALIAS("PROCESS_STACK_RAM", ram0);\r
-\r
-/* RAM region to be used for data segment.*/\r
-REGION_ALIAS("DATA_RAM", ram0);\r
-\r
-/* RAM region to be used for BSS segment.*/\r
-REGION_ALIAS("BSS_RAM", ram0);\r
-\r
-/* RAM region to be used for the default heap.*/\r
-REGION_ALIAS("HEAP_RAM", ram0);\r
-\r
-INCLUDE rules.ld\r
/*\r
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.\r
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio\r
\r
- This file is part of ChibiOS.\r
+ Licensed under the Apache License, Version 2.0 (the "License");\r
+ you may not use this file except in compliance with the License.\r
+ You may obtain a copy of the License at\r
\r
- ChibiOS is free software; you can redistribute it and/or modify\r
- it under the terms of the GNU General Public License as published by\r
- the Free Software Foundation; either version 3 of the License, or\r
- (at your option) any later version.\r
+ http://www.apache.org/licenses/LICENSE-2.0\r
\r
- ChibiOS is distributed in the hope that it will be useful,\r
- but WITHOUT ANY WARRANTY; without even the implied warranty of\r
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
- GNU General Public License for more details.\r
-\r
- You should have received a copy of the GNU General Public License\r
- along with this program. If not, see <http://www.gnu.org/licenses/>.\r
+ Unless required by applicable law or agreed to in writing, software\r
+ distributed under the License is distributed on an "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+ See the License for the specific language governing permissions and\r
+ limitations under the License.\r
*/\r
\r
/*\r
- * ST32F103xB memory setup.\r
+ * ST32F103xB memory setup for use with the maplemini bootloader.\r
+ * You will have to\r
+ * #define CORTEX_VTOR_INIT 0x5000\r
+ * in your projects chconf.h\r
*/\r
MEMORY\r
{\r
- flash : org = 0x08002000, len = 64k - 0x2000\r
- ram0 : org = 0x20000C00, len = 20k - 0xC00\r
- ram1 : org = 0x00000000, len = 0\r
- ram2 : org = 0x00000000, len = 0\r
- ram3 : org = 0x00000000, len = 0\r
- ram4 : org = 0x00000000, len = 0\r
- ram5 : org = 0x00000000, len = 0\r
- ram6 : org = 0x00000000, len = 0\r
- ram7 : org = 0x00000000, len = 0\r
+ flash0 : org = 0x08002000, len = 128k - 0x2000\r
+ flash1 : org = 0x00000000, len = 0\r
+ flash2 : org = 0x00000000, len = 0\r
+ flash3 : org = 0x00000000, len = 0\r
+ flash4 : org = 0x00000000, len = 0\r
+ flash5 : org = 0x00000000, len = 0\r
+ flash6 : org = 0x00000000, len = 0\r
+ flash7 : org = 0x00000000, len = 0\r
+ ram0 : org = 0x20000000, len = 20k\r
+ ram1 : org = 0x00000000, len = 0\r
+ ram2 : org = 0x00000000, len = 0\r
+ ram3 : org = 0x00000000, len = 0\r
+ ram4 : org = 0x00000000, len = 0\r
+ ram5 : org = 0x00000000, len = 0\r
+ ram6 : org = 0x00000000, len = 0\r
+ ram7 : org = 0x00000000, len = 0\r
}\r
\r
+/* For each data/text section two region are defined, a virtual region\r
+ and a load region (_LMA suffix).*/\r
+\r
+/* Flash region to be used for exception vectors.*/\r
+REGION_ALIAS("VECTORS_FLASH", flash0);\r
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);\r
+\r
+/* Flash region to be used for constructors and destructors.*/\r
+REGION_ALIAS("XTORS_FLASH", flash0);\r
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);\r
+\r
+/* Flash region to be used for code text.*/\r
+REGION_ALIAS("TEXT_FLASH", flash0);\r
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);\r
+\r
+/* Flash region to be used for read only data.*/\r
+REGION_ALIAS("RODATA_FLASH", flash0);\r
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);\r
+\r
+/* Flash region to be used for various.*/\r
+REGION_ALIAS("VARIOUS_FLASH", flash0);\r
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);\r
+\r
+/* Flash region to be used for RAM(n) initialization data.*/\r
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);\r
+\r
/* RAM region to be used for Main stack. This stack accommodates the processing\r
- of all exceptions and interrupts*/\r
+ of all exceptions and interrupts.*/\r
REGION_ALIAS("MAIN_STACK_RAM", ram0);\r
\r
/* RAM region to be used for the process stack. This is the stack used by\r
\r
/* RAM region to be used for data segment.*/\r
REGION_ALIAS("DATA_RAM", ram0);\r
+REGION_ALIAS("DATA_RAM_LMA", flash0);\r
\r
/* RAM region to be used for BSS segment.*/\r
REGION_ALIAS("BSS_RAM", ram0);\r
/* RAM region to be used for the default heap.*/\r
REGION_ALIAS("HEAP_RAM", ram0);\r
\r
+/* Generic rules inclusion.*/\r
INCLUDE rules.ld\r
* @{\r
*/\r
\r
-#ifndef _CHCONF_H_\r
-#define _CHCONF_H_\r
+#ifndef CHCONF_H\r
+#define CHCONF_H\r
+\r
+#define _CHIBIOS_RT_CONF_\r
\r
/*===========================================================================*/\r
/**\r
* requirements.\r
* @note Requires @p CH_CFG_USE_SEMAPHORES.\r
*/\r
-#define CH_CFG_USE_SEMAPHORES_PRIORITY TRUE\r
+#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE\r
\r
/**\r
* @brief Mutexes APIs.\r
*/\r
#define CH_CFG_USE_MAILBOXES TRUE\r
\r
-/**\r
- * @brief I/O Queues APIs.\r
- * @details If enabled then the I/O queues APIs are included in the kernel.\r
- *\r
- * @note The default is @p TRUE.\r
- */\r
-#define CH_CFG_USE_QUEUES TRUE\r
-\r
/**\r
* @brief Core Memory Manager APIs.\r
* @details If enabled then the core memory manager APIs are included\r
\r
/**\r
* @brief Debug option, trace buffer.\r
- * @details If enabled then the context switch circular trace buffer is\r
- * activated.\r
+ * @details If enabled then the trace buffer is activated.\r
*\r
- * @note The default is @p FALSE.\r
+ * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.\r
+ */\r
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED\r
+\r
+/**\r
+ * @brief Trace buffer entries.\r
+ * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is\r
+ * different from @p CH_DBG_TRACE_MASK_DISABLED.\r
*/\r
-#define CH_DBG_ENABLE_TRACE TRUE\r
+#define CH_DBG_TRACE_BUFFER_SIZE 128\r
\r
/**\r
* @brief Debug option, stack checks.\r
/**\r
* @brief Threads finalization hook.\r
* @details User finalization code added to the @p chThdExit() API.\r
- *\r
- * @note It is inserted into lock zone.\r
- * @note It is also invoked when the threads simply return in order to\r
- * terminate.\r
*/\r
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \\r
/* Add threads finalization code here.*/ \\r
/* Context switch code here.*/ \\r
}\r
\r
+/**\r
+ * @brief ISR enter hook.\r
+ */\r
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \\r
+ /* IRQ prologue code here.*/ \\r
+}\r
+\r
+/**\r
+ * @brief ISR exit hook.\r
+ */\r
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \\r
+ /* IRQ epilogue code here.*/ \\r
+}\r
+\r
/**\r
* @brief Idle thread enter hook.\r
* @note This hook is invoked within a critical zone, no OS functions\r
* @note This macro can be used to activate a power saving mode.\r
*/\r
#define CH_CFG_IDLE_ENTER_HOOK() { \\r
+ /* Idle-enter code here.*/ \\r
}\r
\r
/**\r
* @note This macro can be used to deactivate a power saving mode.\r
*/\r
#define CH_CFG_IDLE_LEAVE_HOOK() { \\r
+ /* Idle-leave code here.*/ \\r
}\r
\r
/**\r
/* System halt code here.*/ \\r
}\r
\r
+/**\r
+ * @brief Trace hook.\r
+ * @details This hook is invoked each time a new record is written in the\r
+ * trace buffer.\r
+ */\r
+#define CH_CFG_TRACE_HOOK(tep) { \\r
+ /* Trace code here.*/ \\r
+}\r
+\r
/** @} */\r
\r
/*===========================================================================*/\r
/* Port-specific settings (override port settings defaulted in chcore.h). */\r
/*===========================================================================*/\r
\r
-#endif /* _CHCONF_H_ */\r
+#endif /* CHCONF_H */\r
\r
/** @} */\r
# Teensy LC, 3.0, 3.1, 3.2 support
-These ARM Teensies are now supported through [chibios](http://chibios.org).
+These ARM Teensies are now supported through [ChibiOS](http://chibios.org).
You'll need to install an ARM toolchain, for instance from [gcc ARM embedded](https://launchpad.net/gcc-arm-embedded) website, or using your favourite package manager. After installing, you should be able to run `arm-none-eabi-gcc -v` in the command prompt and get sensible output. This toolchain is used instead of `avr-gcc`, which is only for AVR chips. Naturally you'll also need the usual development tools (e.g. `make`), just as in the AVR setting.
-You'll need this fork/branch of TMK. If you're reading this from your own hard drive, then you already have it ;) Anyway, you can get a zip from [here](https://github.com/flabbergast/tmk_keyboard/archive/chibios.zip) {or clone this repo from github and checkout the `chibios` branch}.
+Next, you'll need ChibiOS. For Teensies, you'll need code from two repositories: [chibios-main](https://github.com/ChibiOS/ChibiOS) and [chibios-contrib](https://github.com/ChibiOS/ChibiOS). If you're not using git, you can just download a [zip of chibios from here](https://github.com/ChibiOS/ChibiOS/archive/a7df9a891067621e8e1a5c2a2c0ceada82403afe.zip), unpack the zip, and rename/move the unpacked directory (named `ChibiOS-<long_hash_here>`) to `tmk_core/tool/chibios/chibios` (so that the file `tmk_core/tool/chibios/chibios/license.txt` exists). Now the same procedure with a [zip of chibios-contrib from here](https://github.com/ChibiOS/ChibiOS-Contrib/archive/e1311c4db6cd366cf760673f769e925741ac0ad3.zip): unpack and move `ChibiOS-Contrib-<long_hash_here>` to `tmk_core/tool/chibios/chibios-contrib`.
-Next, you'll need ChibiOS. The current release (3.0.4) does not have sufficient Kinetis support, so you'll need to get a patched version from [my fork](https://github.com/flabbergast/ChibiOS/tree/kinetis): you can download a current tree zipped from [here](https://github.com/flabbergast/ChibiOS/archive/kinetis.zip) {or clone that repo from github and checkout the `kinetis` branch}. Unpack the zip, rename the newly created `ChibiOS-kinetis` to `chibios`, and move it to `tmk/tool/chibios/` (so that the ChibiOS files reside in `tmk/tool/chibios/chibios`).
+(If you're using git, you can just clone the two repos: [chibios](https://github.com/ChibiOS/ChibiOS) and [chibios-contrib](https://github.com/ChibiOS/ChibiOS-Contrib). However - be warned that things may be somewhat out-of-sync (updates at different rates), so you may need to hunt a bit for the right commits.)
+
+(Why do we need chibios-contrib? Well, the main repo focuses on STM32 chips, and Freescale/NXP Kinetis chips are supported via the Contrib repository.)
This should be it. Running `make` in `keyboard/teensy_lc_onekey` should create a working firmware in `build/`, called `ch.hex`.
/*\r
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.\r
-\r
- This file is part of ChibiOS.\r
-\r
- ChibiOS is free software; you can redistribute it and/or modify\r
- it under the terms of the GNU General Public License as published by\r
- the Free Software Foundation; either version 3 of the License, or\r
- (at your option) any later version.\r
-\r
- ChibiOS is distributed in the hope that it will be useful,\r
- but WITHOUT ANY WARRANTY; without even the implied warranty of\r
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
- GNU General Public License for more details.\r
-\r
- You should have received a copy of the GNU General Public License\r
- along with this program. If not, see <http://www.gnu.org/licenses/>.\r
-*/\r
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com\r
+ * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining\r
+ * a copy of this software and associated documentation files (the "Software"),\r
+ * to deal in the Software without restriction, including without limitation\r
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,\r
+ * and/or sell copies of the Software, and to permit persons to whom the\r
+ * Software is furnished to do so, subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in\r
+ * all copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS\r
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE\r
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\r
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\r
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\r
+ * SOFTWARE.\r
+ */\r
\r
/*\r
* KL26Z64 memory setup.\r
*/\r
MEMORY\r
{\r
- flash0 : org = 0x00000000, len = 0xc0\r
- flashcfg : org = 0x00000400, len = 0x10\r
- flash : org = 0x00000410, len = 62k - 0x410\r
- eeprom_emu : org = 0x0000F800, len = 2k\r
- ram0 : org = 0x1FFFF800, len = 8k\r
- ram1 : org = 0x00000000, len = 0\r
- ram2 : org = 0x00000000, len = 0\r
- ram3 : org = 0x00000000, len = 0\r
- ram4 : org = 0x00000000, len = 0\r
- ram5 : org = 0x00000000, len = 0\r
- ram6 : org = 0x00000000, len = 0\r
- ram7 : org = 0x00000000, len = 0\r
+ flash0 : org = 0x00000000, len = 0x100\r
+ flash1 : org = 0x00000400, len = 0x10\r
+ flash2 : org = 0x00000410, len = 62k - 0x410\r
+ flash3 : org = 0x0000F800, len = 2k\r
+ flash4 : org = 0x00000000, len = 0\r
+ flash5 : org = 0x00000000, len = 0\r
+ flash6 : org = 0x00000000, len = 0\r
+ flash7 : org = 0x00000000, len = 0\r
+ ram0 : org = 0x1FFFF800, len = 8k\r
+ ram1 : org = 0x00000000, len = 0\r
+ ram2 : org = 0x00000000, len = 0\r
+ ram3 : org = 0x00000000, len = 0\r
+ ram4 : org = 0x00000000, len = 0\r
+ ram5 : org = 0x00000000, len = 0\r
+ ram6 : org = 0x00000000, len = 0\r
+ ram7 : org = 0x00000000, len = 0\r
}\r
\r
-__eeprom_workarea_start__ = ORIGIN(eeprom_emu);\r
-__eeprom_workarea_size__ = LENGTH(eeprom_emu);\r
-__eeprom_workarea_end__ = __eeprom_workarea_start__ + __eeprom_workarea_size__;\r
+/* Flash region for the configuration bytes.*/\r
+SECTIONS\r
+{\r
+ .cfmprotect : ALIGN(4) SUBALIGN(4)\r
+ {\r
+ KEEP(*(.cfmconfig))\r
+ } > flash1\r
+}\r
+\r
+/* For each data/text section two region are defined, a virtual region\r
+ and a load region (_LMA suffix).*/\r
+\r
+/* Flash region to be used for exception vectors.*/\r
+REGION_ALIAS("VECTORS_FLASH", flash0);\r
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);\r
+\r
+/* Flash region to be used for constructors and destructors.*/\r
+REGION_ALIAS("XTORS_FLASH", flash2);\r
+REGION_ALIAS("XTORS_FLASH_LMA", flash2);\r
+\r
+/* Flash region to be used for code text.*/\r
+REGION_ALIAS("TEXT_FLASH", flash2);\r
+REGION_ALIAS("TEXT_FLASH_LMA", flash2);\r
+\r
+/* Flash region to be used for read only data.*/\r
+REGION_ALIAS("RODATA_FLASH", flash2);\r
+REGION_ALIAS("RODATA_FLASH_LMA", flash2);\r
+\r
+/* Flash region to be used for various.*/\r
+REGION_ALIAS("VARIOUS_FLASH", flash2);\r
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);\r
+\r
+/* Flash region to be used for RAM(n) initialization data.*/\r
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);\r
\r
/* RAM region to be used for Main stack. This stack accommodates the processing\r
- of all exceptions and interrupts*/\r
+ of all exceptions and interrupts.*/\r
REGION_ALIAS("MAIN_STACK_RAM", ram0);\r
\r
/* RAM region to be used for the process stack. This is the stack used by\r
\r
/* RAM region to be used for data segment.*/\r
REGION_ALIAS("DATA_RAM", ram0);\r
+REGION_ALIAS("DATA_RAM_LMA", flash2);\r
\r
/* RAM region to be used for BSS segment.*/\r
REGION_ALIAS("BSS_RAM", ram0);\r
/* RAM region to be used for the default heap.*/\r
REGION_ALIAS("HEAP_RAM", ram0);\r
\r
-INCLUDE ld/rules_kinetis.ld\r
+__eeprom_workarea_start__ = ORIGIN(flash3);\r
+__eeprom_workarea_size__ = LENGTH(flash3);\r
+__eeprom_workarea_end__ = __eeprom_workarea_start__ + __eeprom_workarea_size__;\r
+\r
+/* Generic rules inclusion.*/\r
+INCLUDE rules.ld\r
projects / max / tmk_keyboard.git / commitdiff