*/\r
\r
/*\r
- * KL25Z64 memory setup.\r
+ * KL26Z64 memory setup.\r
*/\r
-\r
-ENTRY(Reset_Handler)\r
-\r
MEMORY\r
{\r
flash0 : org = 0x00000000, len = 0xc0\r
flashcfg : org = 0x00000400, len = 0x10\r
flash : org = 0x00000410, len = 62k - 0x410\r
eeprom_emu : org = 0x0000F800, len = 2k\r
- ram : org = 0x1FFFF800, len = 8k\r
+ ram0 : org = 0x1FFFF800, len = 8k\r
+ ram1 : org = 0x00000000, len = 0\r
+ ram2 : org = 0x00000000, len = 0\r
+ ram3 : org = 0x00000000, len = 0\r
+ ram4 : org = 0x00000000, len = 0\r
+ ram5 : org = 0x00000000, len = 0\r
+ ram6 : org = 0x00000000, len = 0\r
+ ram7 : org = 0x00000000, len = 0\r
}\r
\r
-__ram_start__ = ORIGIN(ram);\r
-__ram_size__ = LENGTH(ram);\r
-__ram_end__ = __ram_start__ + __ram_size__;\r
-\r
__eeprom_workarea_start__ = ORIGIN(eeprom_emu);\r
__eeprom_workarea_size__ = LENGTH(eeprom_emu);\r
__eeprom_workarea_end__ = __eeprom_workarea_start__ + __eeprom_workarea_size__;\r
\r
-SECTIONS\r
-{\r
- . = 0;\r
-\r
- .isr : ALIGN(4) SUBALIGN(4)\r
- {\r
- KEEP(*(.vectors))\r
- } > flash0\r
-\r
- .cfmprotect : ALIGN(4) SUBALIGN(4)\r
- {\r
- KEEP(*(.cfmconfig))\r
- } > flashcfg\r
-\r
- _text = .;\r
-\r
- constructors : ALIGN(4) SUBALIGN(4)\r
- {\r
- PROVIDE(__init_array_start = .);\r
- KEEP(*(SORT(.init_array.*)))\r
- KEEP(*(.init_array))\r
- PROVIDE(__init_array_end = .);\r
- } > flash\r
-\r
- destructors : ALIGN(4) SUBALIGN(4)\r
- {\r
- PROVIDE(__fini_array_start = .);\r
- KEEP(*(.fini_array))\r
- KEEP(*(SORT(.fini_array.*)))\r
- PROVIDE(__fini_array_end = .);\r
- } > flash\r
+/* RAM region to be used for Main stack. This stack accommodates the processing\r
+ of all exceptions and interrupts*/\r
+REGION_ALIAS("MAIN_STACK_RAM", ram0);\r
\r
- .text : ALIGN(4) SUBALIGN(4)\r
- {\r
- *(.text)\r
- *(.text.*)\r
- *(.rodata)\r
- *(.rodata.*)\r
- *(.glue_7t)\r
- *(.glue_7)\r
- *(.gcc*)\r
- } > flash\r
+/* RAM region to be used for the process stack. This is the stack used by\r
+ the main() function.*/\r
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);\r
\r
- .ARM.extab :\r
- {\r
- *(.ARM.extab* .gnu.linkonce.armextab.*)\r
- } > flash\r
+/* RAM region to be used for data segment.*/\r
+REGION_ALIAS("DATA_RAM", ram0);\r
\r
- .ARM.exidx : {\r
- PROVIDE(__exidx_start = .);\r
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
- PROVIDE(__exidx_end = .);\r
- } > flash\r
-\r
- .eh_frame_hdr :\r
- {\r
- *(.eh_frame_hdr)\r
- } > flash\r
-\r
- .eh_frame : ONLY_IF_RO\r
- {\r
- *(.eh_frame)\r
- } > flash\r
-\r
- .textalign : ONLY_IF_RO\r
- {\r
- . = ALIGN(8);\r
- } > flash\r
-\r
- _etext = .;\r
- _textdata = _etext;\r
-\r
- .stacks :\r
- {\r
- . = ALIGN(8);\r
- __main_stack_base__ = .;\r
- . += __main_stack_size__;\r
- . = ALIGN(8);\r
- __main_stack_end__ = .;\r
- __process_stack_base__ = .;\r
- __main_thread_stack_base__ = .;\r
- . += __process_stack_size__;\r
- . = ALIGN(8);\r
- __process_stack_end__ = .;\r
- __main_thread_stack_end__ = .;\r
- } > ram\r
-\r
- .data :\r
- {\r
- . = ALIGN(4);\r
- PROVIDE(_data = .);\r
- *(.data)\r
- . = ALIGN(4);\r
- *(.data.*)\r
- . = ALIGN(4);\r
- *(.ramtext)\r
- . = ALIGN(4);\r
- PROVIDE(_edata = .);\r
- } > ram AT > flash\r
-\r
- .bss :\r
- {\r
- . = ALIGN(4);\r
- PROVIDE(_bss_start = .);\r
- *(.bss)\r
- . = ALIGN(4);\r
- *(.bss.*)\r
- . = ALIGN(4);\r
- *(COMMON)\r
- . = ALIGN(4);\r
- PROVIDE(_bss_end = .);\r
- } > ram\r
-}\r
+/* RAM region to be used for BSS segment.*/\r
+REGION_ALIAS("BSS_RAM", ram0);\r
\r
-PROVIDE(end = .);\r
-_end = .;\r
+/* RAM region to be used for the default heap.*/\r
+REGION_ALIAS("HEAP_RAM", ram0);\r
\r
-__heap_base__ = _end;\r
-__heap_end__ = __ram_end__;\r
+INCLUDE ld/rules_kinetis.ld\r