From: Jun Wako <wakojun@gmail.com>
Date: Fri, 2 Jan 2015 14:19:26 +0000 (+0900)
Subject: Add openocd config files for K20
X-Git-Url: https://git.friedersdorff.com/?a=commitdiff_plain;h=d5e5dbd0aa28477884940ce045da09a9168859d8;p=max%2Ftmk_keyboard.git

Add openocd config files for K20
---

diff --git a/keyboard/infinity/k20dx32_flash.cfg b/keyboard/infinity/k20dx32_flash.cfg
new file mode 100644
index 00000000..714d9991
--- /dev/null
+++ b/keyboard/infinity/k20dx32_flash.cfg
@@ -0,0 +1,124 @@
+# FreeScale Kinetis K20 devices with 32kB Flash and 8kB Local On-Chip SRAM,
+# Nemuisan's Special for MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5
+
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+    set _CHIPNAME $CHIPNAME
+} else {
+    set _CHIPNAME k20
+}
+
+if { [info exists ENDIAN] } {
+    set _ENDIAN $ENDIAN
+} else {
+    set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   if { [using_jtag] } {
+      set _CPUTAPID 0x4BA00477
+   } {
+      # this is the SW-DP tap id not the jtag tap id
+      set _CPUTAPID 0x2BA01477
+   }
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 8kB
+if { [info exists WORKAREASIZE] == 0 } {
+   set _WORKAREASIZE 0x2000
+}
+
+# Select "srst_only", Nemuisan said so!
+echo "Kinetis MUST need Hardware SRST Control to Recover Secure-State!"
+adapter_nsrst_delay 200
+reset_config srst_only
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
+
+# It is important that "kinetis mdm check_security" is called for
+# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
+# causes "kinetis mdm check_security" to fail the first time openocd
+# calls it when it tries to connect after the CPU has been power-cycled.
+$_CHIPNAME.cpu configure -event examine-end {
+	kinetis mdm check_security
+# Uncomment when gone into s*ck'n secured state!
+#	kinetis mdm mass_erase
+}
+
+# K20 has minimun 8kB of SRAM and starts at 1FFFF000.
+$_TARGETNAME configure -work-area-phys 0x1FFFF000 -work-area-size $_WORKAREASIZE -work-area-backup 0 -rtos auto
+
+# MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5 has 32kB of flash memory.
+flash bank $_CHIPNAME.pflash kinetis 0x00000000 0x8000 0 4 $_TARGETNAME
+
+
+proc mt_flash {IMGFILE} {
+	flash write_image erase $IMGFILE
+	reset run
+	halt
+	verify_image $IMGFILE
+	reset run
+	shutdown
+}
+
+proc mt_flash_bin {IMGFILE OFFSET} {
+	flash write_image erase $IMGFILE $OFFSET bin
+	reset run
+	halt
+	verify_image $IMGFILE $OFFSET bin
+	reset run
+	shutdown
+}
+
+proc mt_flash_hex {IMGFILE} {
+	flash write_image erase $IMGFILE 0 ihex
+	reset run
+	halt
+	verify_image $IMGFILE 0 ihex
+	reset run
+	shutdown
+}
+
+proc mt_flash_srec {IMGFILE} {
+	flash write_image erase $IMGFILE 0 s19
+	reset run
+	halt
+	verify_image $IMGFILE 0 s19
+	reset run
+	shutdown
+}
+
+proc mass_erase {} {
+	kinetis mdm mass_erase
+}
+
+proc eraser {} {
+# Verbose procedure confirmed erase routine
+	flash info 0
+# CAUTION! "flash erase_sector 0 0 last" goes into secure state!!!
+# USE "mass_erase" command instead of
+#	flash erase_sector 0 0 last
+	mass_erase
+	shutdown
+}
+
+
+#debug_level 3
+# HLA doesn't have cortex_m commands 
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to
+   # perform a soft reset
+   cortex_m reset_config sysresetreq
+}
+adapter_khz 1000
+reset_config srst_only srst_nogate connect_assert_srst
+gdb_target_description disable
+init
+reset init
diff --git a/keyboard/infinity/openocd.cfg b/keyboard/infinity/openocd.cfg
new file mode 100644
index 00000000..2b0a63b9
--- /dev/null
+++ b/keyboard/infinity/openocd.cfg
@@ -0,0 +1,13 @@
+# mchack openocd
+# https://github.com/mchck/mchck/wiki/Openocd
+#
+# adapter: frdm-kl05z with cmsis-dap firmware
+# inteface: cmsis-dap
+# transport: hla_swd
+# target: MK20DX128VLF5 Freescale Kinetis
+
+# adapter/interface
+source [find interface/cmsis-dap.cfg]
+
+# CPU
+source [find k20dx32_flash.cfg]