From: tmk Date: Thu, 23 Jan 2020 15:44:27 +0000 (+0900) Subject: ibmpc: Fix stop bit check code in ISR X-Git-Url: https://git.friedersdorff.com/?a=commitdiff_plain;h=e89ade52e105bcdcf949b63645c3df38935011b0;p=max%2Ftmk_keyboard.git ibmpc: Fix stop bit check code in ISR removing function call makes prologue/epilogue shorter --- diff --git a/tmk_core/protocol/ibmpc.c b/tmk_core/protocol/ibmpc.c index f6c5e5c3..f74a387d 100644 --- a/tmk_core/protocol/ibmpc.c +++ b/tmk_core/protocol/ibmpc.c @@ -191,6 +191,8 @@ int16_t ibmpc_host_recv_response(void) return data; } +// NOTE: to read data line early as possible: +// write naked ISR with asembly code to read the line and call C func to do other job? ISR(IBMPC_INT_VECT) { uint8_t dbit; @@ -240,16 +242,23 @@ ISR(IBMPC_INT_VECT) goto DONE; break; case 0b10100000: - // XT IBM-done or AT-midway - // wait and check for clock of AT stop bit - if (wait_clock_hi(100) && wait_clock_lo(100)) { // FIXME this makes ISR prologe long - // AT-midway - return; - } else { - // XT-IBM-done - recv_data = (isr_data>>8) & 0xFF; - goto DONE; - } + { + uint8_t us = 150; + // wait for rising and falling edge of AT stop bit + while (!(IBMPC_CLOCK_PIN&(1<>8) & 0xFF; + goto DONE; + } + } break; case 0b00010000: case 0b10010000: